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Advanced technology for a satellite multichannel demultiplexer/demodulator

Satellite on-board processing is needed to efficiently service multiple users while at the same time minimizing earth station complexity. The processing satellite receives a wideband uplink at 30 GHz and down-converts it to a suitable intermediate frequency. A multichannel demultiplexer then separates the composite signal into discrete channels. Each channel is then demodulated by bulk demodulators, with the baseband signals routed to the downlink processor for retransmission to the receiving earth stations. This type of processing circumvents many of the difficulties associated with traditional bent-pipe repeater satellites. Uplink signal distortion and interference are not retransmitted on the downlink. Downlink power can be allocated in accordance with user needs, independent of uplink transmissions. This allows the uplink users to employ different data rates as well as different modulation and coding schemes. In addition, all downlink users have a common frequency standard and symbol clock on the satellite, which is useful for network synchronization in time division multiple access schemes. The purpose of this program is to demonstrate the concept of an optically implemented multichannel demultiplexer (MCD). A proof-of-concept (POC) model has been developed which has the ability to receive a 40 MHz wide composite signal consisting of up to 1000 40 kHz QPSK modulated channels and perform the demultiplexing process. In addition a set of special test equipment (STE) has been configured to evaluate the performance of the POC model. The optical MCD is realized as an acousto-optic spectrum analyzer utilizing the capability of Bragg cells to perform the required channelization. These Bragg cells receive an optical input from a laser source and an RF input (the signal). The Bragg interaction causes optical output diffractions at angles proportional to the RF input frequency. These discrete diffractions are optically detected and output to individual demodulators for baseband conversion. Optimization of the MCD design was conducted in order to achieve a compromise between two opposing sources of signal degradation: adjacent channel interference and intersymbol interference. The system was also optimized to allow simple, inexpensive ground stations communications with the MCD. These design goals led to the realization of a POC MCD which demonstrates the demultiplexing function with minimal signal degradation. Performance evaluation results using the STE equipment indicate that the dynamic range of the demultiplexer in the presence of adjacent and multiple channel loading is 40 - 50 dB. Measured bit error rate (BER) probabilities varied from the predicted theoretical results by one dB or less. The performance of the proof-of-concept model indicate that the development of a space qualified optically implemented MCD are feasible. The advantages to such an implementation include reduced size, weight and power and increased reliability when compared with electronic approaches. All of these factors are critical to on-board satellite processors. Further optimization can be conducted which trade ground station complexity and MCD performance to achieve desired system results.

Abramovitz, Irwin J.

Data management system performance modeling

This paper discusses analytical techniques that have been used to gain a better understanding of the Space Station Freedom's (SSF's) Data Management System (DMS). The DMS is a complex, distributed, real-time computer system that has been redesigned numerous times. The implications of these redesigns have not been fully analyzed. This paper discusses the advantages and disadvantages for static analytical techniques such as Rate Monotonic Analysis (RMA) and also provides a rationale for dynamic modeling. Factors such as system architecture, processor utilization, bus architecture, queuing, etc. are well suited for analysis with a dynamic model. The significance of performance measures for a real-time system are discussed.

Kiser, Larry M.

Suitability of Gray Water for Hydroponic Crop Production Following Biological and Physical Chemical and Biological Subsystems

The water present in waste streams from a human habitat must be recycled in Controlled Ecological Life Support Systems (CELSS) to limit resupply needs and attain self-sufficiency. Plants play an important role in providing food, regenerating air, and producing purified water via transpiration. However, we have shown that the surfactants present in hygiene waste water have acute toxic effects on plant growth (Bubenheim et al. 1994; Greene et al., 1994). These phytotoxic affects can be mitigated by allowing the microbial population on the root surface to degrade the surfactant, however, a significant suppression (several days) in crop performance is experienced prior to reaching sub-toxic surfactant levels and plant recovery. An effective alternative is to stabilize the microbial population responsible for degradation of the surfactant on an aerobic bioreactor and process the waste water prior to utilization in the hydroponic solution (Wisniewski and Bubenheim, 1993). A sensitive bioassay indicates that the surfactant phytotoxicity is suppressed by more than 90% within 5 hours of introduction of the gray water to the bioreactor; processing for more than 12 hours degrades more than 99% of the phytotoxin. Vapor Compression Distillation (VCD) is a physical / chemical method for water purification which employees sequential distillation steps to separate water from solids and to volatilize contaminants. The solids from the waste water are concentrated in a brine and the pure product water (70 - 90% of the total waste water volume depending on operating conditions) retains non of the phytotoxic effects. Results of the bioassay were used to guide evaluations of the suitability of recovered gray water following biological and VCD processing for hydroponic lettuce production in controlled environments. Lettuce crops were grown for 28 days with 100% of the input water supplied with recovered water from the biological processor or VCD. When compared with the growth of plants in control hydroponic solution containing pure deionized water, no growth difference could be measured resulting from any of the recovered water treatments. Both biological treatment and VCD offer alternative technology approaches to recovering water from waste streams appropriate for input into a crop production system. A high level of crop performance (food, air, and water production) can be maintained with either processor; selection decisions can be based on other factors regarding system integration.

Bubenheim, David L.

Niobium coaxial cavities with internal quality factors exceeding 1.4 × 10 9 for circuit quantum electrodynamics

Group-V materials such as niobium and tantalum have become popular choices for extending the performance of circuit quantum electrodynamics (cQED) platforms, allowing for quantum processors and memories with reduced error rates and more modes. The complex surface chemistry of niobium, however, makes identifying the main modes of decoherence difficult at millikelvin temperatures and single-photon powers. We use niobium coaxial quarter-wave cavities to study the impact of etch chemistry, prolonged atmospheric exposure, and the significance of cavity conditions prior to and during cooldown—in particular, niobium hydride evolution—on single-photon coherence. We demonstrate cavities with quality factors Q int ≳ 1.4 × 10 9 in the single-photon regime, a 15-fold improvement over aluminum cavities of the same geometry. We rigorously quantify the sensitivity of our fabrication process to various loss mechanisms and demonstrate a two- to fourfold reduction in the two-level system loss tangent and a three- to fivefold improvement in the residual resistance over traditional buffered chemical polishing etching techniques. Finally, we demonstrate transmon integration and coherent cavity control while maintaining a cavity coherence of 11.3 ms. The accessibility of our method, which can be easily replicated in academic laboratory settings, together with the demonstration of its performance, mark an advancement in three-dimensional cQED.

Oriani, Andrew E. [Chicago U., EFI; Chicago U.] (O

Monitoring of International Space Station Telemetry Using Shewhart Control Charts

Shewhart control charts have been established as an expedient method for analyzing dynamic, trending data in order to identify anomalous subsystem performance as soon as such performance would exceed a statistically established baseline. Additionally, this leading indicator tool integrates a selection methodology that reduces false positive indications, optimizes true leading indicator events, minimizes computer processor unit duty cycles, and addresses human factor concerns (i.e., the potential for flight-controller data overload). This innovation leverages statistical process control, and provides a relatively simple way to allow flight controllers to focus their attention on subtle system changes that could lead to dramatic off-nominal system performance. Finally, this capability improves response time to potential hardware damage and/or crew injury, thereby improving space flight safety. Shewhart control charts require normalized data. However, the telemetry from the ISS Early External Thermal Control System (EETCS) was not normally distributed. A method for normalizing the data was implemented, as was a means of selecting data windows, the number of standard deviations (Sigma Level), the number of consecutive points out of limits (Sequence), and direction (increasing or decreasing trend data). By varying these options, and treating them like dial settings, the number of nuisance alerts and leading indicators were optimized. The goal was to capture all leading indicators while minimizing the number of nuisances. Lean Six Sigma (L6S) design of experiment methodologies were employed. To optimize the results, Perl programming language was used to automate the massive amounts of telemetry data, control chart plots, and the data analysis.

Fitch, Jeffery T.

Retargeting of existing FORTRAN program and development of parallel compilers

The software models used in implementing the parallelizing compiler for the B-HIVE multiprocessor system are described. The various models and strategies used in the compiler development are: flexible granularity model, which allows a compromise between two extreme granularity models; communication model, which is capable of precisely describing the interprocessor communication timings and patterns; loop type detection strategy, which identifies different types of loops; critical path with coloring scheme, which is a versatile scheduling strategy for any multicomputer with some associated communication costs; and loop allocation strategy, which realizes optimum overlapped operations between computation and communication of the system. Using these models, several sample routines of the AIR3D package are examined and tested. It may be noted that automatically generated codes are highly parallelized to provide the maximized degree of parallelism, obtaining the speedup up to a 28 to 32-processor system. A comparison of parallel codes for both the existing and proposed communication model, is performed and the corresponding expected speedup factors are obtained. The experimentation shows that the B-HIVE compiler produces more efficient codes than existing techniques. Work is progressing well in completing the final phase of the compiler. Numerous enhancements are needed to improve the capabilities of the parallelizing compiler.

Agrawal, Dharma P.

Multiphase complete exchange on Paragon, SP2 and CS-2

The overhead of interprocessor communication is a major factor in limiting the performance of parallel computer systems. The complete exchange is the severest communication pattern in that it requires each processor to send a distinct message to every other processor. This pattern is at the heart of many important parallel applications. On hypercubes, multiphase complete exchange has been developed and shown to provide optimal performance over varying message sizes. Most commercial multicomputer systems do not have a hypercube interconnect. However, they use special purpose hardware and dedicated communication processors to achieve very high performance communication and can be made to emulate the hypercube quite well. Multiphase complete exchange has been implemented on three contemporary parallel architectures: the Intel Paragon, IBM SP2 and Meiko CS-2. The essential features of these machines are described and their basic interprocessor communication overheads are discussed. The performance of multiphase complete exchange is evaluated on each machine. It is shown that the theoretical ideas developed for hypercubes are also applicable in practice to these machines and that multiphase complete exchange can lead to major savings in execution time over traditional solutions.

Bokhari, Shahid H.

Turbomachinery Flows Modeled

Last year, researchers at the NASA Lewis Research Center used the average passage code APNASA to complete the largest three-dimensional simulation of a multistage axial flow compressor to date. Consisting of 29 blade rows, the configuration is typical of those found in aeroengines today. The simulation, which was executed on the High Performance Computing and Communications (HPCC) Program IBM SP2 parallel computer located at the NASA Ames Research Center, took nearly 90 hr to complete. Since the completion of this activity, a fine-grain, parallel version of APNASA has been written by a team of researchers from General Electric, NASA Lewis, and NYMA. Timing studies performed on the SP2 have shown that, with eight processors assigned to each blade row, the simulation time is reduced by a factor of six. For this configuration, the simulation time would be 15 hr. The reduction in computing time indicates that an overnight turnaround of a multistage configuration simulation is feasible. In addition, average passage forms of two-equation turbulence models were formulated. These models are currently being incorporated into APNASA.

Adamczyk, John J.

Input-current shaped ac to dc converters

The problem of achieving near unity power factor while supplying power to a dc load from a single phase ac source of power is examined. Power processors for this application must perform three functions: input current shaping, energy storage, and output voltage regulation. The methods available for performing each of these three functions are reviewed. Input current shaping methods are either active or passive, with the active methods divided into buck-like and boost-like techniques. In addition to large reactances, energy storage methods include resonant filters, active filters, and active storage schemes. Fast voltage regulation can be achieved by post regulation or by supplementing the current shaping topology with an extra switch. Some indications of which methods are best suited for particular applications concludes the discussion.

Source record

Database computing in HEP

The major SSC experiments are expected to produce up to 1 Petabyte of data per year each. Once the primary reconstruction is completed by farms of inexpensive processors, I/O becomes a major factor in further analysis of the data. We believe that the application of database techniques can significantly reduce the I/O performed in these analyses. We present examples of such I/O reductions in prototypes based on relational and object-oriented databases of CDF data samples.

Day, C. T.

Development and modification of a digital program for final approach to landing

The development and implementation of a dynamic digital computer simulator which may be used to evaluate aircraft performance when operating under the control and guidance of various navigation, landing, and flight control systems are discussed. The digital computer program may be used to simulate and evaluate the relationships and interactions between various factors such as the microwave landing system, avionics receivers and onboard processors, aircraft aerodynamics, aircraft automatic control systems, control surfaces, and wind and other external effects. The models used to represent aircraft aerodynamics, control system and control surfaces; weather and wind effects; and the microwave landing system are described. Example results are presented for a simulation of a Boeing 737 using two sample control systems while subjected to various atmospheric conditions and microwave landing system errors. The limitations and performance capabilities of these control systems are discussed in terms of their ability to utilize the microwave landing system signal.

Duff, W. G.

An Efficient Scheme for Updating Sparse Cholesky Factors

Raghavan had earlier developed the software package DCSPACK which can be used for solving sparse linear systems where the coefficient matrix is symmetric and positive definite (this project was not funded by NASA but by agencies such as NSF). DSCPACK-S is the serial code and DSCPACK-P is a parallel implementation suitable for multiprocessors or networks-of-workstations with message passing using MCI. The main algorithm used is the Cholesky factorization of a sparse symmetric positive positive definite matrix A = LL(T). The code can also compute the factorization A = LDL(T). The complexity of the software arises from several factors relating to the sparsity of the matrix A. A sparse N x N matrix A has typically less that cN nonzeroes where c is a small constant. If the matrix were dense, it would have O(N2) nonzeroes. The most complicated part of such sparse Cholesky factorization relates to fill-in, i.e., zeroes in the original matrix that become nonzeroes in the factor L. An efficient implementation depends to a large extent on complex data structures and on techniques from graph theory to reduce, identify, and manage fill. DSCPACK is based on an efficient multifrontal implementation with fill-managing algorithms and implementation arising from earlier research by Raghavan and others. Sparse Cholesky factorization is typically a four step process: (1) ordering to compute a fill-reducing numbering, (2) symbolic factorization to determine the nonzero structure of L, (3) numeric factorization to compute L, and, (4) triangular solution to solve L(T)x = y and Ly = b. The first two steps are symbolic and are performed using the graph of the matrix. The numeric factorization step is of dominant cost and there are several schemes for improving performance by exploiting the nested and dense structure of groups of columns in the factor. The latter are aimed at better utilization of the cache-memory hierarchy on modem processors to prevent cache-misses and provide execution rates (operations/second) that are close to the peak rates for dense matrix computations. Currently, EPISCOPACY is being used in an application at NASA directed by J. Newman and M. James. We propose the implementation of efficient schemes for updating the LL(T) or LDL(T) factors computed in DSCPACK-S to meet the computational requirements of their project. A brief description is provided in the next section.

Raghavan, Padma

The cost of conservative synchronization in parallel discrete event simulations

The performance of a synchronous conservative parallel discrete-event simulation protocol is analyzed. The class of simulation models considered is oriented around a physical domain and possesses a limited ability to predict future behavior. A stochastic model is used to show that as the volume of simulation activity in the model increases relative to a fixed architecture, the complexity of the average per-event overhead due to synchronization, event list manipulation, lookahead calculations, and processor idle time approach the complexity of the average per-event overhead of a serial simulation. The method is therefore within a constant factor of optimal. The analysis demonstrates that on large problems--those for which parallel processing is ideally suited--there is often enough parallel workload so that processors are not usually idle. The viability of the method is also demonstrated empirically, showing how good performance is achieved on large problems using a thirty-two node Intel iPSC/2 distributed memory multiprocessor.

Nicol, David M.

Noiseless coding for the Gamma Ray spectrometer

The payload of several future unmanned space missions will include a sophisticated gamma ray spectrometer. Severely constrained data rates during certain portions of these missions could limit the possible science return from this instrument. This report investigates the application of universal noiseless coding techniques to represent gamma ray spectrometer data more efficiently without any loss in data integrity. Performance results demonstrate compression factors from 2.5:1 to 20:1 in comparison to a standard representation. Feasibility was also demonstrated by implementing a microprocessor breadboard coder/decoder using an Intel 8086 processor.

Rice, R.

Single-Chip FPGA Azimuth Pre-Filter for SAR

A field-programmable gate array (FPGA) on a single lightweight, low-power integrated-circuit chip has been developed to implement an azimuth pre-filter (AzPF) for a synthetic-aperture radar (SAR) system. The AzPF is needed to enable more efficient use of data-transmission and data-processing resources: In broad terms, the AzPF reduces the volume of SAR data by effectively reducing the azimuth resolution, without loss of range resolution, during times when end users are willing to accept lower azimuth resolution as the price of rapid access to SAR imagery. The data-reduction factor is selectable at a decimation factor, M, of 2, 4, 8, 16, or 32 so that users can trade resolution against processing and transmission delays. In principle, azimuth filtering could be performed in the frequency domain by use of fast-Fourier-transform processors. However, in the AzPF, azimuth filtering is performed in the time domain by use of finite-impulse-response filters. The reason for choosing the time-domain approach over the frequency-domain approach is that the time-domain approach demands less memory and a lower memory-access rate. The AzPF operates on the raw digitized SAR data. The AzPF includes a digital in-phase/quadrature (I/Q) demodulator. In general, an I/Q demodulator effects a complex down-conversion of its input signal followed by low-pass filtering, which eliminates undesired sidebands. In the AzPF case, the I/Q demodulator takes offset video range echo data to the complex baseband domain, ensuring preservation of signal phase through the azimuth pre-filtering process. In general, in an SAR I/Q demodulator, the intermediate frequency (fI) is chosen to be a quarter of the range-sampling frequency and the pulse-repetition frequency (fPR) is chosen to be a multiple of fI. The AzPF also includes a polyphase spatial-domain pre-filter comprising four weighted integrate-and-dump filters with programmable decimation factors and overlapping phases. To prevent aliasing of signals, the bandwidth of the AzPF is made 80 percent of fPR/M. The choice of four as the number of overlapping phases is justified by prior research in which it was shown that a filter of length 4M can effect an acceptable transfer function. The figure depicts prototype hardware comprising the AzPF and ancillary electronic circuits. The hardware was found to satisfy performance requirements in real-time tests at a sampling rate of 100 MHz.

Gudim, Mimi

Mapping between parallel processor structures and programs

This paper reports some ongoing research efforts at Stanford in allocation of parallel processing resources. Both processor structures and program structures have their own characteristics. Resource allocation binds the two structures during program execution. The mapping problem determines what processor structure and program structure may be combined to obtain maximum speedup. Three approaches to this mapping problem are considered. Two important factors, granularity and interaction delay, are also considered. A new hierarchical approach to structure definition is outlined. Effective and efficient tools are necessary for the study of the mapping problem. A fast turn-around simulation environment developed for investigating partition strategies for distributed computations and a computationally efficient method to predict performance of parallel processor structures are described.

Ngai, Tin-Fook

The Performance of the NAS HSPs in 1st Half of 1994

During the first six months of 1994, the NAS (National Airspace System) 16-CPU Y-MP C90 Von Neumann (VN) delivered an average throughput of 4.045 GFLOPS while the ACSF (Aeronautics Consolidated Supercomputer Facility) 8-CPU Y-MP C90 Eagle averaged 1.658 GFLOPS. The VN rate represents a machine efficiency of 26.3% whereas the Eagle rate corresponds to a machine efficiency of 21.6%. VN displayed a greater efficiency than Eagle primarily because the stronger workload demand for its CPU cycles allowed it to devote more time to user programs and less time to idle. An additional factor increasing VN efficiency was the ability of the UNICOS 8.0 Operating System to deliver a larger fraction of CPU time to user programs. Although measurements indicate increasing vector length for both workloads, insufficient vector lengths continue to hinder HSP (High Speed Processor) performance. To improve HSP performance, NAS should continue to encourage the HSP users to modify their codes to increase program vector length.

Bergeron, Robert J.

Noiseless coding for the magnetometer

Future unmanned space missions will continue to seek a full understanding of magnetic fields throughout the solar system. Severely constrained data rates during certain portions of these missions could limit the possible science return. This publication investigates the application of universal noiseless coding techniques to more efficiently represent magnetometer data without any loss in data integrity. Performance results indicated that compression factors of 2:1 to 6:1 can be expected. Feasibility for general deep space application was demonstrated by implementing a microprocessor breadboard coder/decoder using the Intel 8086 processor. The Comet Rendezvous Asteroid Flyby mission will incorporate these techniques in a buffer feedback, rate-controlled configuration. The characteristics of this system are discussed.

Rice, Robert F.