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At least 37 records · Page 2

Probing Plasticity and Strain-Rate Effects of Indium Submicron Pillars Using Synchrotron Laue X-ray Microdiffraction

We present that mechanical behaviors and especially the strain-rate responses at the nanoscales of low melting temperature metals, such as indium have not been much studied. Indium is one of the key materials or alloy-components in advanced microelectronics and nanotechnology industry, and understanding their mechanical behaviors at nanoscales becomes increasingly important to ensure lifetime reliability of their applications in novel nanoscale devices or advanced systems (for packaging at the nanoscales, for instance). Synchrotron X-ray microdiffraction has been utilized to examine defect structures of nanoscale materials as well as their strain-rate responses. Nanoscale or advanced microelectronics packaging, for instance, require acceptable levels of drop test results. For these low melting temperature materials especially, this technique offers a unique advantage as conventional methods such as TEM and EBSD will expose the structure to high energy electron beams that may significantly alter the microstructure and defect structure during analysis. Using this approach, we found interesting differences in term of X-ray peak broadening after deformation with different strain rates, which could indicate differences in plasticity mechanisms in the submicron pillars of indium, which could be important for its applications in nanodevices. Finally, understanding these differences could lead to better control of mechanical properties of low melting temperature metals at the nanoscales and thus have important implications for nanodevice reliability.

36 MATERIALS SCIENCE↗

Failure Analysis of Solder Joints

Soldering is a critical filler material joining process found in nearly all modern electronics. Ensuring solder joint reliability is crucial for the safety, performance, and cost-effectiveness of microelectronics.

42 ENGINEERING↗

Hardness Assurance for Low-Energy Proton-Induced Single-Event Effects: Final report for LDRD Project 173134

This report briefly summarizes three publications that resulted from a two-year LDRD. The three publications address a recently emerging reliability issue: namely, that low-energy protons (LEPs) can cause single-event effects (SEEs) in highly scaled microelectronics. These publications span from low to high technology readiness levels. In the first, novel experiments were used to prove that proton direct ionization is the dominant mechanism for LEP-induced SEEs. In the second, a simple method was developed to calculate expected on-orbit error rates for LEP effects. This simplification was enabled by creating (and characterizing) an accelerated space-like LEP environment in the laboratory. In the third publication, this new method was applied to many memory circuits from the 20-90 nm technology nodes to study the general importance of LEP effects, in terms of their contribution to the total on-orbit SEE rate.

73 NUCLEAR PHYSICS AND RADIATION PHYSICS↗

Thermoelectric coolers for high-power-density 3D electronics heat management

Future advancements in three-dimensional (3D) electronics require robust thermal management methodology. Thermoelectric coolers (TECs) are reliable and solid-state heat pumping devices with high cooling capacity that can meet the requirements of emerging 3D microelectronic devices. In this work, we first provide the design of TECs for electronics cooling using a computational model and then experimentally validate the main predictions. Key device parameters such as device thickness, leg density, and contact resistance were studied to understand their influence on the performance of TECs. Our results show that it is possible to achieve high cooling power density through optimization of TE leg height and packing density. Scaling of TECs is shown to provide ultra-high cooling power density.

32 ENERGY CONSERVATION, CONSUMPTION, AND UTILIZATI↗

Corrosion Monitors for Embedded Evaluation

We have developed and characterized novel in-situ corrosion sensors to monitor and quantify the corrosive potential and history of localized environments. Embedded corrosion sensors can provide information to aid health assessments of internal electrical components including connectors, microelectronics, wires, and other susceptible parts. When combined with other data (e.g. temperature and humidity), theory, and computational simulation, the reliability of monitored systems can be predicted with higher fidelity.

47 OTHER INSTRUMENTATION↗

Assessment of wafer scale MoS 2 atomic layers grown by metal–organic chemical vapor deposition using organo-metal, organo-sulfide, and H 2 S precursors

Transition Metal Dichalcogenides (TMDs) are a unique class of materials that exhibit attractive electrical and optical properties which have generated significant interest for applications in microelectronics, optoelectronics, energy storage, and sensing. Considering the potential of these materials to impact such applications, it is crucial to develop a reliable and scalable synthesis process that is compatible with modern industrial manufacturing methods. Metal–organic chemical vapor deposition (MOCVD) offers an ideal solution to produce TMDs, due to its compatibility with large-scale production, precise layer control, and high material purity. Optimization of MOCVD protocols is necessary for effective TMD synthesis and integration into mainstream technologies. Additionally, improvements in metrology are necessary to measure the quality of the fabricated samples more accurately. In this work, we study MOCVD of wafer-scale molybdenum disulfide (MoS 2 ) utilizing two common chalcogen precursors, H 2 S and DTBS. We then develop a metrology platform for wafer scale samples quality assessment. For this, the coalesced films were characterized using Raman spectroscopy, atomic force microscopy, transmission electron microscopy, X-ray photoelectron spectroscopy, and Kelvin probe force microscopy. We then correlate the structural analysis of these grown films with electrical performance by using aerosol jet printing to fabricate van der Pauw test structures and assess sheet resistance.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗

Effect of gamma radiation on micromechanical hardness of lead-free solder joint

Lead-free solders are important material in nano and microelectronic surface mounting technology for various applications in bio medicine, environmental monitoring, spacecraft and satellite instrumentation. Nevertheless solder joint in radiation environment needs higher reliability and resistance to any damage caused by ionizing radiations. In this study a lead-free 99.0Sn0.3Ag0.7Cu wt.% (SAC) solder joint was developed and subjected to various doses of gamma radiation to investigate the effects of the ionizing radiation to micromechanical hardness of the solder. Averaged hardness of the SAC joint was obtained from nanoindentation test. The results show a relationship between hardness values of indentations and the increment of radiation dose. Highest mean hardness, 0.2290 ± 0.0270 GPa was calculated on solder joint which was exposed to 5 Gray dose of gamma radiation. This value indicates possible radiation hardening effect on irradiated solder. The hardness gradually decreased to 0.1933 ± 0.0210 GPa and 0.1631 ± 0.0173 GPa when exposed to doses 50 and 500 gray respectively. These values are also lower than the hardness of non irradiated sample which was calculated as 0.2084 ± 0.0.3633 GPa indicating possible radiation damage and needs further related atomic dislocation study.

36 MATERIALS SCIENCE↗

Contact-Less Integrity Verification of Microelectronics Using Near-Field EM Analysis

Modern microelectronics life-cycle and supply chain ecosystem bring multiple untrusted entities, which can compromise their integrity. A major integrity issue of microelectronics stems from piracy of intellectual properties (IP) and counterfeiting, which causes significant revenue loss to the semiconductor manufacturers. Further, these components often lead to compromised functionality, reliability, security, and safety of an electronic system. This paper presents secure information transmission and probing methods for verifying the integrity of digital integrated circuit (ICs) based on their electromagnetic (EM) near-field emissions and thereby protecting systems against counterfeit components. The proposed method has been tested on both high-level instructions executed by microprocessors or Systems-on-Chip (serving as examples of software), and also logic circuits within FPGA fabrics and ASICs (serving as examples of hardware). The authentication information required by each digital system is generated using a pseudo-random number generator circuit and securely transmitted via near-field magnetic emissions. The authorized party can probe these emissions using a near-field probe, process the acquired signals to improve the signal-to-noise ratio (SNR), and then recover the secure information through matched filtering. Experimental results from commercial SoCs are used to demonstrate the proposed technique. Methods for reducing EM interference during integrity verification of both FPGAs and ASICs are also described.

47 OTHER INSTRUMENTATION↗

5G Enabled Transformative Co-design and Co-simulation Framework for Grid Decarbonization and Modernization

5G is a breakthrough technology to enable a fully mobile and connected society, and a 5G-enabled digital continuum will be one of the critical foundations for clean energy economy and grid modernization. The clean energy transformation not only requires innovative manufacturing, algorithm, application, and cross-domain co-simulation, but also a systematic evaluation and comprehensive support on the microelectronic and architectural computing customization to enable and maximize the high renewable penetration in the future power grid. The co-design of decarbonized grid, reliable yet efficient communication, and affordable yet ubiquitous computing will unlock the potential of almost any available tools for the undergoing clean energy transformation. 5G is also an opportunity to rethink the paradigm of infrastructure planning, as computing will be one of the core services for society alongside electricity and communication services.

5G↗

High-performance 2D electronic devices enabled by strong and tough two-dimensional polymer with ultra-low dielectric constant

As the feature size of microelectronic circuits is scaling down to nanometer order, the increasing interconnect crosstalk, resistance-capacitance (RC) delay and power consumption can limit the chip performance and reliability. To address these challenges, new low-k dielectric (k < 2) materials need to be developed to replace current silicon dioxide (k = 3.9) or SiCOH, etc. However, existing low-k dielectric materials, such as organosilicate glass or polymeric dielectrics, suffer from poor thermal and mechanical properties. Two-dimensional polymers (2DPs) are considered promising low-k dielectric materials because of their good thermal and mechanical properties, high porosity and designability. Here, we report a chemical-vapor-deposition (CVD) method for growing fluoride rich 2DP-F films on arbitrary substrates. We show that the grown 2DP-F thin films exhibit ultra-low dielectric constant (in plane k = 1.85 and out-of-plane k = 1.82) and remarkable mechanical properties (Young’s modulus > 15 GPa). We also demonstrated the improved performance of monolayer MoS 2 field-effect-transistors when utilizing 2DP-F thin films as dielectric substrates.

36 MATERIALS SCIENCE↗

A Perspective on ferroelectricity in hafnium oxide: Mechanisms and considerations regarding its stability and performance

Ferroelectric hafnium oxides are poised to impact a wide range of microelectronic applications owing to their superior thickness scaling of ferroelectric stability and compatibility with mainstream semiconductors and fabrication processes. For broad-scale impact, long-term performance and reliability of devices using hafnia will require knowledge of the phases present and how they vary with time and use. In this Perspective article, the importance of phases present on device performance is discussed, including the extent to which specific classes of devices can tolerate phase impurities. Following, the factors and mechanisms that are known to influence phase stability, including substituents, crystallite size, oxygen point defects, electrode chemistry, biaxial stress, and electrode capping layers, are highlighted. Herein, discussions will focus on the importance of considering both neutral and charged oxygen vacancies as stabilizing agents, the limited biaxial strain imparted to a hafnia layer by adjacent electrodes, and the strong correlation of biaxial stress with resulting polarization response. Areas needing additional research, such as the necessity for a more quantitative means to distinguish the metastable tetragonal and orthorhombic phases, quantification of oxygen vacancies, and calculation of band structures, including defect energy levels for pure hafnia and stabilized with substituents, are emphasized.

36 MATERIALS SCIENCE↗

Thermomechanical characterization and modeling for TSV structures

Continual scaling of devices and on-chip wiring has brought significant challenges for materials and processes beyond the 32-nm technology node in microelectronics. Recently, three-dimensional (3-D) integration with through-silicon vias (TSVs) has emerged as an effective solution to meet the future technology requirements. Among others, thermo-mechanical reliability is a key concern for the development of TSV structures used in die stacking as 3-D interconnects. This paper presents experimental measurements of the thermal stresses in TSV structures and analyses of interfacial reliability. The micro-Raman measurements were made to characterize the local distribution of the near-surface stresses in Si around TSVs. On the other hand, the precision wafer curvature technique was employed to measure the average stress and deformation in the TSV structures subject to thermal cycling. To understand the elastic and plastic behavior of TSVs, the microstructural evolution of the Cu vias was analyzed using focused ion beam (FIB) and electron backscattering diffraction (EBSD) techniques. Furthermore, the impact of thermal stresses on interfacial reliability of TSV structures was investigated by a shear-lag cohesive zone model that predicts the critical temperatures and critical via diameters.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

CTAP REPORT. Commercialization of Power Spectrum Analysis (PSA) Technology

Power Spectrum Analysis (PSA) is a Sandia-developed, non-intrusive, electrical technique that captures distinct frequency-domain signatures of microelectronics devices using an innovative, unconventional biasing scheme (off-normal biasing). PSA can identify subtle differences in devices and is applicable in various areas such as device screening, counterfeit identification, reliability assurance, and trust authentication. From October 2020 to April 2021, Sandia worked with entrepreneurs from a new start-up company, Chiplytics, to commercialize PSA technology through NNSA-sponsored FedTech Program. In September 2021, Sandia received funding through Covid-19 Technical Assistance Program (CTAP) to provide technical assistance to Chiplytics for commercialization. Under the CTAP Statement of Work, Sandia was tasked with providing technical assistance to Chiplytics in PSA pilot testing for Naval Surface Warfare Center (NSWC) at Crane and other pilot participants. Sandia was also tasked with assisting Chiplytics in hardware development and evaluation of Chiplytics prototype system.

24 POWER TRANSMISSION AND DISTRIBUTION↗

Freestanding Photoresist Film: A Versatile Template for Three-Dimensional Micro- and Nanofabrication

Ultrathin freestanding films with well-defined micro/nanostructures and robust mechanical properties are applied in many engineering applications including microelectronics, optics, filtration and separation, biomedical engineering, and nanotechnology. Although considerable efforts have been made toward the fabrication of freestanding thin films, it is still a significant challenge to develop a simple and reliable process for producing freestanding films with ultrathin thickness, well-regulated micro/nanopatterns, robust mechanical properties, macroscopic coverage area, and multi-layered composite structures. In this work, a significant advancement is reported in this regard. This study shows a new sacrificial-layer-free (SLF) lifting-off process, integrated with conventional micro- and nanolithography, enabling the release of micro- and nanopatterned photoresist (PR) films from the supporting substrate with unprecedented pattern coverage and structure characteristics. The freestanding PR film is resilient, can withstand significant bending and deformation, and is sufficiently flexible to be transferred onto substrates with 3D topography as a conformal soft stencil for further technological processing and applications. Moreover, the SLF lifting-off process provides a simple approach to prepare single-layered and multi-layered freestanding composite films. The results suggest that the novel SLF lifting-off process can significantly extend the capability of 3D micro-/nanofabrication.

36 MATERIALS SCIENCE↗

Atomically Precise Ultra-High Performance 2D MicroElectronics

Zyvex Labs has created several p-n junction devices with a variety of gaps between the boron and phosphorus electrodes, from 0-7.7 nm, which are now being measured. We have developed a different contacting process based on palladium disilicide rather than aluminium to improve the reliability of the device contacts. Preliminary measurements indicate that these new contacts are successfully contacting the buried dopant layers, which are intact after the overgrowth process. Modelling of the p-n junction properties has made good progress, with the model matching previous published data, and modelling of n-p-n junction devices has begun. This now awaits experimental validation.

47 OTHER INSTRUMENTATION↗

Direct-Liquid-Evaporation Chemical Vapor Deposition of Nanocrystalline Cobalt Metal for Nanoscale Copper Interconnect Encapsulation

In advanced microelectronics, precise design of liner and capping layers become critical, especially when it comes to the fabrication of Cu interconnects with dimensions lower than its mean free path. Here in this paper, we demonstrate that direct-liquid-evaporation chemical vapor deposition (DLE-CVD) of Co is a promising method to make liner and capping layers for nanoscale Cu interconnects. DLE-CVD makes pure, smooth, nanocrystalline, and highly conformal Co films with highly controllable growth characteristics. This process allows full Co encapsulation of nanoscale Cu interconnects, thus stabilizing Cu against diffusion and electromigration. Electrical measurements and high-resolution elemental imaging studies show that the DLE-CVD Co encapsulation layer can improve the reliability and thermal stability of Cu interconnects. Also, with the high conductivity of Co, the DLE-CVD Co encapsulation layer have the potential to further decrease the power consumption of nanoscale Cu interconnects, paving the way for Cu interconnects with higher efficiency in future high-end microelectronics.

36 MATERIALS SCIENCE↗

Low leakage current in heteroepitaxial Al 0.7 Sc 0.3 N ferroelectric films on Ga N

Wurtzite ( Al , Sc ) N ferroelectrics are attractive for microelectronics applications due to their chemical and structural compatibility with wurtzite semiconductors, such as Ga N and ( Al , Ga ) N . However, the leakage current in epitaxial stacks reported to date should be reduced for reliable device operation. Here, we demonstrate low leakage current in epitaxial Al 0.7 Sc 0.3 N films on Ga N with well-saturated ferroelectric hysteresis loops that are orders of magnitude lower (i.e., 0.07 A cm − 2 ) than previously reported films (1–19 A cm − 2 ) having similar or better structural characteristics. We also show that, for these high-quality epitaxial ( Al , Sc ) N films, structural quality (edge and screw dislocations), as measured by diffraction techniques, is not the dominant contributor to leakage. Instead, the small leakage in our films is limited by thermionic emission across the interfaces, which is distinct from the large leakage due to trap-mediated bulk transport in the previously reported ( Al , Sc ) N films. To support this conclusion, we show that Al 0.7 Sc 0.3 N on lattice-matched In 0.18 Ga 0.82 N buffers with improved structural characteristics but higher interface roughness exhibit increased leakage characteristics. This demonstration of low leakage current in heteroepitaxial ( Al , Sc ) N films and understanding of the importance of interface barrier and surface roughness can guide further efforts toward improving the reliability of wurtzite ferroelectric devices. Published by the American Physical Society 2025

36 MATERIALS SCIENCE↗

Multiscale modeling and experimental validation for nanochannel depth control in atomic force microscopy-based nanofabrication

Nanochannels are essential features of many microelectronic and biomedical devices. To date, the most commonly employed method to fabricate these nanochannels is atomic force microscopy (AFM). However, there is presently a very poor understanding on the fundamental principles underlying this process, which limits its reliability and controllability. In this study, we present a comprehensive multiscale model by incorporating strain gradient plasticity and strain gradient elasticity theories, which can predict nanochannel depths during AFM-based nanofabrication. The modeling results are directly verified with experiments performed on Cu and Pt substrates. As this model can also be extended to include many additional conditions, it has broad applicability in a wide range of AFM-based nanofabrication applications.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗