Engineering Papers⌕ Search

SEARCH · Engineering Papers

Results for “hardware and accelerator control systems”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 37 records · Page 2

Power Hardware-In-the-Loop Hydropower and Ultracapacitor Hybrid Testbed

Widespread deployment of a proof-of-concept technological solution for power system performance improvement can be accelerated through onsite demonstration and pilot projects. Digital real-time simulation with power hardware-in-the-loop in controlled lab environment is the precursor to de-risk the timely and efficient execution of field demonstration and pilot projects. However, the detailed process of development, characterization, and calibration of such high fidelity simulation testbed needs to be documented in a reproducible and publicly accessible manner to leverage across broader research and development communities. This paper presents such a laboratory testbed to study black start capability of a run-of-river hydro + ultracapacitor hybrid system. Beside the high-fidelity model of the islanded grid with hydropower unit, the testbed includes the energy storage, grid following inverter, and grid emulator hardware. Several aspects such as storage characterization, control and various parameter settings necessary to capture frequency transients during load restoration are described in a comprehensive manner, which led to an effective and timely execution of black start field demonstration with an actual hydropower plant.

13 HYDRO ENERGY↗

From natural language to control signals: a conceptual framework for semantic channel finding in complex experimental infrastructure

Modern experimental platforms such as particle accelerators, fusion devices, telescopes, and industrial process control systems expose tens to hundreds of thousands of control and diagnostic channels, accumulated over decades of hardware evolution. Operators and AI systems alike depend on informal expert knowledge, inconsistent naming conventions, and scattered documentation to locate the signals required for monitoring, troubleshooting, and automated control, creating a persistent bottleneck for reliability, scalability, and emerging language-model-driven interfaces. We formalize semantic channel finding, the task of mapping natural-language intent to concrete control-system signals, as a general problem in complex experimental infrastructure, and introduce a four-paradigm conceptual framework to guide architecture selection based on facility-specific data regimes. The paradigms span (i) direct in-context lookup over small, curated channel dictionaries, (ii) constrained hierarchical navigation through structured trees, (iii) interactive agent exploration using iterative reasoning and tool-based database queries, and (iv) ontology-grounded semantic search that decouples channel meaning from facility-specific naming conventions. We demonstrate the practical feasibility of each paradigm through proof-of-concept implementations at four operational facilities spanning two orders of magnitude in scale: from compact free-electron lasers to large synchrotron light sources, operating under diverse control-system architectures ranging from clean hierarchical naming schemes to legacy environments with decades of heterogeneous conventions. Where evaluated against expert-curated operational queries, these instantiations achieve 90%–97% accuracy, validating the framework’s applicability across real-world deployment scenarios. To accelerate adoption across the broader scientific and industrial control-system community, we release open-source, plug-and-play implementations of all three interactive paradigms-direct lookup, hierarchical navigation, and middle-layer exploration-within the Osprey framework, together with tools for channel database generation, interactive testing, and minimal-configuration deployment. This work establishes semantic channel finding as a foundational capability for human-centric and agentic AI interfaces at large-scale facilities, providing both a systematic framework for architecture design and practical resources to enable adoption without building custom infrastructure from scratch.

channel finding↗

Performance Evaluation of Distributed Energy Resource Management Algorithm in Large Distribution Networks

This paper presents performance evaluation of hierarchical optimization and control for distributed energy resource management system (DERMS) in large distribution networks via an advanced hardware-in-the-loop (HIL) platform. The HIL platform provides realistic testing in a laboratory environment, including the accurate modeling of a full-scale distribution system of 11,000 nodes, the DERMS software controller, and 90 power hardware photovoltaics (PVs) and battery inverters. The applied DERMS algorithm is designed based on a realtime optimal power flow algorithm and implemented with acceleration design that performs fast dispatch of simulated PVs and real physical hardware DER devices every 4 seconds.

DERMS↗

Fast Adaptive Neural Control of Resonant Extraction at Fermilab

We present the development of a machine learning (ML) based regulation system for third-order resonant beam extraction in the Mu2e experiment at Fermilab. Classical and ML-based controllers have been optimized using semi-analytic simulations and evaluated in terms of regulation performance and training efficiency. We compare several controller architectures and discuss the integration of neural control into an adaptive framework. We also present progress on surrogate models that predict the controller response given a spill intensity and controller action history. To enable real-time deployment, we report progress on implementing low-latency, edge-based inference suitable for hardware-constrained environments. Our results demonstrate the feasibility and advantages of ML-based control in managing complex, time-varying physical systems, with broader implications for accelerator operations and other domains requiring fast, adaptive regulation.

Berlioz, Jose Rene [Fermilab]↗

ModuleOT: A Hardware Security Module for Operational Technology: Preprint

With increasing penetration levels of distributed energy resources (DERs) on the distribution grid, as well as new technological advancements in the cyber space, new cyberattack vectors are being introduced, and the available attack surface is constantly increasing. Despite this increasing risk, the standard IEEE 1547-2018 does not yet recommend cybersecurity measures for DERs. To address this and to better protect data on the distribution grid - from the standpoints information security as well as operational security - ModuleOT has been developed. The module aims to significantly reduce cyberattack vectors by improving data privacy for user applications. This is accomplished by performing the core functions of encryption, authentication, authorization, certificate management, and user access control. The module integrates a custom security application with hardware cryptographic acceleration. The application secures all communications using Transmission Control Protocol over Internet Protocol (TCP/IP). These include the three most commonly used communications protocols for power systems information exchange: Modbus, Distributed Network Protocol 3 (DNP3), and Smart Energy Profile 2.0 (SEP2.0). These three protocols are also supported by IEEE 1547-2018 for all DER devices. This paper tests the data encryption/decryption feature on a physical networking test bed with emulated Modbus devices reporting grid data and presents the results.

24 POWER TRANSMISSION AND DISTRIBUTION↗

Neural network accelerator for quantum control

Efficient quantum control is necessary for practical quantum computing implementations with current technologies. Conventional algorithms for determining optimal control parameters are computationally expensive, largely excluding them from use outside of the simulation. Existing hardware solutions structured as lookup tables are imprecise and costly. By designing a machine learning model to approximate the results of traditional tools, a more efficient method can be produced. Such a model can then be synthesized into a hardware accelerator for use in quantum systems. In this study, we demonstrate a machine learning algorithm for predicting optimal pulse parameters. This algorithm is lightweight enough to fit on a low-resource FPGA and perform inference with a latency of 175 ns and pipeline interval of 5 ns with > 0.99 gate fidelity. In the long term, such an accelerator could be used near quantum computing hardware where traditional computers cannot operate, enabling quantum control at a reasonable cost at low latencies without incurring large data bandwidths outside of the cryogenic environment.

43 PARTICLE ACCELERATORS↗

Machine learning for reducing noise in RF control signals at industrial accelerators

Industrial particle accelerators typically operate in dirtier environments than research accelerators, leading to increased noise in RF and electronic systems. Furthermore, given that industrial accelerators are mass produced, less attention is given to optimizing the performance of individual systems. As a result, industrial accelerators tend to underperform their own hardware capabilities. Improving signal processing for these machines will improve cost and time margins for deployment, helping to meet the growing demand for accelerators for medical sterilization, food irradiation, cancer treatment, and imaging. Our work focuses on using machine learning techniques to reduce noise in RF signals used for pulse-to-pulse feedback in industrial accelerators. Here we review our algorithms and observed results for simulated RF systems, and discuss next steps with the ultimate goal of deployment on industrial systems.

43 PARTICLE ACCELERATORS↗

FPGA-based computing system for processing data in size, weight, and power constrained environments

Technologies that are well-suited for use in size, weight, and power (SWAP)-constrained environments are described herein. A host controller dispatches data processing instructions to hardware acceleration engines (HAEs) of one or more field programmable gate arrays (FPGAs) and further dispatches data transfer instructions to a memory controller, such that the HAEs perform processing operations on data stored in local memory devices of the HAEs in parallel with other data being transferred from external memory devices coupled to the FPGA(s) to the local memory devices.

Napier, Matthew↗

Rad-hard readout system for Timepix3 Hybrid Pixel Detectors

The Beam Gas Ionisation (BGI) profile monitor, located in the Proton Synchrotron (PS) and Super Proton Synchrotron (SPS) at CERN, requires a radiation-tolerant readout system to transfer data from the challenging accelerator surroundings to the back-end for processing. The system needs to control and acquire data from four Timepix3 Hybrid Pixel Detectors (HPDs) located directly inside the beam pipe, a highly radioactive environment. It must ensure reliability given limited hardware access and preserve signal integrity for the high-speed data (32 channels at 320 MHz). However, due to the unavailability of a suitable rad-hard Timepix3 readout, the Beam Instrumentation PiXeL (BIPXL) readout system was designed to meet these requirements. This system employs radiation-hardened components such as the GBTx and the FEASTMP, both developed at CERN. It will be compatible with forthcoming hybrid pixel detector initiatives in similarly harsh radiation conditions.

47 OTHER INSTRUMENTATION↗

Towards a study protocol: A data-driven workflow to identify error sources in direct ink write mechatronics

Abstract Using Direct Ink Write (DIW) technology in a rapid and large-scale production requires reliable quality control for printed parts. Data streams generated during printing, such as print mechatronics, are massive and diverse which impedes extracting insights. In our study protocol approach, we developed a data-driven workflow to understand the behavior of sensor-measured X- and Y- axes positional errors with process parameters, such as print velocity and velocity control. We uncovered patterns showing that instantaneous changes in the velocity, when the build platform accelerates and decelerates, largely influence the positional errors, especially in the X- axis due to the hardware architecture. Since DIW systems share similar mechatronic inputs and outputs, our study protocol approach is broadly applicable and scalable across multiple systems. Graphical abstract

36 MATERIALS SCIENCE↗

A compact low-level RF control system for advanced concept compact electron linear accelerator

A compact low-level RF (LLRF) control system based on RF system-on-chip (RFSoC) technology has been designed for the Advanced Concept Compact Electron Linear-accelerator (ACCEL) program, which has challenging requirements in both RF performance and size, weight, and power consumption (SWaP). The compact LLRF solution employs the direct RF sampling technique of RFSoC, which samples the RF signals directly without any analog upconversion and downconversion. Compared with the conventional heterodyne based architecture used for the LLRF system of a linear accelerator (LINAC), the elimination of analog mixers can significantly reduce the size and weight of the system, especially with LINAC requiring a larger number of RF channels. Based on the requirements of ACCEL, a prototype LLRF platform has been developed, and the control schemes have been proposed. The prototype LLRF system demonstrated magnitude and phase fluctuation levels below 1% and 1° on the flattop of a 2 μs RF pulse. The LLRF control schemes proposed for ACCEL are implemented with a prototype hardware platform. In conclusion, this paper will introduce the new compact LLRF solution and summarize a selection of experimental test results of the prototype itself and with the accelerating structure cavities designed for ACCEL.

Liu, C. [SLAC National Accelerator Laboratory (SLA↗

Lifetime extension of legacy CEBAF LLRF hardware

A significant portion of the Low-Level Radio Frequency (LLRF) hardware in Jefferson Lab’s CEBAF is from the original construction of the facility using 1980’s CAMAC technology. Of the fifty-three zones in CEBAF, thirty-six of them are legacy hardware. The age of the legacy system has led to difficulties in maintaining the hardware due to parts going obsolete without suitable drop in replacements. Continued operation of the legacy system is required as the installation of LLRF 3.0 systems is costly and cannot be completed in a short period of time with the available resources. The most pressing failure in the legacy system was a failing buffer card, which is responsible for communication between the EPICs network and individual RF control modules. A new buffer card was designed as a transparent, drop in, replacement so that upgrades are simply a matter of swapping the existing legacy hardware. This buffer card upgrades a single point failure component and promises to extend the operable lifetime of CEBAF’s legacy systems.

Accelerator Physics↗

Modular autopilot design and development featuring bayesian non-parametric adaptive control

According to an embodiment, there is provided an onboard integrated computational system for an unmanned aircraft system (“Stabilis” autopilot). This is an integrated suite of hardware, software, and data-to-decisions services that are designed to meet the needs of business and research developers of UAS. Stabilis is designed to accelerate the development of any UAS platform and avionics system; it does so with hardware modularity and software adaptation. The Stabilis offers multiple technological advantages technological advantages including: Plug-and-adapt functionality; Data-to-decisions capability; and, On board parallelization capability.

97 MATHEMATICS AND COMPUTING↗

Results of the first implementation of RF phase signature matching at LANSCE

The LINAC at the Los Alamos Neutron Science Center (LANSCE) has been utilizing the Delta-t method to match the RF cavities to the design acceleration parameters since its commissioning in 1972. The differences in time-of-flight between two subsequent Beam Position and Phase Monitors (BPPMs) are measured with both accelerated and drifting beams, depending on the whether the module is set to on or off. The algorithm optimizes the module amplitude and phase via iterative measurements if the initial phase is in the vicinity of the design value. With an upgrade to a faster readout system, a scan over the whole RF cavity phase range requires relatively less time than the classical optimization procedure. The Phase Scan Signature Matching (PSSM) method provides a time-efficient method that ensures the phase selection lands on the bunching side and empowers future analyses to build module-specific models. The PSSM also utilizes a direct model to determine the correct amplitude to sub-percent level instead of using linearized matrices. Furthermore, lacking a reliable energy measurement method in the LINAC, we measure the beam phases at two downstream locations to increase the precision of energy measurements. In this letter, we also discuss the sensitivities of PSSM, error propagation, and the implementation results for the 2019 and 2020 beam cycles.

47 OTHER INSTRUMENTATION↗

Converter-Interfaced CHP Plant for Improved Grid-Integration, Flexibility and Resiliency

GE Research and its partner GE Renewables have proposed the use of an interface converter solution to increase the penetration of small to medium-sized CHP (1MWe to 20MWe) into distribution grids and improve their flexibility and grid support capability. Indeed, the proposed interface converter solution thanks to presence of the grid-ready inverter, allows to streamline the compliance to grid codes requirements, reduce the interconnection delays and costs and ultimately one of the main barriers for CHP adoption by commercial and industrial facilities. An additional benefit provided by the interface converter is the use of the grid-ready inverter for reactive power which eliminates the need of sizing the generator for that capability. These two benefits highly favor the economic feasibility of converter-interfaced CHP. Five user cases, each in one of the leading U.S states for CHP potential reported by the DOE in its estimation of the U.S Technical Potential of CHP, were selected to compare the economic performances of converter-interfaced CHP as compared with directly-coupled. They include a college campus in California, a hospital in New York, a water reclamation plant in Texas, a hotel in Minnesota, and a large office building in Pennsylvania. Results showed that, the presence of the interface converter allows to increase the return on investment (ROI) by 0.5 to 2 percentage points in most of the cases (4 of 5). Indeed, the interface converter by shortening the interconnection process allows to accelerate revenues while reducing interconnection costs. Added to the reduced cost of the required generator these savings trade favorably the capital cost of the converter. The analysis also showed that the profitability of the converter-interfaced CHP is highly sensitive to the energy price, interconnection delay, and converter cost. However, it appears that if the interface converter can shorten the interconnection process by at least 6 months, adopting this solution will be more economically viable than directly-coupled configuration in almost all the +23,000 sites of the U.S Technical Potential CHP. The evaluation of the benefits of a converter-interfaced CHP also showed that it enables higher ROI when coupled with other distributed energy resources (DER) such as battery energy systems (BESS) or solar photovoltaic (PV). Indeed, in those scenario, the grid-ready inverter included in the interface converter eliminates the need of separate inverters if DC-coupling is used. On the technical performance, it has been verified that the presence of the interface converter allows to reduce by 70% to 80% the CHP short-circuit contribution to grid faults. This not only reduces the mechanical and thermal stresses exposed to the CHP electrical components but also increases the grid hosting capacity which ultimately enables higher penetrations CHP. Another key benefit of the interface converter validated with hardware-in-the-loop simulations and testing is its superior capability for reactive power support. Indeed, using a power hardware testbed with two +700kW inverters configured in back-to-back, a microgrid controller and actual facilities loads it was demonstrated that the presence of the interface converter can help maintain a power factor near ~1 or regulate the voltage to ~1.0pu at the point of common coupling. This benefit can be highly valuable if in the future, due to higher penetration of renewable distributed energy resources (DER), utilities start billing demand charge based on kVA instead of kW as currently. It was also validated that converter-interfaced CHP can dispatch heat and power commands and seamlessly switch between the two modes while consistently controlling the power factor or voltage at PCC. Indeed, the power hardware testing showed that grid-connected converter-interfaced CHP can follow either the power or heat demand while maintaining a unity power factor at converter output. This research proved that the adoption of an interface converter as the solution for interconnection of CHP system into the distribution grid can greatly improve the economic feasibility of small to medium-sized CHP as well as the plant power quality, flexibility and resiliency. Additionally, it allows increased penetrations of CHP into the distribution grid, extends their grid support capability, and facilitates the integration of BESS and PV DER by streamlining their collocation within the same facilities. This ultimately provides an opportunity for commercial and small industrial facilities in the U.S to accelerate their energy transition thanks to the high energy efficiency of CHP systems and its reliable, flexible, and resilient microgrid operation when interconnected with an interface converter.

24 POWER TRANSMISSION AND DISTRIBUTION↗

Disentangling Beam Losses in The Fermilab Main Injector Enclosure Using Real-Time Edge AI

The Fermilab Main Injector enclosure houses two accelerators, the Main Injector and Recycler Ring. During normal operation, high intensity proton beams exist simultaneously in both. The two accelerators share the same beam loss monitors (BLM) and monitoring system. Deciphering the origin of any of the 260 BLM readings is often difficult. The (Accelerator) Real-time Edge AI for Distributed Systems project, or READS, has developed an AI/ML model, and implemented it on fast FPGA hardware, that disentangles mixed beam losses and attributes probabilities to each BLM as to which machine(s) the loss originated from in real-time. The model inferences are then streamed to the Fermilab accelerator controls network (ACNET) where they are available for operators and experts alike to aid in tuning the machines.

43 PARTICLE ACCELERATORS↗

Characterizing the Impact of GPU Power Management on an Exascale System

As GPU-accelerated high-performance computing (HPC) systems approach exascale performance, controlling energy consumption without compromising throughput is essential. Architectures such as the AMD MI250X-based Frontier supercomputer provide runtime mechanisms like frequency and power capping, enabling energy tuning without modifying application code. Although both target energy reduction, they operate via distinct hardware control paths and influence workloads differently. We present a comprehensive evaluation of these strategies on a leadership-class system using diverse HPC proxy applications representative of production workloads. Our study analyzes performance–energy trade-offs across multiple capping levels, node counts (1 and 32), and application profiles. Results show that frequency capping generally achieves higher energy efficiency and scalability, with gains of up to 13.2% without performance loss, while power capping is more effective for single-node runs or bursty GPU utilization. We also provide practical guidelines to help system administrators and users balance energy efficiency and performance in large-scale scientific workloads.

Costa, Mariana [Universidade Federal do Rio Grande↗

JLAB LLRF 3.0 Development and Tests

The Jefferson Lab LLRF 3.0 system is being developed to replace legacy LLRF systems in the CEBAF accelerator. The new design builds upon 25 years of design and operational RF control experience, and our recent collaboration in the design of the LCLSII LLRF system. The new cavity control algorithm is a fully functional phase and amplitude locked Self Exciting Loop (SEL). This paper discusses the progress of the LLRF 3.0 hardware design, FPGA firmware development, User Datagram Protocol (UDP) operation, and recent LLRF 3.0 system tests on the CEBAF Booster cryomodule in the Upgrade Injector Test Facility (UITF).

Plawski, T. E.↗