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NASA NTRS1999

Design of the Wind Tunnel Model Communication Controller Board

The NASA Langley Research Center's Wind Tunnel Reinvestment project plans to shrink the existing data acquisition electronics to fit inside a wind tunnel model. Space limitations within a model necessitate a distributed system of Application Specific Integrated Circuits (ASICs) rather than a centralized system based on PC boards. This thesis will focus on the design of the prototype of the communication Controller board. A portion of the communication Controller board is to be used as the basis of an ASIC design. The communication Controller board will communicate between the internal model modules and the external data acquisition computer. This board is based around an Field Programmable Gate Array (FPGA), to allow for reconfigurability. In addition to the FPGA, this board contains buffer Random Access Memory (RAM), configuration memory (EEPROM), drivers for the communications ports, and passive components.

Wilson, William C.↗

NASA NTRS2011

S-Band POSIX Device Drivers for RTEMS

This is a set of POSIX device driver level abstractions in the RTEMS RTOS (Real-Time Executive for Multiprocessor Systems real-time operating system) to SBand radio hardware devices that have been instantiated in an FPGA (field-programmable gate array). These include A/D (analog-to-digital) sample capture, D/A (digital-to-analog) sample playback, PLL (phase-locked-loop) tuning, and PWM (pulse-width-modulation)-controlled gain. This software interfaces to Sband radio hardware in an attached Xilinx Virtex-2 FPGA. It uses plug-and-play device discovery to map memory to device IDs. Instead of interacting with hardware devices directly, using direct-memory mapped access at the application level, this driver provides an application programming interface (API) offering that easily uses standard POSIX function calls. This simplifies application programming, enables portability, and offers an additional level of protection to the hardware. There are three separate device drivers included in this package: sband_device (ADC capture and DAC playback), pll_device (RF front end PLL tuning), and pwm_device (RF front end AGC control).

Lux, James P.↗

NASA NTRS1989

Raster Metafile and Raster Metafile Translator

The intent is to present an effort undertaken at NASA Langley Research Center to design a generic raster image format and to develop tools for processing images prepared in this format. Both the Raster Metafile (RM) format and the Raster Metafile Translator (RMT) are addressed. This document is intended to serve a varied audience including: users wishing to display and manipulate raster image data, programmers responsible for either interfacing the RM format with other raster formats or for developing new RMT device drivers, and programmers charged with installing the software on a host platform.

Taylor, Nancy L.↗

NASA NTRS1993

Cryogenic measurements of aerojet GaAs n-JFETs

The spectral noise characteristics of Aerojet gallium arsenide (GaAs) junction field effect transistors (JFET's) have been investigated down to liquid-helium temperatures. Noise characterization was performed with the field effect transistor (FET) in the floating-gate mode, in the grounded-gate mode to determine the lowest noise readings possible, and with an extrinsic silicon photodetector at various detector bias voltages to determine optimum operating conditions. The measurements indicate that the Aerojet GaAs JFET is a quiet and stable device at liquid helium temperatures. Hence, it can be considered a readout line driver or infrared detector preamplifier as well as a host of other cryogenic applications. Its noise performance is superior to silicon (Si) metal oxide semiconductor field effect transistor (MOSFET's) operating at liquid helium temperatures, and is equal to the best Si n channel junction field effect transistor (n-JFET's) operating at 300 K.

Goebel, John H.↗

NASA NTRS2011

Digital Interface Board to Control Phase and Amplitude of Four Channels

An increasing number of parts are designed with digital control interfaces, including phase shifters and variable attenuators. When designing an antenna array in which each antenna has independent amplitude and phase control, the number of digital control lines that must be set simultaneously can grow very large. Use of a parallel interface would require separate line drivers, more parts, and thus additional failure points. A convenient form of control where single-phase shifters or attenuators could be set or the whole set could be programmed with an update rate of 100 Hz is needed to solve this problem. A digital interface board with a field-programmable gate array (FPGA) can simultaneously control an essentially arbitrary number of digital control lines with a serial command interface requiring only three wires. A small set of short, high-level commands provides a simple programming interface for an external controller. Parity bits are used to validate the control commands. Output timing is controlled within the FPGA to allow for rapid update rates of the phase shifters and attenuators. This technology has been used to set and monitor eight 5-bit control signals via a serial UART (universal asynchronous receiver/transmitter) interface. The digital interface board controls the phase and amplitude of the signals for each element in the array. A host computer running Agilent VEE sends commands via serial UART connection to a Xilinx VirtexII FPGA. The commands are decoded, and either outputs are set or telemetry data is sent back to the host computer describing the status and the current phase and amplitude settings. This technology is an integral part of a closed-loop system in which the angle of arrival of an X-band uplink signal is detected and the appropriate phase shifts are applied to the Ka-band downlink signal to electronically steer the array back in the direction of the uplink signal. It will also be used in the non-beam-steering case to compensate for phase shift variations through power amplifiers. The digital interface board can be used to set four 5-bit phase shifters and four 5-bit attenuators and monitor their current settings. Additionally, it is useful outside of the closed-loop system for beamsteering alone. When the VEE program is started, it prompts the user to initialize variables (to zero) or skip initialization. After that, the program enters into a continuous loop waiting for the telemetry period to elapse or a button to be pushed. A telemetry request is sent when the telemetry period is elapsed (every five seconds). Pushing one of the set or reset buttons will send the appropriate command. When a command is sent, the interface status is returned, and the user will be notified by a pop-up window if any error has occurred. The program runs until the End Program button is depressed.

Smith, Amy E.↗

NASA NTRS1992

Cryogenic measurements of aerojet GaAs n-JFETs

The spectral noise characteristics of Aerojet GaAs n-JFETs have been investigated down to liquid helium temperatures. Voltage noise characterization was performed with the FET in 1) the floating gate mode, 2) the grounded gate mode to determine the lowest noise readings possible and 3) with an extrinsic silicon photodetector at various detector bias voltages, to determine optimum operating conditions. Current noise characterization was measured at the drain in the temperature range 300 to 77 K. Device design and MBE processing are described. Static I-V characterization is done at 300, 77 and 6 K. The measurements indicate that the Aerojet GaAs n-JFET is a quiet and stable device at liquid helium temperatures. Hence, it can be considered as a readout line driver or infrared detector preamplifier as well as a host of other cryogenic applications. Its noise performance is superior to that of Si MOSFETs operating at liquid helium temperatures, and is equal to the best Si n-JFETs operating at 300 K.

Goebel, John H.↗

NASA NTRS1975

The 1.06 micrometer wideband laser modulator: Fabrication and life testing

The design, fabrication, testing and delivery of an optical modulator which will operate with a mode-locked Nd:YAG laser at 1.06 micrometers were performed. The system transfers data at a nominal rate of 400 Mbps. This wideband laser modulator can transmit either Pulse Gated Binary Modulation (PGBM) or Pulse Polarization Binary Modulation (PPBM) formats. The laser beam enters the modulator and passes through both crystals; approximately 1% of the transmitted beam is split from the main beam and analyzed for the AEC signal; the remaining part of the beam exits the modulator. The delivered modulator when initially aligned and integrated with laser and electronics performed very well. The optical transmission was 69.5%. The static extinction ratio was 69:1. A 1000 hour life test was conducted with the delivered modulator. A 63 bit pseudorandom code signal was used as a driver input. At the conclusion of the life test the modulator optical transmission was 71.5% and the static extinction ratio 65:1.

Teague, J. R.↗

NASA NTRS2015

Relativistic Electron Response to the Combined Magnetospheric Impact of a Coronal Mass Ejection Overlapping with a High-Speed Stream: Van Allen Probes Observations

During early November 2013, the magnetosphere experienced concurrent driving by a coronal mass ejection (CME) during an ongoing high-speed stream (HSS) event. The relativistic electron response to these two kinds of drivers, i.e., HSS and CME, is typically different, with the former often leading to a slower buildup of electrons at larger radial distances, while the latter energizing electrons rapidly with flux enhancements occurring closer to the Earth. We present a detailed analysis of the relativistic electron response including radial profiles of phase space density as observed by both Magnetic Electron and Ion Sensor (MagEIS) and Relativistic Electron Proton Telescope instruments on the Van Allen Probes mission. Data from the MagEIS instrument establish the behavior of lower energy (<1 MeV) electrons which span both intermediary and seed populations during electron energization. Measurements characterizing the plasma waves and magnetospheric electric and magnetic fields during this period are obtained by the Electric and Magnetic Field Instrument Suite and Integrated Science instrument on board Van Allen Probes, Search Coil Magnetometer and Flux Gate Magnetometer instruments on board Time History of Events and Macroscale Interactions during Substorms, and the low-altitude Polar-orbiting Operational Environmental Satellites. These observations suggest that during this time period, both radial transport and local in situ processes are involved in the energization of electrons. The energization attributable to radial diffusion is most clearly evident for the lower energy (<1 MeV) electrons, while the effects of in situ energization by interaction of chorus waves are prominent in the higher-energy electrons.

Magnetosphere↗

NASA NTRS2011

Measuring Input Thresholds on an Existing Board

A critical PECL (positive emitter-coupled logic) interface to Xilinx interface needed to be changed on an existing flight board. The new Xilinx input interface used a CMOS (complementary metal-oxide semiconductor) type of input, and the driver could meet its thresholds typically, but not in worst-case, according to the data sheet. The previous interface had been based on comparison with an external reference, but the CMOS input is based on comparison with an internal divider from the power supply. A way to measure what the exact input threshold was for this device for 64 inputs on a flight board was needed. The measurement technique allowed an accurate measurement of the voltage required to switch a Xilinx input from high to low for each of the 64 lines, while only probing two of them. Directly driving an external voltage was considered too risky, and tests done on any other unit could not be used to qualify the flight board. The two lines directly probed gave an absolute voltage threshold calibration, while data collected on the remaining 62 lines without probing gave relative measurements that could be used to identify any outliers. The PECL interface was forced to a long-period square wave by driving a saturated square wave into the ADC (analog to digital converter). The active pull-down circuit was turned off, causing each line to rise rapidly and fall slowly according to the input s weak pull-down circuitry. The fall time shows up as a change in the pulse width of the signal ready by the Xilinx. This change in pulse width is a function of capacitance, pulldown current, and input threshold. Capacitance was known from the different trace lengths, plus a gate input capacitance, which is the same for all inputs. The pull-down current is the same for all inputs including the two that are probed directly. The data was combined, and the Excel solver tool was used to find input thresholds for the 62 lines. This was repeated over different supply voltages and temperatures to show that the interface had voltage margin under all worst case conditions. Gate input thresholds are normally measured at the manufacturer when the device is on a chip tester. A key function of this machine was duplicated on an existing flight board with no modifications to the nets to be tested, with the exception of changes in the FPGA program.

Kuperman, Igor↗