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NASA NTRS1988

Comparison of results from simple expressions for MOSFET parameter extraction

In this paper results are compared from a parameter extraction procedure applied to the linear, saturation, and subthreshold regions for enhancement-mode MOSFETs fabricated in a 3-micron CMOS process. The results indicate that the extracted parameters differ significantly depending on the extraction algorithm and the distribution of I-V data points. It was observed that KP values vary by 30 percent, VT values differ by 50 mV, and Delta L values differ by 1 micron. Thus for acceptance of wafers from foundries and for modeling purposes, the extraction method and data point distribution must be specified. In this paper measurement and extraction procedures that will allow a consistent evaluation of measured parameters are discussed.

Buehler, M. G.↗

NASA NTRS1993

Macro, mini, micro and nano (M(sup 3)N) technologies for the future

Microelectromechanical systems (MEMS), micro systems technologies (MST), and micromanufacturing are relatively recent phrases or acronyms that have become synonymous with the design, development, and manufacture of 'micro' devices and systems. Micromanufacturing encompasses MEMS or MST and, in addition, includes all of the processes involved in the production of micro things. Integration of mechanical and electrical components, including built-in computers, can be formed into systems which must be connected to the macroworld. Macro, mini, micro, and nano technologies are all a part of MEMS or micromanufacturing. At this point in the development of the technology, it is becoming apparent that mini systems, with micro components, could very well be the economic drivers of the technology for the foreseeable future. Initial research in the fabrication of microdevices using IC processing technology took place over thirty years ago. Anisotropic etching of silicon was used to produce piezoresistive diaphragms. Since the early 60's, there has been gradual progress in MEMS until the early 1980's when worldwide interest in the technology really started to develop. During this time high aspect ratio micromachining using x rays was started in Germany. In 1987 the concept of a 'silicon micromechanics foundry' was proposed. Since then the interest in the U.S., Germany, and Japan has increased to the point where hundreds of millions of dollars of research monies are being funneled into the technology (at least in Germany and Japan) and the technology has been classified as critical or as a technology or national importance by the U.S. government.

Friedrich, Craig R.↗

NASA NTRS1993

Radiation hardened microprocessor for small payloads

The RH-3000 program is developing a rad-hard space qualified 32-bit MIPS R-3000 RISC processor under the Naval Research Lab sponsorship. In addition, under IR&D Harris is developing RHC-3000 for embedded control applications where low cost and radiation tolerance are primary concerns. The development program leverages heavily from commercial development of the MIPS R-3000. The commercial R-3000 has a large installed user base and several foundry partners are currently producing a wide variety of R-3000 derivative products. One of the MIPS derivative products, the LR33000 from LSI Logic, was used as the basis for the design of the RH-3000 chipset. The RH-3000 chipset consists of three core chips and two support chips. The core chips include the CPU, which is the R-3000 integer unit and the FPA/MD chip pair, which performs the R-3010 floating point functions. The two support whips contain all the support functions required for fault tolerance support, real-time support, memory management, timers, and other functions. The Harris development effort had first passed silicon success in June, 1992 with the first rad-hard 32-bit RH-3000 CPU chip. The CPU device is 30 kgates, has a 508 mil by 503 mil die size and is fabricated at Harris Semiconductor on the rad-hard CMOS Silicon on Sapphire (SOS) process. The CPU device successfully passed tesing against 600,000 test vectors derived directly on the LSI/MIPS test suite and has been operational as a single board computer running C code for the past year. In addition, the RH-3000 program has developed the methodology for converting commercially developed designs utilizing logic synthesis techniques based on a combination of VHDK and schematic data bases.

Shah, Ravi↗

NASA NTRS1989

Product assurance technology for procuring reliable, radiation-hard, custom LSI/VLSI electronics

Advanced measurement methods using microelectronic test chips are described. These chips are intended to be used in acquiring the data needed to qualify Application Specific Integrated Circuits (ASIC's) for space use. Efforts were focused on developing the technology for obtaining custom IC's from CMOS/bulk silicon foundries. A series of test chips were developed: a parametric test strip, a fault chip, a set of reliability chips, and the CRRES (Combined Release and Radiation Effects Satellite) chip, a test circuit for monitoring space radiation effects. The technical accomplishments of the effort include: (1) development of a fault chip that contains a set of test structures used to evaluate the density of various process-induced defects; (2) development of new test structures and testing techniques for measuring gate-oxide capacitance, gate-overlap capacitance, and propagation delay; (3) development of a set of reliability chips that are used to evaluate failure mechanisms in CMOS/bulk: interconnect and contact electromigration and time-dependent dielectric breakdown; (4) development of MOSFET parameter extraction procedures for evaluating subthreshold characteristics; (5) evaluation of test chips and test strips on the second CRRES wafer run; (6) two dedicated fabrication runs for the CRRES chip flight parts; and (7) publication of two papers: one on the split-cross bridge resistor and another on asymmetrical SRAM (static random access memory) cells for single-event upset analysis.

Buehler, M. G.↗