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Digital filter design for radar image formation

Novel weighted-least-squares approaches to the design of digital filters for SAR applications are presented. The filters belong to three different categories according to their combinations of minimax passband, least-squares stopband, minimax stopband, and maximally-flat passband. For real-time applications, it is important to design the sets of digital filter coefficient tables in an offline environment; the appropriate precomputed filter is then selected for each SAR signal-processing function, as a function of both mode and mapping geometry during real-time processing.

Adams, John W.

The design of digital filters

Digital filter design program capable of generating discrete representations for continuous filters - digital computer

ELECTRONIC FILTER

Distributed digital signal processors for multi-body structures

Several digital filter designs were investigated which may be used to process sensor data from large space structures and to design digital hardware to implement the distributed signal processing architecture. Several experimental tests articles are available at NASA Langley Research Center to evaluate these designs. A summary of some of the digital filter designs is presented, an evaluation of their characteristics relative to control design is discussed, and candidate hardware microcontroller/microcomputer components are given. Future activities include software evaluation of the digital filter designs and actual hardware inplementation of some of the signal processor algorithms on an experimental testbed at NASA Langley.

Lee, Gordon K.

Design Language for Digital Systems

Digital Systems Design Language (DDL) is convenient hardware description language for developing and testing digital designs and for inputting design details into design automation system. Describes digital systems at gate, register transfer, and combinational block levels. DDL-based programs written in FORTRAN IV for batch execution.

Shiva, S. G.

Aircraft digital control design methods

Investigations were conducted in two main areas: the first area is control system design, and the goals were to define the limits of 'digitized S-Plane design techniques' vs. sample rate, to show the results of a 'direct digital design technique', and to compare the two methods; the second area was to evaluate the roughness of autopilot designs parametrically versus sample rate. Goals of the first area were addressed by (1) an analysis of a 2nd order example using both design methods, (2) a linear analysis of the complete 737 aircraft with an autoland obtained using the digitized S-plane technique, (3) linear analysis of a high frequency 737 approximation with the autoland from a direct digital design technique, and (4) development of a simulation for evaluation of the autopilots with disturbances and nonlinearities included. Roughness evaluation was studied by defining an experiment to be carried out on the Langley motion simulator and coordinated with analysis at Stanford.

Tashker, M. G.

Computer aided design of digital controller for radial active magnetic bearings

A five degree of freedom Active Magnetic Bearing (AMB) system is developed which is controlled by digital controllers. The model of the radial AMB system is linearized and the state equation is derived. Based on the state variables feedback theory, digital controllers are designed. The performance of the controllers are evaluated according to experimental results. The Computer Aided Design (CAD) method is used to design controllers for magnetic bearings. The controllers are implemented with a digital signal processing (DSP) system. The control algorithms are realized with real-time programs. It is very easy to change the controller by changing or modifying the programs. In order to identify the dynamic parameters of the controlled magnetic system, a special experiment was carried out. Also, the online Recursive Least Squares (RLS) parameter identification method is studied. It can be realized with the digital controllers. Online parameter identification is essential for the realization of an adaptive controller.

Cai, Zhong

Digital avionics design and reliability analyzer

The description and specifications for a digital avionics design and reliability analyzer are given. Its basic function is to provide for the simulation and emulation of the various fault-tolerant digital avionic computer designs that are developed. It has been established that hardware emulation at the gate-level will be utilized. The primary benefit of emulation to reliability analysis is the fact that it provides the capability to model a system at a very detailed level. Emulation allows the direct insertion of faults into the system, rather than waiting for actual hardware failures to occur. This allows for controlled and accelerated testing of system reaction to hardware failures. There is a trade study which leads to the decision to specify a two-machine system, including an emulation computer connected to a general-purpose computer. There is also an evaluation of potential computers to serve as the emulation computer.

Source record

Computerized logic design of digital circuits

Procedure performs all work required for logic design of digital counters or sequential circuits and simplification of Boolean expressions. Program provides simple, accurate, and comprehensive logic design capability to users both experienced and totally inexperienced in logic design

Gussow, S.

Digital filter design

Numerical algorithms for converting digital computer into low pass or band pass digital filter

LOW PASS FILTER

Aircraft digital control design methods

Variations in design methods for aircraft digital flight control are evaluated and compared. The methods fall into two categories; those where the design is done in the continuous domain (or s plane) and those where the design is done in the discrete domain (or z plane). Design method fidelity is evaluated by examining closed loop root movement and the frequency response of the discretely controlled continuous aircraft. It was found that all methods provided acceptable performance for sample rates greater than 10 cps except the uncompensated s plane design method which was acceptable above 20 cps. A design procedure based on optimal control methods was proposed that provided the best fidelity at very slow sample rates and required no design iterations for changing sample rates.

Powell, J. D.

The scheme machine: A case study in progress in design derivation at system levels

The Scheme Machine is one of several design projects of the Digital Design Derivation group at Indiana University. It differs from the other projects in its focus on issues of system design and its connection to surrounding research in programming language semantics, compiler construction, and programming methodology underway at Indiana and elsewhere. The genesis of the project dates to the early 1980's, when digital design derivation research branched from the surrounding research effort in programming languages. Both branches have continued to develop in parallel, with this particular project serving as a bridge. However, by 1990 there remained little real interaction between the branches and recently we have undertaken to reintegrate them. On the software side, researchers have refined a mathematically rigorous (but not mechanized) treatment starting with the fully abstract semantic definition of Scheme and resulting in an efficient implementation consisting of a compiler and virtual machine model, the latter typically realized with a general purpose microprocessor. The derivation includes a number of sophisticated factorizations and representations and is also deep example of the underlying engineering methodology. The hardware research has created a mechanized algebra supporting the tedious and massive transformations often seen at lower levels of design. This work has progressed to the point that large scale devices, such as processors, can be derived from first-order finite state machine specifications. This is roughly where the language oriented research stops; thus, together, the two efforts establish a thread from the highest levels of abstract specification to detailed digital implementation. The Scheme Machine project challenges hardware derivation research in several ways, although the individual components of the system are of a similar scale to those we have worked with before. The machine has a custom dual-ported memory to support garbage collection. It consists of four tightly coupled processes--processor, collector, allocator, memory--with a very non-trivial synchronization relationship. Finally, there are deep issues of representation for the run-time objects of a symbolic processing language. The research centers on verification through integrated formal reasoning systems, but is also involved with modeling and prototyping environments. Since the derivation algebra is basd on an executable modeling language, there is opportunity to incorporate design animation in the design process. We are looking for ways to move smoothly and incrementally from executable specifications into hardware realization. For example, we can run the garbage collector specification, a Scheme program, directly against the physical memory prototype, and similarly, the instruction processor model against the heap implementation.

Johnson, Steven D.

Lunar Reconnaissance Orbiter (LRO) Command and Data Handling Flight Electronics Subsystem

A document describes a high-performance, modular, and state-of-the-art Command and Data Handling (C&DH) system developed for use on the Lunar Reconnaissance Orbiter (LRO) mission. This system implements a complete hardware C&DH subsystem in a single chassis enclosure that includes a processor card, 48 Gbytes of solid-state recorder memory, data buses including MIL-STD-1553B, custom RS-422, SpaceWire, analog collection, switched power services, and interfaces to the Ka-Band and S-Band RF communications systems. The C&DH team capitalized on extensive experience with hardware and software with PCI bus design, SpaceWire networking, Actel FPGA design, digital flight design techniques, and the use of VxWorks for the real-time operating system. The resulting hardware architecture was implemented to meet the LRO mission requirements. The C&DH comprises an enclosure, a backplane, a low-voltage power converter, a single-board computer, a communications interface board, four data storage boards, a housekeeping and digital input/output board, and an analog data acquisition board. The interfaces between the C&DH and the instruments and avionics are connected through a SpaceWire network, a MIL-STD-1553 bus, and a combination of synchronous and asynchronous serial data transfers over RS-422 and LVDS (low-voltage differential-signaling) electrical interfaces. The C&DH acts as the spacecraft data system with an instrument data manager providing all software and internal bus scheduling, ingestion of science data, distribution of commands, and performing science operations in real time.

Nguyen, Quang

Digital Modem Design Based on Multirate Filter Banks

A new approach for the architecture of an all digital modem design is presented. The key feature is a lower processing rate than that of the Nyquist rate (the input sampling rate) and even the symbol rate. The lower processing rate is achieved by the use of a parallel structure, based on multirate filter banks concepts. In this proposed scheme, matched filtering is implemented in the subbands of an analysis/synthesis filter bank.

digital modem design