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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 37 records · Page 2
All sourcesNASA NTRSDOE OSTI
NASA NTRS1987

0.87-micron CSP diode lasers for spaceborne communications

Index-guided channeled-substrate-planar (CSP) AlGaAs diode lasers are being developed for reliable, high-power operation for use as sources in spaceborne optical communications systems. Although most work on this AlGaAs structure has been aimed at optimizing performance at output wavelengths less than 8400 A, emission in the 8700 A regime is also of interest. In particular, such wavelengths are required for use in the direct detection laser transceiver to be incorporated into NASA's advanced communications technology satellite, in order to avoid absorption of the light by the atmosphere when communicating with ground-based terminals. Lowest order spatial mode and substantially single longitudinal mode output has been observed in 0.87-micron CSP devices in excess of 50 mW cw and 100 mW 50 percent duty-cycle, with rms phase-front aberrations measured to be about lambda/40.

Carlin, D. B.↗
NASA NTRS1992

Double-Current-Confined CSP Laser

Improved channeled-substrate-planar (CSP) lasers that emit at wavelengths between 860 and 880 nm grown by liquid-phase epitaxy (LPE). Exhibit record high output powers and efficiencies, attained without sacrifice of desirable characteristics of lasers. In fabrication, second reverse-bias p/n junction incorporated to reduce required current. By incorporating two reverse-bias junctions in CSP structure, one doubly confines current. Lasers used eventually as sources of light in intersatellite communications systems and, specifically, NASA Advanced Communications Technology Satellite (ACTS) System.

Connolly, John C.↗
NASA NTRS2000

CSP Manufacturing Challenges and Assembly Reliability

Although the expression of CSP is widely used by industry from suppliers to users, its implied definition had evolved as the technology has matured. There are "expert definition"- package that is up to 1.5 time die- or "interim definition". CSPs are miniature new packages that industry is starting to implement and there are many unresolved technical issues associated with their implementation. For example, in early 1997, packages with 1 mm pitch and lower were the dominant CSPs, whereas in early 1998 packages with 0.8 mm and lower became the norm for CSPs. Other changes included the use of flip chip die rather than wire bond in CSP. Nonetheless the emerging CSPs are competing with bare die assemblies and are becoming the package of choice for size reduction applications. These packages provide the benefits of small size and performance of the bare die or flip chip, with the advantage of standard die packages. The JPL-led MicrotypeBGA Consortium of enterprises representing government agencies and private companies have jointed together to pool in-kind resources for developing the quality and reliability of chip scale packages (CSPs) for a variety of projects. This talk will cover specifically the experience of our consortium on technology implementation challenges, including design and build of both standard and microvia boards, assembly of two types of test vehicles, and the most current environmental thermal cycling test results.

Ghaffarian, Reza↗
NASA NTRS2009

Machine-Checkable Timed CSP

The correctness of safety-critical embedded software is crucial, whereas non-functional properties like deadlock-freedom and real-time constraints are particularly important. The real-time calculus Timed Communicating Sequential Processes (CSP) is capable of expressing such properties and can therefore be used to verify embedded software. In this paper, we present our formalization of Timed CSP in the Isabelle/HOL theorem prover, which we have formulated as an operational coalgebraic semantics together with bisimulation equivalences and coalgebraic invariants. Furthermore, we apply these techniques in an abstract specification with real-time constraints, which is the basis for current work in which we verify the components of a simple real-time operating system deployed on a satellite.

Goethel, Thomas↗
NASA NTRS2013

SequenceL: Automated Parallel Algorithms Derived from CSP-NT Computational Laws

With the introduction of new parallel architectures like the cell and multicore chips from IBM, Intel, AMD, and ARM, as well as the petascale processing available for highend computing, a larger number of programmers will need to write parallel codes. Adding the parallel control structure to the sequence, selection, and iterative control constructs increases the complexity of code development, which often results in increased development costs and decreased reliability. SequenceL is a high-level programming language that is, a programming language that is closer to a human s way of thinking than to a machine s. Historically, high-level languages have resulted in decreased development costs and increased reliability, at the expense of performance. In recent applications at JSC and in industry, SequenceL has demonstrated the usual advantages of high-level programming in terms of low cost and high reliability. SequenceL programs, however, have run at speeds typically comparable with, and in many cases faster than, their counterparts written in C and C++ when run on single-core processors. Moreover, SequenceL is able to generate parallel executables automatically for multicore hardware, gaining parallel speedups without any extra effort from the programmer beyond what is required to write the sequen tial/singlecore code. A SequenceL-to-C++ translator has been developed that automatically renders readable multithreaded C++ from a combination of a SequenceL program and sample data input. The SequenceL language is based on two fundamental computational laws, Consume-Simplify- Produce (CSP) and Normalize-Trans - pose (NT), which enable it to automate the creation of parallel algorithms from high-level code that has no annotations of parallelism whatsoever. In our anecdotal experience, SequenceL development has been in every case less costly than development of the same algorithm in sequential (that is, single-core, single process) C or C++, and an order of magnitude less costly than development of comparable parallel code. Moreover, SequenceL not only automatically parallelizes the code, but since it is based on CSP-NT, it is provably race free, thus eliminating the largest quality challenge the parallelized software developer faces.

Cooke, Daniel↗
DOE OSTI2024

Wind Loading on CSP Collectors

The project significantly enhanced the community's understanding of the fundamental physics drivers underlying the wind-loading experienced by concentrating solar power (CSP) collector structures (i.e., parabolic troughs and heliostats) as well as their support structures. This project had two overarching objectives: (1) detailed measurements to characterize the prevailing wind conditions and resulting operational loads on collector structures, and (2) development and validation of a computationally efficient, high-fidelity modeling tool capable of predicting wind-loading in deep-array installations. Over three years, we conducted comprehensive at-scale field measurements of the atmospheric turbulent wind conditions, and the resulting wind loads on parabolic troughs and heliostats. Two at-scale measurement campaigns yielded first-of-its-kind, high-resolution, long-term datasets that are used to characterize the complex flow field and wind loading on parabolic-troughs and heliostats in operational power plants. The high-resolution measurements collected during these campaigns were used to validate the high-fidelity computational models developed at NREL. These open-source computationally efficient models were shown to be accurate in predicting wind-driven loads on collectors without the need for a large supercomputer.

14 SOLAR ENERGY↗
NASA NTRS2000

Thermal cycling test results of CSP and RF assemblies

A JPL-led chip scale package (CSP) Consortium of enterprises, composed of representing agencies and private companies, recently joined together to pool in-kind resources for developing the quality and reliability of chip scale packages (CSPs) for a variety of projects.

chip scale package CSP thermal cycle solder joint ↗
NASA NTRS1999

CSP Assembly Reliability

Reviews the many factors that affect interconnect reliability of emerging chip scale package (CSP) assemblies. These include: package type, package build, board design, and assembly variables.

chip scale package CSP solder joint reliability th↗
NASA NTRS1998

Key Factors on CSP Assembly Reliability

Although the weakest link of CSP assembly reliability has been often internal package failure, solder joint fatigue is still considered to be the key factor for reliability.

CSP assembly reliability solder joints↗
NASA NTRS1999

CSP Assembly Reliability: Commercial and Harsh Environments

The JPL-led CSP Consortium of enterprises representing government agencies and private companies has jointed together to pool in-kind resources for developing the quality and reliability of chip scale packages (CSPs) for a variety of projects.

chip scale package CSP Solder Joint Reliability Th↗
DOE OSTI2026

Fabrication of ceramic to metal graded structure for high temperature CSP receiver application using solid state additive manufacturing

The overarching goal of this project is to come up with an innovative joining solution for integration of SiC ceramic to structural materials such as stainless steels (SS)/Ni-base alloys, where intimate metallurgical bonding between SiC ceramic and the structural metallic alloy is demonstrated at the interface. Implementation of a simple, yet robust joining method would help in increasing the application space of SiC in a high-temperature CSP (concentrated solar power) plant, especially in the receiver section. This research goal has been achieved by creating a functionally graded material (FGM) interface between SiC and the selected structural material with the help of powder metallurgy (PM) approach and demonstrate intimate metallurgical bonding between monolithic RB-SiC and 316L stainless steel alloy blanks.

36 MATERIALS SCIENCE↗
NASA NTRS1991

Improving the Reliability and Modal Stability of High Power 870 nm AlGaAs CSP Laser Diodes for Applications to Free Space Communication Systems

The operating characteristics (power-current, beam divergence, etc.) and reliability assessment of high-power CSP lasers is discussed. The emission wavelength of these lasers was optimized at 860 to 880 nm. The operational characteristics of a new laser, the inverse channel substrate planar (ICSP) laser, grown by metalorganic chemical vapor deposition (MOCVD), is discussed and the reliability assessment of this laser is reported. The highlights of this study include a reduction in the threshold current value for the laser to 15 mA and a degradation rate of less than 2 kW/hr for the lasers operating at 60 mW of peak output power.

Connolly, J. C.↗
NASA NTRS2000

Accelerated Thermal Cycling and Failure Mechanisms for BGA and CSP Assemblies

This paper reviews the accelerated thermal cycling test methods that are currently used by industry to characterize the interconnect reliability of commercial-off-the-shelf (COTS) ball grid array (BGA) and chip scale package (CSP) assemblies. Acceleration induced failure mechanisms varied from conventional surface mount (SM) failures for CSPs. Examples of unrealistic life projections for other CSPs are also presented. The cumulative cycles to failure for ceramic BGA assemblies performed under different conditions, including plots of their two Weibull parameters, are presented. The results are for cycles in the range of -30 C to 100 C, -55 C to 100 C, and -55 C to 125 C. Failure mechanisms as well as cycles to failure for thermal shock and thermal cycling conditions in the range of -55 C to 125 C were compared. Projection to other temperature cycling ranges using a modified Coffin-Manson relationship is also presented.

Ghaffarian, Reza↗
NASA NTRS2010

Automata learning algorithms and processes for providing more complete systems requirements specification by scenario generation, CSP-based syntax-oriented model construction, and R2D2C system requirements transformation

Systems, methods and apparatus are provided through which in some embodiments, automata learning algorithms and techniques are implemented to generate a more complete set of scenarios for requirements based programming. More specifically, a CSP-based, syntax-oriented model construction, which requires the support of a theorem prover, is complemented by model extrapolation, via automata learning. This may support the systematic completion of the requirements, the nature of the requirement being partial, which provides focus on the most prominent scenarios. This may generalize requirement skeletons by extrapolation and may indicate by way of automatically generated traces where the requirement specification is too loose and additional information is required.

Hinchey, Michael G.↗