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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 37 records · Page 2
All sourcesNASA NTRSDOE OSTI
NASA NTRS1990

Machine-checked proofs of the design and implementation of a fault-tolerant circuit

A formally verified implementation of the 'oral messages' algorithm of Pease, Shostak, and Lamport is described. An abstract implementation of the algorithm is verified to achieve interactive consistency in the presence of faults. This abstract characterization is then mapped down to a hardware level implementation which inherits the fault-tolerant characteristics of the abstract version. All steps in the proof were checked with the Boyer-Moore theorem prover. A significant results is the demonstration of a fault-tolerant device that is formally specified and whose implementation is proved correct with respect to this specification. A significant simplifying assumption is that the redundant processors behave synchronously. A mechanically checked proof that the oral messages algorithm is 'optimal' in the sense that no algorithm which achieves agreement via similar message passing can tolerate a larger proportion of faulty processor is also described.

Bevier, William R.↗
NASA NTRS1992

Autonomous power system brassboard

The Autonomous Power System (APS) brassboard is a 20 kHz power distribution system which has been developed at NASA Lewis Research Center, Cleveland, Ohio. The brassboard exists to provide a realistic hardware platform capable of testing artificially intelligent (AI) software. The brassboard's power circuit topology is based upon a Power Distribution Control Unit (PDCU), which is a subset of an advanced development 20 kHz electrical power system (EPS) testbed, originally designed for Space Station Freedom (SSF). The APS program is designed to demonstrate the application of intelligent software as a fault detection, isolation, and recovery methodology for space power systems. This report discusses both the hardware and software elements used to construct the present configuration of the brassboard. The brassboard power components are described. These include the solid-state switches (herein referred to as switchgear), transformers, sources, and loads. Closely linked to this power portion of the brassboard is the first level of embedded control. Hardware used to implement this control and its associated software is discussed. An Ada software program, developed by Lewis Research Center's Space Station Freedom Directorate for their 20 kHz testbed, is used to control the brassboard's switchgear, as well as monitor key brassboard parameters through sensors located within these switches. The Ada code is downloaded from a PC/AT, and is resident within the 8086 microprocessor-based embedded controllers. The PC/AT is also used for smart terminal emulation, capable of controlling the switchgear as well as displaying data from them. Intelligent control is provided through use of a T1 Explorer and the Autonomous Power Expert (APEX) LISP software. Real-time load scheduling is implemented through use of a 'C' program-based scheduling engine. The methods of communication between these computers and the brassboard are explored. In order to evaluate the features of both the brassboard hardware and intelligent controlling software, fault circuits have been developed and integrated as part of the brassboard. A description of these fault circuits and their function is included. The brassboard has become an extremely useful test facility, promoting artificial intelligence (AI) applications for power distribution systems. However, there are elements of the brassboard which could be enhanced, thus improving system performance. Modifications and enhancements to improve the brassboard's operation are discussed.

Merolla, Anthony↗
NASA NTRS1990

The design and proof of correctness of a fault-tolerant circuit

The flowing achievements are presented in view graph form: (1) a formal statement of interactive consistency conditions in the Boyer-Moore logic; (2) a formal statement of the oral messages (OM) algorithm in the Boyer-Moore logic; (3) a mechanically checked proof that OM satisfies the interactive consistency conditions; (4) a mechanically checked proof of the optimality result--no algorithm can tolerate fewer faults than OM yet still achieve interactive consistency; (5) the use of OM in a functional specification for a fault-tolerant device; (6) a formal description of the design of the device; (7) a mechanically checked proof that the device design satisfies the specification; and (8) an implementation of the design in programmable logic arrays.

Bevier, William R.↗
DOE OSTI2023

Open Circuit Switch Fault Management Method of a Multi-Phase Synchronous Buck Converter for EV Charging Application

Multi-phase synchronous buck converter (MSBC) is becoming popular for the electric vehicle (EV) charging application because of its higher efficiency, smaller passive component sizes, bidirectional power flow, and output current ripple reduction through interleaving. This converter also provides higher reliability than the traditional single phase converter since its modular structure enables fault tolerant operation. Fault management in the converter requires the detection of switch fault, shut down of the faulty phase, and reconfiguration of the PWM signals for the healthy phases to avoid circulating current and high output current ripple. In addition, it is desirable that the fault management method can be implemented using the micro-controller unit (MCU) or digital signal processor (DSP), which are widely used to control power converters. This paper presents a fault management method for detecting switch faults and reconfiguring healthy phases using a DSP. The method is validated through simulations and experiments using a commercial off-the-shelf power stack.

32 ENERGY CONSERVATION, CONSUMPTION, AND UTILIZATI↗
DOE OSTI2022

Real-Time Fault Location Using the Retardation Method

A new method for short-circuit fault location is proposed. The method is based on instantaneous signal measurement and its first and second derivatives, which are the novel elements of the current approach. The derivatives allow associating a precise time stamp to the occurrence of the fault. Due to retardation phenomena, the difference between the times in which a signal is registered in two detectors can be used to locate the fault. We offer several mathematical models to describe the fault. Although a description of faults in terms of a lumped circuit is useful for elucidating the methods for detecting the fault, this description will not suffice to describe the fault signal propagation; hence, a distributed models is needed, which is given in terms of the telegraph equations. Those equations were used to derive a transmission line transfer function, and an exact analytical description of the fault signal propagating in the transmission line was obtained. The analytical solution was verified both by numerical simulations and experimentally.

42 ENGINEERING↗
NASA NTRS1995

An optimized implementation of a fault-tolerant clock synchronization circuit

A fault-tolerant clock synchronization circuit was designed and tested. A comparison to a previous design and the procedure followed to achieve the current optimization are included. The report also includes a description of the system and the results of tests performed to study the synchronization and fault-tolerant characteristics of the implementation.

Torres-Pomales, Wilfredo↗
DOE OSTI2022

Positive-Sequence Phasor Modeling of Droop-Controlled, Grid-Forming Inverters with Fault Current Limiting Function

Traditional positive-sequence phasor models of droop-controlled, grid-forming inverters do not have the fault current limiting function. During a short-circuit fault the model generates unrealistic high fault current making the simulation results less practical. This paper develops a fault current limiting function for the positive-sequence phasor model of droop-controlled, grid-forming inverters, which can effectively limit the inverter output current at the predefined maximum during faults. A user-written model has been developed for the commercially-available software Siemens/PTI PSS/E. Fault studies on a modified IEEE 39-bus system with all grid-forming inverters verify the effectiveness of the developed fault current limiting function. The proposed model can be used to evaluate how the limited fault currents of droop-controlled, grid-forming inverters impact the bulk power system transient stability under fault conditions.

Du, Wei↗
DOE OSTI2022

Background Information on the Protection Requirements in IEEE Std 1547-2018

As the DER penetration level has risen significantly in recent times, parameter settings and configuration of installed DERs are having direct impact on local electric distribution utilities as well as bulk power systems during normal and abnormal grid conditions. On the other hand, all grid-connected DERs in the United States of America must conform to the interconnection requirements prescribed in the IEEE Std 1547-2018. Because of these reasons, it is crucial to understand the expected DER performance during abnormal grid conditions considering the requirements of the IEEE Std 1547-2018. The aim of this document is twofold: (1) to summarize requirements in IEEE Std 1547-2018 having direct implications in distribution network protection, and (2) to provide the reader with knowledge and information that will be required for users to apply the requirements specified. Since the focus of this document is on distribution network protection in the presence of DERs, it is assumed that the readers have basic understanding of distribution network protection as well as working principles of DERs. This document starts with a brief introduction on protection systems for distribution network followed by a discussion on the impact of DER on the protection systems. Current practices to provide network protection in the presence of DER is briefly discussed. The document then explores the DER performance requirements in IEEE Std. 1547-2018; especially on those related to distribution network protection. Section 6.1 in IEEE Std. 1547-2018 provides an overview of capabilities and control requirements for DER under abnormal operating conditions. This section also introduces abnormal operating performance categories I, II, III. The DER response to various types of faults and grid conditions such as short-circuit faults and open phase conditions are discussed in section 6.2 in the standard while requirements for coordination with the Area EPS reclosing scheme are provided in section 6.3. Section 6.4 in the IEEE Std 1547-2018 specifies requirements for mandatory voltage tripping and ride-through requirements during low and high voltage disturbances and section 6.5 specifies similar requirements for low and high frequency disturbances. IEEE Std. 1547 requires that the conformance of the DERs to IEEE Std 1547-2018 requirements should be verified in accordance with IEEE Std. 1547. 1. There are several parameters and settings of DERs that need to be properly selected for reliable operation during abnormal grid condition while applying the requirements of IEEE Std 1547-2018. Key decisions for proper selections of parameter and settings are: 1. Determination of required DER abnormal operating performance category, 2. Determination of DER response (shall trip) to abnormal voltages and 3. Determination of DER response (shall trip) to abnormal frequency.

24 POWER TRANSMISSION AND DISTRIBUTION↗
DOE OSTI2024

Intelligent, grid-friendly, modular extreme fast charging system with solid-state DC protection

The development of electric vehicle (EV) charging infrastructure is crucial for the widespread adoption of electric transportation. However, implementing such infrastructure is a complex task that requires consideration of factors such as space limitations, adherence to industry standards, grid capacity, and other technical and policy issues. This project seeks to create a framework for the efficient design of compact medium voltage (MV) extreme fast charging (XFC) stations for EVs. The station design involves the use of a solid-state transformer (SST) that connects to the MV distribution network, delivering power to a shared DC bus. This innovative approach eliminates the need for a step-down transformer to provide low-voltage service by connecting directly to the MV distribution network. Eliminating the low-frequency transformer not only reduces the system footprint and losses but also eliminates inrush currents during grid black-start. Additionally, placing power electronics directly on the distribution system allows for high-bandwidth filtering and power factor correction. The inclusion of a shared DC bus enables multiple charging dispensers and DC storage/generation units to connect, forming a DC microgrid. This setup facilitates power sharing with minimal conversion stages. The project showcases a DC distribution network protected by intelligent solid-state (SS) DC circuit breakers (DCCB) capable of isolating the smallest section of the faulted circuit much faster than existing mechanical solutions.

24 POWER TRANSMISSION AND DISTRIBUTION↗
NASA NTRS1978

Transient response to three-phase faults on a wind turbine generator

In order to obtain a measure of its responses to short circuits a large horizontal axis wind turbine generator was modeled and its performance was simulated on a digital computer. Simulation of short circuit faults on the synchronous alternator of a wind turbine generator, without resort to the classical assumptions generally made for that analysis, indicates that maximum clearing times for the system tied to an infinite bus are longer than the typical clearing times for equivalent capacity conventional machines. Also, maximum clearing times are independent of tower shadow and wind shear. Variation of circuit conditions produce the modifications in the transient response predicted by analysis.

Gilbert, L. J.↗
NASA NTRS1976

Transient analysis of unbalanced short circuits of the ERDA-NASA 100 kW wind turbine alternator

Unbalanced short-circuit faults on the alternator of the ERDA-NASA Mod-O100-kW experimental wind turbine are studied. For each case, complete solutions for armature, field, and damper-circuit currents; short-circuit torque; and open-phase voltage are derived directly by a mathematical analysis. Formulated results are tabulated. For the Mod-O wind turbine alternator, numerical calculations are given, and results are presented by graphs. Comparisons for significant points among the more important cases are summarized. For these cases the transients are found to be potentially severe. The effect of the alternator neutral-to-ground impedance is evaluated.

Hwang, H. H.↗
NASA NTRS1973

Self-healing fuse development

The mercury-filled self-healing fuses developed for this program afford very good protection from circuit faults with rapid reclosure. Fuse performance and design parameters have been characterized. Life tests indicate a capability of 500 fuse operations. Fuse ratings are 150 v at 5, 15, 25 and 50 circuit A. A series of sample fuses using alumina and beryllia insulation have been furnished to NASA for circuit evaluation.

Jones, N. D.↗
DOE OSTI2023

Reliability Improvement by Fault-Tolerant Operation of NPC Inverter for Motor Driving

The high-reliability operation of three-level inverters is crucial to prevent equipment damage, process downtime, and economic losses. This article investigates a three-level neutral-point-clamped inverter under all possible combinations of open-circuit and short-circuit faults and proposes a new postfault operation method without adding extra hardware. This method provides comprehensive solution for operations after single and multiple-device failures, increasing the inverter reliability by 24%. This article classified postfault modulations and uncovered previously unknown fault scenarios that can be addressed using the proposed control method. A new postfault modulation based on space vector modulation with virtual vectors is proposed. The feasibility of the proposed control method is verified by simulation and an experiment for one fault scenario in a three-level neutral-point-clamped inverter with a 3.73 kW motor load. Furthermore, this article contributes to improving the reliability of three-level inverters.

42 ENGINEERING↗
NASA NTRS1993

Bridging faults in BiCMOS circuits

Combining the advantages of CMOS and bipolar, BiCMOS is emerging as a major technology for many high performance digital and mixed signal applications. Recent investigations revealed that bridging faults can be a major failure mode in IC's. Effects of bridging faults in BiCMOS circuits are presented. Bridging faults between logical units without feedback and logical units with feedback are considered. Several bridging faults can be detected by monitoring the power supply current (I(sub DDQ) monitoring). Effects of bridging faults and bridging resistance on output logic levels were examined along with their effects on noise immunity.

Menon, Sankaran M.↗
DOE OSTI2022

A Fast-Response High-Accuracy Overvoltage Protection Circuit for Soft-Switching Current-Source Converters

Although voltage-source converters (VSCs) have been a focus of research for decades and are widely applied in numerous applications, they face great challenges in short-circuit failures, high dv/dt and electromagnetic interference (EMI), especially using wide bandgap devices. Instead, current-source converters (CSCs) are attracting increasing attention in recent years owing to their friendliness to short-circuit faults, improved EMI, etc. For CSCs, overvoltage is the most catastrophic failure since the semiconductor devices can hardly withstand an overvoltage for a short pulse. In this paper, a fast-response high-accuracy overvoltage protection (OVP) circuit is proposed to protect CSCs from overvoltage damage. It also features a small form factor, good noise-immunity, friendly retrofit capability, and no need for active switches. In this paper, the operating principle and design guideline of the proposed OVP circuit is introduced. Its effectiveness is validated in soft-switching solid-state transformer (S4T) at 500 V. In experiments, the voltage detection error of less than 5% and a propagation delay of fewer than 400 ns have been achieved.

30 DIRECT ENERGY CONVERSION↗
DOE OSTI2024

Control, Fault Management, and Grid Support Functionality of an MV AC-DC Solid State Transformer based EV Extreme Fast Charging Station

Electric vehicles (EVs) have become increasingly popular in recent times while revolutionizing the consumer and commercial transportation market. The development of charging infrastructure has become one of the priorities for increasing the adoption of EVs. Extreme fast charging (XFC) technology can reduce the so-called ’range anxiety’ of consumers as they significantly reduce the charging time. With the advent of wide band-gap (WBG) power devices and improvement in power electronic converters, medium voltage (MV) solid state transformer (SST) based XFC system has the potential to replace the traditional XFC stations because of the lower footprint, ease of installation, enhanced control feature, and better system efficiency. The control system design is one of the critical aspects of the SST development process. Careful consideration and detailed analysis are required to find out suitable control method for the SST based on its topology among different centralized and decentralized control architectures. Also, the control parameters selection and potential improvement to the transient response of the controller ought to be investigated. Another major concern of the SST is different types of internal fault which reduces the overall reliability of the XFC system. As a result, designing a robust protection system is essential. Among different fault modes, open circuit switch faults have received significant attention as an active research area because of their likelihood and severe effects on converters. Therefore, the power stages used in the XFC system require functional and accurate open circuit switch fault management methods. An equally significant aspect of this SST based XFC is its compatibility in a microgrid where there is no synchronous generator present. When the grid is not available, the XFC SSTs can provide grid forming capability and continue supplying the critical loads in islanded mode. The transition between grid connected and islanded mode, especially the grid resynchronization process has to be carefully performed for the safety of the microgrid components. The challenges posed by the aforementioned issues have inspired the work done in this dissertation. Here, a 13.2 kV, 1 MVA, AC/DC SST for the XFC system is examined and a comparative analysis is conducted to select the control architecture based on feasibility of implementation and performance. A detailed control parameter design process is demonstrated considering the sensor dynamics and delay. The selected decentralized control method is augmented by introducing a novel sensor-less load current feedforward method to provide better voltage regulation at the DC bus during a change of load. Next, in the fault management section, a hierarchical failure mode effect analysis (FMEA) is proposed to enable a systematic design of the internal fault protection of the XFC SST as there are limited examples in the literature regarding the analysis of the safety and design of the protection of a power electronic converter system. Novel open circuit switch fault management methods for the converters in the system are presented. Finally, XFC SST based MV microgrid operations in grid connected mode and islanded mode are explored. A secondary control method for grid resynchronization is presented and a design process of control parameters is shown to ensure the stability of the secondary voltage and frequency regulation.

30 DIRECT ENERGY CONVERSION↗