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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 37 records · Page 2
All sourcesNASA NTRSDOE OSTI
NASA NTRS1999

3D Chip Scale Package (CSP)

Package/die stacking technology enhances most aspects of electronic systems such as size, weight, speed, yield, and power consumption.

Chip Scale Packaging (CSP) 3D CSP Stack TSOP D2CSP↗
NASA NTRS1997

A Review of Chip Scale Package Assembled Reliability

NASA Headquarters, code Q, has established the Advanced Interconnect Program (AIP) to address the NASA's Common needs in electronic packaging for microspacecraft applications. The Jet Propulsion Laboratory was funded to address the quality and reliability of several high denstiy electronic packaging technologies.

Chip Scale Packaging Microspacecraft↗
DOE OSTI2022

Optics-Free Chip-Scale Intraoperative Imaging Using NIR-Excited Upconverting Nanoparticles

Here we present an optics-free CMOS image sensor that incorporates a novel time-gated dual-photodiode pixel design to allow filter- and lens-less image acquisition of near-infrared-excited (NIR-excited) upconverting nanoparticles. Recent biomedical advances have highlighted the benefits of NIR excitation, but NIR interaction with silicon has remained a challenge, even with high-performance optical blocking filters. Using a secondary diode and a dual-photodiode design, this sensor is able to remove the 100s of mV of NIR background on pixels and bring it down to single-digit mV level, nearing its noise floor of 2.2 mV rms, not achievable with any optical filter. Non-linear effects of background cancellation using the diode pair has been mitigated using an initial one-time pixel-level curve fitting and calibration in a post-processing setting. This imager comprises a highly linear 11 fF metal-oxide-metal (MOM) capacitor and includes integrated angle-selective gratings to reject oblique light and enhance sharpness. Each pixel also includes two distinct correlated double sampling schemes, to remove low frequency flicker noise and systematic offset in the datapath. We demonstrate the performance of this imager using pulsed NIR-excited upconverting nanoparticles on standard United-States-Air-Force (USAF) resolution targets and achieve an SNR of 15 dB, while keeping NIR background below 6 mV. This 36-by-80-pixel array measures only 2.3 mm by 4.8 mm and can be thinned down to 25 µm, allowing it to become surgically compatible with intraoperative instruments and equipment, while remaining optics-free.

42 ENGINEERING↗
DOE OSTI2023

Electrothermally Driven Reconfiguration of Microrobotic Beam Structures for the ChipSail System

Solar sailing enables efficient propellant-free attitude adjustment and orbital maneuvers of solar sail spacecraft with high area-to-mass ratios. However, the heavy supporting mass for large solar sails inevitably leads to low area-to-mass ratios. Inspired by chip-scale satellites, a chip-scale solar sail system named ChipSail, consisting of microrobotic solar sails and a chip-scale satellite, was proposed in this work. The structural design and reconfigurable mechanisms of an electrothermally driven microrobotic solar sail made of Al\Ni 50 Ti 50 bilayer beams were introduced, and the theoretical model of its electro-thermo-mechanical behaviors was established. The analytical solutions to the out-of-plane deformation of the solar sail structure appeared to be in good agreement with the finite element analysis (FEA) results. A representative prototype of such solar sail structures was fabricated on silicon wafers using surface and bulk microfabrication, followed by an in-situ experiment of its reconfigurable property under controlled electrothermal actuation. The experimental results demonstrated significant electro-thermo-mechanical deformation of such microrobotic bilayer solar sails, showing great potential in the development of the ChipSail system. Analytical solutions to the electro-thermo-mechanical model, as well as the fabrication process and characterization techniques, provided a rapid performance evaluation and optimization of such microrobotic bilayer solar sails for the ChipSail.

77 NANOSCIENCE AND NANOTECHNOLOGY↗
DOE OSTI2025

Simultaneous on-chip generation of violet, blue, cyan, green, yellow, orange, and red light from an octave-spanning infrared frequency comb

An integrated, multi-spectral visible-light source could significantly benefit technologies such as displays, medical imaging, spectroscopy, visible-light communications, and astrophysics. However, despite recent advances in chip-scale visible lasers, simultaneously generating light of all colors in a single chip has been challenging. Existing solutions are either not suitable for full chip-scale integration, or are fundamentally difficult to scale. Here we demonstrate the simultaneous on-chip generation of infrared, red, orange, yellow, green, cyan, blue, and violet light. Leveraging the low loss, low dispersion, and high density of modes of an adiabatic multimode silicon nitride (SiN) microresonator, we use a single infrared pump of moderate power (~130 mW) to produce an octave-spanning infrared frequency comb that is then converted to different portions of the visible spectrum. We measure non-mode-locked combs and soliton steps corresponding to mode-locked states, making our comb generator suitable for applications that demand either low or high coherence. Since the required pump power is compatible with high-power lasers demonstrated in the same SiN platform, our multi-octave light generator can be fully integrated in a chip-scale form factor. We envision that such a light source will be a catalyst for the development and deployment of miniaturized multi-spectral technologies for quantum systems, medical imaging, displays, and spectroscopy.

47 OTHER INSTRUMENTATION↗
NASA NTRS2001

Effect of thermal cycling ramp rate on CSP assembly reliability

A JPL-led chip scale package consortium of enterprises recently joined together to pool in-kind resources for developing the quality and reliability of chip scale packages for a variety of projects. The experience of the consortium in building more than 150 test vehicle assemblies, single and double sided multilayer PWBs, and the environmental test results has now been published as a chip scale package guidelines document.

accelerated thermal cycle chip scale package solde↗
DOE OSTI2025

Mitigating cosmic-ray-like correlated events with a modular quantum processor

Quantum processors based on superconducting qubits are being scaled to larger qubit numbers, enabling the implementation of small-scale quantum error-correction codes. However, catastrophic chip-scale correlated errors have been observed in these processors, attributed to, e.g., cosmic ray impacts, which challenge conventional error-correction codes such as the surface code. These events are characterized by a temporary but pronounced suppression of the qubit-energy relaxation times. Here, in this study, we explore the potential for modular quantum computing architectures to mitigate such correlated energy decay events. We measure cosmic-ray-like events in a quantum processor comprising a motherboard and two flip-chip bonded daughterboard modules, each module containing two superconducting qubits. We monitor the appearance of correlated qubit decay events within a single module and across the physically separated modules. We find that while decay events within one module are strongly correlated (over 85%), events in separate modules only display approximately 2% correlations. We also report coincident decay events in the motherboard and in either of the two daughterboard modules, providing further insight into the nature of these decay events. These results suggest that modular architectures, combined with bespoke errorcorrection codes, offer a promising approach for protecting future quantum processors from chip-scale correlated errors.

Wu, Xuntao [Univ. of Chicago, IL (United States)] ↗