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NASA NTRS2011

Reliability Evaluation of Base-Metal-Electrode Multilayer Ceramic Capacitors for Potential Space Applications

Base-metal-electrode (BME) ceramic capacitors are being investigated for possible use in high-reliability spacelevel applications. This paper focuses on how BME capacitors construction and microstructure affects their lifetime and reliability. Examination of the construction and microstructure of commercial off-the-shelf (COTS) BME capacitors reveals great variance in dielectric layer thickness, even among BME capacitors with the same rated voltage. Compared to PME (precious-metal-electrode) capacitors, BME capacitors exhibit a denser and more uniform microstructure, with an average grain size between 0.3 and 0.5 m, which is much less than that of most PME capacitors. BME capacitors can be fabricated with more internal electrode layers and thinner dielectric layers than PME capacitors because they have a fine-grained microstructure and do not shrink much during ceramic sintering. This makes it possible for BME capacitors to achieve a very high capacitance volumetric efficiency. The reliability of BME and PME capacitors was investigated using highly accelerated life testing (HALT). Most BME capacitors were found to fail with an early avalanche breakdown, followed by a regular dielectric wearout failure during the HALT test. When most of the early failures, characterized with avalanche breakdown, were removed, BME capacitors exhibited a minimum mean time-to-failure (MTTF) of more than 105 years at room temperature and rated voltage. Dielectric thickness was found to be a critical parameter for the reliability of BME capacitors. The number of stacked grains in a dielectric layer appears to play a significant role in determining BME capacitor reliability. Although dielectric layer thickness varies for a given rated voltage in BME capacitors, the number of stacked grains is relatively consistent, typically around 12 for a number of BME capacitors with a rated voltage of 25V. This may suggest that the number of grains per dielectric layer is more critical than the thickness itself for determining the rated voltage and the life expectancy of the BME capacitor. The leakage current characterization and the failure analysis results suggest that most of these early avalanche failures are due to the extrinsic minor construction defects introduced during fabrication of BME capacitors. The concentration of the extrinsic defects must be reduced if the BME capacitors are considered for high reliability applications. There are two approaches that can reduce or prevent the occurrence of early failure in BME capacitors: (1) to reduce the defect concentration with improved processing control; (2) to prevent the use of BME capacitors under harsh external stress levels so that the extrinsic defects will never be triggered for a failure. In order to do so appropriate dielectric layer thickness must be determined for a given rated voltage.

Liu, David (Donhang)↗

NASA NTRS1980

Strain gage

A strain gage particularly suited for use in detecting and measuring mechanically induced strain in thermally strained specimens including an elongated link, adapted to be fixedly secured to the surface of a specimen, having thermal expansion characteristics matched with those of the specimen, and characterized by a differential capacitor employed for detecting strain induced motion as such motion is effected between the link and the surface of the specimen.

Harting, Darrell R.↗

NASA NTRS1973

Characteristics of capacitor-type micrometeoroid flux detectors when impacted with simulated micrometeoroids

A series of impact tests are described and data presented which characterize the operation of the capacitor-type micrometeoroid flux detectors used on the Meteoroid Technology Satellite (MTS). Capacitor-type detectors with silicon dioxide dielectric thickness of 0.4 and 1.0 microns were tested in the micrometeoroid impact simulator at the Langley Research Center, a 4-MV Van de Graaff electrostatic accelerator. The carbonyl iron projectiles were from 0.5 to 5.0 microns in diameter with velocities from 4 to 10.0 km/sec. The detector bias voltage was varied from -20 to -60 V; some tests were at detector temperatures of 90 C to -100 C; and the angle of impact varied from 0 deg to 75 deg from the normal to the detector. These tests showed that: (1) the detector operation is reliable when the bias voltage is greater than 30 V; (2) after an impact the detector returns to its original condition with an insignificant loss of active area; and (3) the sensitivity of the detector is inversely proportional to the detector thickness. The test results suggest a theoretical model in which the signal is an arc triggered by the impacting projectile, and the detector bias voltage must be high enough to insure that an arc will form.

Kassel, P. C., Jr.↗

NASA NTRS2003

A Reactive-Ion Etch for Patterning Piezoelectric Thin Film

Reactive-ion etching (RIE) under conditions described below has been found to be a suitable means for patterning piezoelectric thin films made from such materials as PbZr(1-x)Ti(x)O3 or Ba(x)Sr(1.x)TiO3. In the original application for which this particular RIE process was developed, PbZr(1-x)Ti(x)O3 films 0.5 microns thick are to be sandwiched between Pt electrode layers 0.1 microns thick and Ir electrode layers 0.1 microns thick to form piezoelectric capacitor structures. Such structures are typical of piezoelectric actuators in advanced microelectromechanical systems now under development or planned to be developed in the near future. RIE of PbZr(1-x)Ti(x)O3 is usually considered to involve two major subprocesses: an ion-assisted- etching reaction, and a sputtering subprocess that removes reactive byproducts. RIE is favored over other etching techniques because it offers a potential for a high degree of anisotropy, high-resolution pattern definition, and good process control. However, conventional RIE is not ideal for patterning PbZr(1-x)Ti(x)O3 films at a thickness as great as that in the original intended application. In order to realize the potential benefits mentioned above, it is necessary to optimize process conditions . in particular, the composition of the etching gas and the values of such other process parameters as radio-frequency power, gas pressure, gas-flow rate, and duration of the process. Guidelines for determining optimum conditions can be obtained from experimental determination of etch rates as functions of these parameters. Etch-gas mixtures of BCl3 and Cl2, some also including Ar, have been found to offer a high degree of selectivity as needed for patterning of PbZr(1-x)Ti(x)O3 films on top of Ir electrode layers in thin-film capacitor structures. The selectivity is characterized by a ratio of approx.10:1 (rate of etching PbZr(1-x)Ti(x)O3 divided by rate of etching Ir and IrO(x)). At the time of reporting the information for this article, several experiments on RIE in BCl3 and Cl2 (and sometimes Ar) had demonstrated the 10:1 selectivity ratio, and further experiments to enhance understanding and obtain further guidance for optimizing process conditions were planned.

Yang, Eui-Hyeok↗

NASA NTRS2022

Useful Life of Tantalum Capacitors

Currently, the major reliability characteristic of tantalum capacitors is the failure rate, which is a constant used to characterize random failures of electronic components. However, contemporary MnO2 and polymer tantalum capacitors have both infant mortality (IM) and wear-out (WO) failures. This requires assessments of the useful life of the parts that is limited by the time of inception of WO failures that can be determined using an adequate reliability model and results of highly accelerated life testing (HALT). In this presentation, a modified time dependent dielectric breakdown (TDDB) model is used to describe both IM and WO failures during HALT. Specifics of physical processes resulting in degradation and failures in polymer and MnO2 tantalum capacitors are discussed, and the increase of IM failures with the level of stress is explained. The model justifies exponential dependence of the acceleration factors on voltage and predicts higher values of the voltage acceleration constant for IM compared to WO failures.

tantalum capacitors↗

NASA NTRS2011

Failure Modes in Capacitors When Tested Under a Time-Varying Stress

Power-on failure has been the prevalent failure mechanism for solid tantalum capacitors in decoupling applications. A surge step stress test (SSST) has been previously applied to identify the critical stress level of a capacitor batch to give some predictability to the power-on failure mechanism [1]. But SSST can also be viewed as an electrically destructive test under a time-varying stress (voltage). It consists of rapidly charging the capacitor with incremental voltage increases, through a low resistance in series, until the capacitor under test is electrically shorted. When the reliability of capacitors is evaluated, a highly accelerated life test (HALT) is usually adopted since it is a time-efficient method of determining the failure mechanism; however, a destructive test under a time-varying stress such as SSST is even more time efficient. It usually takes days or weeks to complete a HALT test, but it only takes minutes for a time-varying stress test to produce failures. The advantage of incorporating a specific time-varying stress profile into a statistical model is significant in providing an alternative life test method for quickly revealing the failure mechanism in capacitors. In this paper, a time-varying stress that mimics a typical SSST has been incorporated into the Weibull model to characterize the failure mechanism in different types of capacitors. The SSST circuit and transient conditions for correctly surge testing capacitors are discussed. Finally, the SSST was applied for testing Ta capacitors, polymer aluminum capacitors (PA capacitors), and multi-layer ceramic (MLC) capacitors with both precious metal electrodes (PME) and base metal electrodes (BME). The test results are found to be directly associated with the dielectric layer breakdown in Ta and PA capacitors and are independent of the capacitor values, the way the capacitors were built, and the capacitors manufacturers. The test results also show that MLC capacitors exhibit surge breakdown voltages much higher than the rated voltage and that the breakdown field is inversely proportional to the dielectric layer thickness. The SSST data can also be used to comparatively evaluate the voltage robustness of capacitors for decoupling applications.

Liu, David (Donhang)↗

NASA NTRS2004

Low-Cutoff, High-Pass Digital Filtering of Neural Signals

The figure depicts the major functional blocks of a system, now undergoing development, for conditioning neural signals acquired by electrodes implanted in a brain. The overall functions to be performed by this system can be summarized as preamplification, multiplexing, digitization, and high-pass filtering. Other systems under development for recording neural signals typically contain resistor-capacitor analog low-pass filters characterized by cutoff frequencies in the vicinity of 100 Hz. In the application for which this system is being developed, there is a requirement for a cutoff frequency of 5 Hz. Because the resistors needed to obtain such a low cutoff frequency would be impractically large, it was decided to perform low-pass filtering by use of digital rather than analog circuitry. In addition, it was decided to timemultiplex the digitized signals from the multiple input channels into a single stream of data in a single output channel. The signal in each input channel is first processed by a preamplifier having a voltage gain of approximately 50. Embedded in each preamplifier is a low-pass anti-aliasing filter having a cutoff frequency of approximately 10 kHz. The anti-aliasing filters make it possible to couple the outputs of the preamplifiers to the input ports of a multiplexer. The output of the multiplexer is a single stream of time-multiplexed samples of analog signals. This stream is processed by a main differential amplifier, the output of which is sent to an analog-to-digital converter (ADC). The output of the ADC is sent to a digital signal processor (DSP).

Mojarradi,Mohammad↗

NASA NTRS1990

Silicon carbide semiconductor device fabrication and characterization

A number of basic building blocks i.e., rectifying and ohmic contacts, implanted junctions, MOS capacitors, pnpn diodes and devices, such as, MESFETs on both alpha and beta SiC films were fabricated and characterized. Gold forms a rectifying contact on beta SiC. Since Au contacts degrade at high temperatures, these are not considered to be suitable for high temperature device applications. However, it was possible to utilize Au contact diodes for electrically characterizing SiC films. Preliminary work indicates that sputtered Pt or Pt/Si contacts on beta SiC films are someways superior to Au contacts. Sputtered Pt layers on alpha SiC films form excellent rectifying contacts, whereas Ni layers following anneal at approximately 1050 C provide an ohmic contact. It has demonstrated that ion implantation of Al in substrates held at 550 C can be successfully employed for the fabrication of rectifying junction diodes. Feasibility of fabricating pnpn diodes and platinum gated MESFETs on alpha SiC films was also demonstrated.

Davis, R. F.↗

NASA NTRS2003

Electronic Components and Circuits for Extreme Temperature Environments

Planetary exploration missions and deep space probes require electrical power management and control systems that are capable of efficient and reliable operation in very low temperature environments. Presently, spacecraft operating in the cold environment of deep space carry a large number of radioisotope heating units in order to maintain the surrounding temperature of the on-board electronics at approximately 20 C. Electronics capable of operation at cryogenic temperatures will not only tolerate the hostile environment of deep space but also reduce system size and weight by eliminating or reducing the radioisotope heating units and their associate structures; thereby reducing system development as well as launch costs. In addition, power electronic circuits designed for operation at low temperatures are expected to result in more efficient systems than those at room temperature. This improvement results from better behavior and tolerance in the electrical and thermal properties of semiconductor and dielectric materials at low temperatures. The Low Temperature Electronics Program at the NASA Glenn Research Center focuses on research and development of electrical components, circuits, and systems suitable for applications in the aerospace environment and deep space exploration missions. Research is being conducted on devices and systems for reliable use down to cryogenic temperatures. Some of the commercial-off-the-shelf as well as developed components that are being characterized include switching devices, resistors, magnetics, and capacitors. Semiconductor devices and integrated circuits including digital-to-analog and analog-to-digital converters, DC/DC converters, operational amplifiers, and oscillators are also being investigated for potential use in low temperature applications. An overview of the NASA Glenn Research Center Low Temperature Electronic Program will be presented in this paper. A description of the low temperature test facilities along with selected data obtained through in-house component and circuit testing will also be discussed. Ongoing research activities that are being performed in collaboration with various organizations will also be presented.

Patterson, Richard L.↗

NASA NTRS2011

Failure Modes in Capacitors When Tested Under a Time-Varying Stress

Steady step surge testing (SSST) is widely applied to screen out potential power-on failures in solid tantalum capacitors. The test simulates the power supply's on and off characteristics. Power-on failure has been the prevalent failure mechanism for solid tantalum capacitors for decoupling applications. On the other hand, the SSST can also be reviewed as an electrically destructive test under a time-varying stress. It consists of rapidly charging the capacitor with incremental voltage increases, through a low resistance in series, until the capacitor under test is electrically shorted. Highly accelerated life testing (HALT) is usually a time-efficient method for determining the failure mechanism in capacitors; however, a destructive test under a time-varying stress like SSST is even more effective. It normally takes days to complete a HALT test, but it only takes minutes for a time-varying stress test to produce failures. The advantage of incorporating specific time-varying stress into a statistical model is significant in providing an alternative life test method for quickly revealing the failure modes in capacitors. In this paper, a time-varying stress has been incorporated into the Weibull model to characterize the failure modes. The SSST circuit and transient conditions to correctly test the capacitors is discussed. Finally, the SSST was applied for testing polymer aluminum capacitors (PA capacitors), Ta capacitors, and multi-layer ceramic capacitors with both precious metal electrode (PME) and base-metal-electrodes (BME). It appears that testing results are directly associated to the dielectric layer breakdown in PA and Ta capacitors and are independent on the capacitor values, the way the capacitors being built, and the manufactures. The testing results also reveal that ceramic capacitors exhibit breakdown voltages more than 20 times the rated voltage, and the breakdown voltages are inverse proportional to the dielectric layer thickness. The possibility of ceramic capacitors in front-end decoupling applications to block the surge noise from a power supply is also discussed.

Liu, David (Donhang)↗

NASA NTRS1999

TAL Performance and Mission Analysis in a CDL Capacitor Powered Direct-Drive Configuration

The goals of this research are (1) to prove the concept feasibility of a direct-drive electric propulsion system, and (2) to evaluate the performance and characteristics of a Russian TAL (Thruster with Anode Layer) operating in a long-pulse mode, powered by a capacitor-based power source developed at Space Power Institute. The TAL, designated D-55, is characterized by an external acceleration zone and is powered by a unique chemical double layer (CDL) capacitor bank with a capacitance of 4 F at a charge voltage of 400 V. Performance testing of this power supply on the TAL was conducted at NASA Lewis Research Center in Cleveland, OH. Direct thrust measurements of the TAL were obtained at CDL power levels ranging from 450 to 1750 W. The specific impulse encompassed a range from 1150 s to 2200 s, yielding thruster system efficiencies between 50 and 60%. Preliminary mission analysis of the CDL direct-drive concept and other electric propulsion options was performed for the ORACLE spacecraft in 6am/6pm and 12am/12pm, 300 km sun-synchronous orbits. The direct-drive option was competitive with the other systems by increasing available net mass between 5 and 42% and reducing two-year system wet mass between 18 and 63%. Overall, the electric propulsion power requirements for the satellite solar array were reduced between 57 and 91% depending oil the orbit evaluated The direct-drive, CDL capacitor-based concept in electric propulsion thus promises to be a highly-efficient, viable alternative for satellite operations in specific near-Earth missions.

Hrbud, Ivana↗

NASA NTRS1992

Dielectric breakdown studies of Teflon perfluoroalkoxy at high temperature

Teflon perfluoroalkoxy (PFA) was evaluated for use as a dielectric material in high-temperature high-voltage capacitors for space applications. The properties that were characterized included the dc dielectric strength at temperatures up to 250 C and the permittivity and dielectric loss as a function of frequency, temperature and voltage. To understand the breakdown mechanism taking place at high temperatures, the pre-breakdown discharge and conduction currents, and the dependence of dielectric strength on thickness of the film were determined. Confocal laser microscopy was performed to diagnose for microimperfections within the film structure. The results obtained show a significant decrease in the dielectric strength and an increase in dielectric loss with an increase in temperature, suggesting that impulse thermal breakdown could be a responsible mechanism in PFA film at temperatures above 150 C.

Suthar, J. L.↗

NASA NTRS2003

Development of UItra-Low Temperature Motor Controllers: Ultra Low Temperatures Evaluation and Characterization of Semiconductor Technologies For The Next Generation Space Telescope

Electronics designed for low temperature operation will result in more efficient systems than room temperature. This improvement is a result of better electronic, electrical, and thermal properties of materials at low temperatures. In particular, the performance of certain semiconductor devices improves with decreasing temperature down to ultra-low temperature (-273 'C). The Low Temperature Electronics Program at the NASA Glenn Research Center focuses on research and development of electrical components and systems suitable for applications in deep space missions. Research is being conducted on devices and systems for use down to liquid helium temperatures (-273 'C). Some of the components that are being characterized include semiconductor switching devices, resistors, magnetics, and capacitors. The work performed this summer has focused on the evaluation of silicon-, silicon-germanium- and gallium-Arsenide-based (GaAs) bipolar, MOS and CMOS discrete components and integrated circuits (ICs), from room temperature (23 'C) down to ultra low temperatures (-263 'C).

Elbuluk, Malik E.↗

NASA NTRS2002

Cryogenic Electronics Being Developed for Space Operation

Planetary exploration missions and deep space probes require electrical power management and control systems that can operate efficiently and reliably in very low temperature environments. Presently, spacecraft operating in the cold environment of deep space carry a large number of radioisotope heating units to maintain the surrounding temperature of the onboard electronics at approximately 20 C. Electronics capable of operation at cryogenic temperatures would not only tolerate the hostile environment of deep space but also reduce system size and weight by eliminating or reducing the radioisotope heating units and their associate structures. Thereby, such electronics would reduce system development as well as launch costs. In addition, power electronic circuits designed for operation at low temperatures are expected to result in more efficient systems than those at room temperature. This improvement results because semiconductor and dielectric materials have better behavior and tolerance in their electrical and thermal properties at low temperatures. The Low Temperature Electronics Program at the NASA Glenn Research Center is focusing on the research and development of electrical components, circuits, and systems suitable for applications in the aerospace environment and in deep space exploration missions. Research is being conducted on devices and systems for reliable use down to cryogenic temperatures. Some of the commercial off-the-shelf as well as developed components that are being characterized include semiconductor switching devices, resistors, magnetics, and capacitors. Semiconductor devices and integrated circuits including digital-to-analog and analog-to-digital converters, dc-dc converters, operational amplifiers, and oscillators are also being investigated for potential use in low-temperature applications. For example, the output response of an advanced oscillator at room temperature and at -190 C is shown. Most oscillators can operate at temperatures down to only -55 C. It can be seen that, for this oscillator, the low temperature of -196 C changed the leading and trailing edges of the oscillator pulses by producing overshoot. The research and development efforts performed under the Low Temperature Electronics Program at Glenn are being carried out through collaboration with other Government agencies, industrial and aerospace companies, and academia. The program supports missions as well as technology development efforts at NASA's Goddard Space Flight Center and Langley Research Center, and the Jet Propulsion Laboratory.

Patterson, Richard L.↗

NASA NTRS2021

Effect of Soldering on Polymer and MnO2 Tantalum Capacitors

Soldering might have a strong effect on performance and reliability of most surface mount technology components, including tantalum capacitors. High quality tantalum capacitors are likely the only type of components where soldering simulation is the first step during screening. Nevertheless, post-soldering failures of tantalum capacitors happen and require additional analysis. Popcorning is a well-known effect in plastic encapsulated microcircuits (PEM) and it occurs also in chip tantalum capacitors. The sensitivity of parts to the presence of moisture during soldering is characterized by the moisture sensitivity level (MSL); however, contrary to PEMs, there is no standard procedure for establishing MSL for tantalum capacitors. The effect of absorbed moisture on soldering related degradation and failures in tantalum capacitors have not been studied properly yet, and there is no sufficient information regarding the difference in the sensitivity to soldering between polymer and MnO2 tantalum capacitors. In this work, 16 types of polymer and 9 types of MnO2 cathodes tantalum capacitors with different moisture content have been tested before and after reflow soldering. The level of moisture release after soldering has been estimated and thermo-mechanical analysis used to assess deformation of capacitors during soldering simulations. Results show that moisture uptake in similar parts is approximately two times greater in polymer than in MnO2 capacitors. Cracking of the case and degradation of parameters can occur in both types of parts, but MnO2 capacitors are much more likely to fail catastrophically with a short circuit and possible ignition during the first power-on cycle. This type of failure in MnO2 capacitors is lot-related, can occur even at derated voltages and relatively low levels of moisture sorption corresponding to room conditions. Baking before soldering is an effective measure to prevent failures even in lots susceptible to popcorning damage. Recommendations for baking and testing to establish MSL are suggested.

Alexander Teverovsky↗

NASA NTRS2021

Effect of Preconditioning on Post-Soldering Failures in Tantalum Capacitors

Soldering have a strong effect on performance and reliability of most surface mount technology components, including tantalum capacitors. High quality tantalum capacitors are likely the only type of components where soldering simulation is the first step during screening. Nevertheless, post-soldering failures of tantalum capacitors do happen and require additional analysis. Popcorning is a well-known effect in plastic encapsulated microcircuits (PEM) and it occurs also in chip tantalum capacitors. The sensitivity of parts to the presence of moisture during soldering is characterized by the moisture sensitivity level (MSL); however, contrary to PEMs, there is no standard procedure for establishing MSL for tantalum capacitors, and standard J-STD-020 is applicable partially only. In this work, the effect of absorbed moisture on soldering related degradation and failures in tantalum capacitors have been studied using 22 types of polymer and 11 types of MnO2 cathodes tantalum capacitors including single and multianode parts. The amount of moisture released during soldering has been estimated by measurements of mass and capacitance variations. Results show that moisture uptake in similar parts is approximately two times greater in polymer than in MnO2 capacitors. Cracking of the case and degradation of parameters can occur in both types of parts, but MnO2 capacitors are much more susceptible to catastrophic short circuit failures and their ignition is possible during the first power-on cycle. This type of failure in MnO2 capacitors is lot-related, can occur even at derated voltages and relatively low levels of moisture sorption corresponding to room conditions. Baking before soldering is an effective measure to prevent failures even in lots susceptible to popcorning damage. Recommendations for testing to establish MSL and for baking to reduce the probability of failures are suggested.

tantalum polymer capacitors↗

NASA NTRS1989

Distortion and regulation characterization of a Mapham inverter

Output voltage Total Harmonic Distortion (THD) of a 20kHz, 6kVA Mapham resonant inverter is characterized as a function of its switching-to-resonant frequency ratio, f sub s/f sub r, using the EASY5 engineering analysis system. EASY5 circuit simulation results are compared with hardware test results to verify the accuracy of the simulations. The effects of load on the THD versus f sub s/f sub r ratio is investigated for resistive, leading, and lagging power factor load impedances. The effect of the series output capacitor on the Mapham inverter output voltage distortion and inherent load regulation is characterized under loads of various power factors and magnitudes. An optimum series capacitor value which improves the inherent load regulation to better than 3 percent is identified. The optimum series capacitor value is different than the value predicted from a modeled frequency domain analysis. An explanation is proposed which takes into account the conduction overlap in the inductor pairs during steady-state inverter operation, which decreases the effective inductance of a Mapham inverter. A fault protection and current limit method is discussed which allows the Mapham inverter to operate into a short circuit, even when the inverter resonant circuit becomes overdamped.

Sundberg, Richard C.↗

NASA NTRS1990

MIS capacitor studies on silicon carbide single crystals

Cubic SIC metal-insulator-semiconductor (MIS) capacitors with thermally grown or chemical-vapor-deposited (CVD) insulators were characterized by capacitance-voltage (C-V), conductance-voltage (G-V), and current-voltage (I-V) measurements. The purpose of these measurements was to determine the four charge densities commonly present in an MIS capacitor (oxide fixed charge, N(f); interface trap level density, D(it); oxide trapped charge, N(ot); and mobile ionic charge, N(m)) and to determine the stability of the device properties with electric-field stress and temperature. The section headings in the report include the following: Capacitance-voltage and conductance-voltage measurements; Current-voltage measurements; Deep-level transient spectroscopy; and Conclusions (Electrical characteristics of SiC MIS capacitors).

Kopanski, J. J.↗