Theoretical Analysis and Experimental Validation of Flying-Capacitor Multilevel Converters Under Short-Circuit Fault Conditions
Addressing the increasing demand for high- efficiency and high-power-density converters, the flying-capacitor multilevel converter has shown itself as a promising topology. A key advantage of this topology is the reduced voltage rating of the switches, though also makes it vulnerable to device failure during short-circuit conditions. Despite large interest in fault-tolerant operation of these converters, alongside detailed descriptions of flying capacitor balancing, little research has focused on the converter short-circuit fault analysis, which may cause a switch failure if not properly designed for. Therefore, this work presents a comprehensive model describing the large- signal short-circuit switching behavior of a general N -level flying- capacitor multilevel converter. Highly simplified models used to predict the evolution of the switch current and voltage stress during the fault are proposed, targeted at practicing engineers for conservative design guidelines. These models are used to determine the critical time for remedial action of the converter before reaching some predefined maximum conditions. A 2-to-10- level fully-configurable flying-capacitor multilevel converter and a fault circuit hardware prototype are used to experimentally perform different short-circuit tests that show a good match to the measured behavior.