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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 37 records · Page 2
All sourcesNASA NTRSDOE OSTI
NASA NTRS1966

Metal Oxide Silicon /MOS/ transistors protected from destructive damage by wire

Loop of flexible, small diameter, nickel wire protects metal oxide silicon /MOS/ transistors from a damaging electrostatic potential. The wire is attached to a music-wire spring, slipped over the MOS transistor case, and released so the spring tensions the wire loop around all the transistor leads, shorting them together. This allows handling without danger of damage.

Deboo, G. J.↗
NASA NTRS1995

Developing Low-Noise GaAs JFETs For Cryogenic Operation

Report discusses aspects of effort to develop low-noise, low-gate-leakage gallium arsenide-based junction field-effect transistors (JFETs) for operation at temperature of about 4 K as readout amplifiers and multiplexing devices for infrared-imaging devices. Transistors needed to replace silicon transistors, relatively noisy at 4 K. Report briefly discusses basic physical principles of JFETs and describes continuing process of optimization of designs of GaAs JFETs for cryogenic operation.

Cunningham, Thomas J.↗
NASA NTRS1966

Vapor grown silicon dioxide improves transistor base-collector junctions

Vapor grown silicon dioxide layer protects base-collector junction in silicon planar transistors during the emitter diffusion process. This oxide fills in any imperfections that exist in the thermally grown oxide layer and is of greater thickness than that layer. This process is used to deposit protective silicon dioxide coatings on optical surfaces.

Carley, D. R.↗
NASA NTRS1989

Radiation Damage In Advanced Bipolar Transistors

Report describes measurements of common-emitter current gains (hFE) of advanced bipolar silicon transistors before, during, and after irradiation with 275-MeV bromine ions, 2.5-MeV electrons, and conductivity rays from cobalt-60 atoms.

Zoutendyk, John A.↗
NASA NTRS2011

Total Ionizing Dose Test Report BFR92A NPN 5 GHz Wide Band Transistor from NXP

The purpose of this test was to characterize the Philips/NXP BFR92A NPN 5 gigahertz wide band silicon transistor for total dose response. This test shall serves as the radiation lot acceptance test (RLAT) for the lot date code (LDC) 1027. The BFR92A is packaged in a 3-pin plastic SOT23 package. Low dose rate (LDR/ELDRS) irradiations was performed.

Total Ionizing Dose (TID)↗
NASA NTRS2000

Smallest Nanoelectronic with Atomic Devices with Precise Structures

Since its invention in 1948, the transistor has revolutionized our everyday life - transistor radios and TV's appeared in the early 1960s, personal computers came into widespread use in the mid-1980s, and cellular phones, laptops, and palm-sized organizers dominated the 1990s. The electronics revolution is based upon transistor miniaturization; smaller transistors are faster, and denser circuitry has more functionality. Transistors in current generation chips are 0.25 micron or 250 nanometers in size, and the electronics industry has completed development of 0.18 micron transistors which will enter production within the next few years. Industry researchers are now working to reduce transistor size down to 0.13 micron - a thousandth of the width of a human hair. However, studies indicate that the miniaturization of silicon transistors will soon reach its limit. For further progress in microelectronics, scientists have turned to nanotechnology to advance the science. Rather than continuing to miniaturize transistors to a point where they become unreliable, nanotechnology offers the new approach of building devices on the atomic scale [see sidebar]. One vision for the next generation of miniature electronics is atomic chain electronics, where devices are composed of atoms aligned on top of a substrate surface in a regular pattern. The Atomic Chain Electronics Project (ACEP) - part of the Semiconductor Device Modeling and Nanotechnology group, Integrated Product Team at the NAS Facility has been developing the theory of understanding atomic chain devices, and the author's patent for atomic chain electronics is now pending.

Yamada, Toshishige↗
NASA NTRS2006

Design of a Multi-Level/Analog Ferroelectric Memory Device

Increasing the memory density and utilizing the dove1 characteristics of ferroelectric devices is important in making ferroelectric memory devices more desirable to the consumer. This paper describes a design that allows multiple levels to be stored in a ferroelectric based memory cell. It can be used to store multiple bits or analog values in a high speed nonvolatile memory. The design utilizes the hysteresis characteristic of ferroelectric transistors to store an analog value in the memory cell. The design also compensates for the decay of the polarization of the ferroelectric material over time. This is done by utilizing a pair of ferroelectric transistors to store the data. One transistor is used as a reference to determine the amount of decay that has occurred since the pair was programmed. The second transistor stores the analog value as a polarization value between zero and saturated. The design allows digital data to be stored as multiple bits in each memory cell. The number of bits per cell that can be stored will vary with the decay rate of the ferroelectric transistors and the repeatability of polarization between transistors. It is predicted that each memory cell may be able to store 8 bits or more. The design is based on data taken from actual ferroelectric transistors. Although the circuit has not been fabricated, a prototype circuit is now under construction. The design of this circuit is different than multi-level FLASH or silicon transistor circuits. The differences between these types of circuits are described in this paper. This memory design will be useful because it allows higher memory density, compensates for the environmental and ferroelectric aging processes, allows analog values to be directly stored in memory, compensates for the thermal and radiation environments associated with space operations, and relies only on existing technologies.

MacLeod, Todd C.↗