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At least 37 records · Page 2

Operating Reserves in ReEDS

This presentation provides an overview of the formulation for operating reserves in the Regional Energy Deployment System (ReEDS), a capacity expansion model. It describes the three reserve products modeled in ReEDS--regulation, spinning (contingency), and flexibility--and highlights recent updates to the modeling approach, including modifications to how storage provides reserves, the constraints on commitment for generators that provide reserves, and the costs for thermal units to provide spinning reserve. The presentation benchmarks operating reserve provision in ReEDS against comparable simulations in PLEXOS, finding that the improved formulation is different but yields results that are holistically similar to those in production cost modeling. In this presentation we also investigate the impact of different reserve options in the model (e.g., allowing wind and solar to provide operating reserves) on the solution. The results thus far indicate that most switches related to operating reserves exert little influence on the outcome on the results. Future work will continue to explore operating reserves in capacity expansion models, particularly for models with different temporal resolution.

14 SOLAR ENERGY↗

A comparison of VLSI architectures for time and transform domain decoding of Reed-Solomon codes

It is well known that the Euclidean algorithm or its equivalent, continued fractions, can be used to find the error locator polynomial needed to decode a Reed-Solomon (RS) code. It is shown that this algorithm can be used for both time and transform domain decoding by replacing its initial conditions with the Forney syndromes and the erasure locator polynomial. By this means both the errata locator polynomial and the errate evaluator polynomial can be obtained with the Euclidean algorithm. With these ideas, both time and transform domain Reed-Solomon decoders for correcting errors and erasures are simplified and compared. As a consequence, the architectures of Reed-Solomon decoders for correcting both errors and erasures can be made more modular, regular, simple, and naturally suitable for VLSI implementation.

Hsu, I. S.↗

VLSI single-chip (255,223) Reed-Solomon encoder with interleaver

The invention relates to a concatenated Reed-Solomon/convolutional encoding system consisting of a Reed-Solomon outer code and a convolutional inner code for downlink telemetry in space missions, and more particularly to a Reed-Solomon encoder with programmable interleaving of the information symbols and code correction symbols to combat error bursts in the Viterbi decoder.

Hsu, In-Shek↗

Group Ring Ideals Related to Reed–Muller Codes

Reed–Muller codes are one of the most well-studied families of codes; however, there are till open problems regarding their structure. Recently a new ring-theoretic approach has emerged that provides a rather intuitive construction of these codes. This approach is centered around the notion of basic Reed–Muller codes. It is known that basic Reed–Muller codes ℳ{sub π}(m, k) over a prime field are powers of the radical RS of a corresponding group algebra and over a nonprime field there are no such equalities, except for trivial ones. In this paper, we consider the ideals ℜ{sub S}ℳ{sub π}(m, k) that arise while studying the inclusions of the basic codes and radical powers.

97 MATHEMATICS AND COMPUTING↗

Space communication system for compressed data with a concatenated Reed-Solomon-Viterbi coding channel

A space communication system incorporating a concatenated Reed Solomon Viterbi coding channel is discussed for transmitting compressed and uncompressed data from a spacecraft to a data processing center on Earth. Imaging (and other) data are first compressed into source blocks which are then coded by a Reed Solomon coder and interleaver, followed by a convolutional encoder. The received data is first decoded by a Viterbi decoder, followed by a Reed Solomon decoder and deinterleaver. The output of the latter is then decompressed, based on the compression criteria used in compressing the data in the spacecraft. The decompressed data is processed to reconstruct an approximation of the original data-producing condition or images.

Rice, R. F.↗

The effects of Reed-Solomon code shortening on the performance of coded telemetry systems

The theory of Reed-Solomon code shortening in general was developed and the degradation due to shortening in the context of concatenated coding was qualified. It is shown that in the NASA/ESA concatenated system, significant degradations occur only when N 180. A Reed-Solomon code was concatenated with an inner (7, 1/2) convolutional code. Under some circumstances, it would be desirable to use a shorter outer code word length. For example, the format of the data coming from science instruments on board a spacecraft may lend itself naturally to a word length of 200 symbols rather than 223. To accommodate such code word lengths, the Reed-Solomon code can be shortened to an (N, N-32) code where N can be any integer between 33 and 255. Shortening the code, however, changes its performance. On one hand, the amount of redundancy per information symbol increases. Because of this increased redundancy, the amount of energy per information symbol is decreased by code shortening. The overall effect is to degrade the performance of the code.

Deutsch, L. J.↗

On the decode error probability for Reed-Solomon codes

Upper bounds on the decoder error probability for Reed-Solomon codes are derived. By definition, decoder error occurs when the decoder finds a codeword other than the transmitted codeword; this is in contrast to decoder failure, which occurs when the decoder fails to find any codeword at all. The results imply, for example, that for a t error correcting Reed-Solomon code of length q - 1 over GF(q), if more than t errors occur, the probability of decoder error is less than 1/t! In particular, for the Voyager Reed-Solomon code, the probability of decoder error given a word error is smaller than 3 x 10 to the minus 14th power. Thus, in a typical operating region with probability 100,000 of word error, the probability of undetected word error is about 10 to the minus 14th power.

Mceliece, R. J.↗

On the decoder error probability for Reed-Solomon codes

Upper bounds on the decoder error probability for Reed-Solomon codes are derived. By definition, decoder error occurs when the decoder finds a codeword other than the transmitted codeword; this is in contrast to decoder failure, which occurs when the decoder fails to find any codeword at all. The results imply, for example, that for a t error-correcting Reed-Solomon code of length q - 1 over GF(q), if more than t errors occur, the probability of decoder error is less than 1/t. In particular, for the Voyager Reed-Solomon code, the probability of decoder error given a word error is smaller than 3 x 10 to the minus 14th power. Thus, in a typical operating region with probability 100,000 of word error, the probability of undetected word error is about 10 to the minus 14th power.

Mceliece, Robert J.↗

More on the decoder error probability for Reed-Solomon codes

The decoder error probability for Reed-Solomon codes (more generally, linear maximum distance separable codes) is examined. McEliece and Swanson offered an upper bound on P sub E (u), the decoder error probability given that u symbol errors occurs. This upper bound is slightly greater than Q, the probability that a completely random error pattern will cause decoder error. By using a combinatoric technique, the principle of inclusion and exclusion, an exact formula for P sub E (u) is derived. The P sub e (u) for the (255, 223) Reed-Solomon Code used by NASA, and for the (31,15) Reed-Solomon code (JTIDS code), are calculated using the exact formula, and the P sub E (u)'s are observed to approach the Q's of the codes rapidly as u gets larger. An upper bound for the expression is derived, and is shown to decrease nearly exponentially as u increases. This proves analytically that P sub E (u) indeed approaches Q as u becomes large, and some laws of large numbers come into play.

Cheung, K.-M.↗

A new VLSI architecture for a single-chip-type Reed-Solomon decoder

A new very large scale integration (VLSI) architecture for implementing Reed-Solomon (RS) decoders that can correct both errors and erasures is described. This new architecture implements a Reed-Solomon decoder by using replication of a single VLSI chip. It is anticipated that this single chip type RS decoder approach will save substantial development and production costs. It is estimated that reduction in cost by a factor of four is possible with this new architecture. Furthermore, this Reed-Solomon decoder is programmable between 8 bit and 10 bit symbol sizes. Therefore, both an 8 bit Consultative Committee for Space Data Systems (CCSDS) RS decoder and a 10 bit decoder are obtained at the same time, and when concatenated with a (15,1/6) Viterbi decoder, provide an additional 2.1-dB coding gain.

Hsu, I. S.↗

More on the decoder error probability for Reed-Solomon codes

The decoder error probability for Reed-Solomon codes (more generally, linear maximum distance separable codes) is examined. McEliece and Swanson offered an upper bound on P sub E (u), the decoder error probability given that u symbol errors occur. This upper bound is slightly greater than Q, the probability that a completely random error pattern will cause decoder error. By using a combinatoric technique, the principle of inclusion and exclusion, an exact formula for P sub E (u) is derived. The P sub E (u) for the (255,223) Reed-Solomon Code used by NASA, and for the (31,15) Reed-Solomon code (JTIDS code), are calculated using the exact formula, and the P sub E (u)'s are observed to approach the Q's of the codes rapidly as u gets larger. An upper bound for the expression is derived, and is shown to decrease nearly exponentially as u increases. This proves analytically that P sub E (u) indeed approaches Q as u becomes large, and some laws of large numbers come into play.

Cheung, Kar-Ming↗

Custom CMOS Reed Solomon coder for the Hubble Space Telescope

A VLSI coder is presented that can function either as an encoder or decoder for Reed-Solomon codes. VLSI is one approach to implementing high-performance Reed-Solomon decoders. There are three VLSI technologies that could be used: gate arrays, standard cells, and full custom. The first two approaches are relatively easy to implement, but are limited in both performance and density. Full-custom VLSI is used to achieve both circuit density and speed, and allows control of the amount of interconnect. Speed, which is a function of capacitance, which is a function of interconnect, is an important parameter in high-performance VLSI. A single 8.2 mm x 8.4 mm, 200,000 transistor CMOS chip implementation of the Reed-Solomon code required by the Hubble Space Telescope is reported. The chip features a 10-MHz sustained byte rate independent of error pattern. The 1.6-micron CMOS integrated circuit has complete decoder and encoder functions and uses a single data/system clock. Block lengths up to 255 bytes and shortened codes are supported with no external buffering. Erasure corrections and random error corrections are supported with programmable correction of up to 10 symbol errors. Correction time is independent of error pattern and the number of errors in the incoming message.

Whitaker, S.↗

On the Trellis structure of a (64,40,8) subcode of the (64,42,8) third-order Reed-Muller code

A (64,40,8) subcode of the (64,42,8) third-order Reed-Muller code is proposed to NASA for high-speed satellite communications. This code can be either used alone or used as an inner-code in a concatenated coding system with the NASA standard (255,223,33) Reed-Solomon code as the outer code to achieve high performance with reduced decoding complexity. This Reed-Muller subcode has a relatively simple and parallel trellis structure and consequently can be decoded with a group of identical and relatively simple Viterbi decoders in parallel to achieve high-speed decoding. In this report, the complexities of various sectionalized trellis diagrams are analyzed. Based on this analysis, the trellis diagram with the smallest overall complexity will be used for the implementation of a high-speed decoder.

Moorthy, Hari T.↗

Representation of the Solar Capacity Value in the ReEDS Capacity Expansion Model: Preprint

An important emerging issue is the estimation of renewables' contributions to reliably meeting system demand, or their capacity value. While the capacity value of thermal generation can be estimated easily, assessment of wind and solar requires a more nuanced approach due to resource variability. Reliability-based methods, particularly, effective load-carrying capacity (ELCC), are considered to be the most robust techniques for addressing this resource variability. The Regional Energy Deployment System (ReEDS) capacity expansion model and other long-term electricity capacity planning models require an approach to estimating CV for generalized PV and system configurations with low computational and data requirements. In this paper we validate treatment of solar photovoltaic (PV) capacity value by ReEDS capacity expansion model by comparing model results to literature for a range of energy penetration levels. Results from the ReEDS model are found to compare well with both comparisons--despite not being resolved at an hourly scale.

14 SOLAR ENERGY↗

Double-reed exhaust valve engine

An engine based on a reciprocating piston engine that extracts work from pressurized working fluid. The engine includes a double reed outlet valve for controlling the flow of low-pressure working fluid out of the engine. The double reed provides a stronger force resisting closure of the outlet valve than the force tending to open the outlet valve. The double reed valve enables engine operation at relatively higher torque and lower efficiency at low speed, with lower torque, but higher efficiency at high speed.

33 ADVANCED PROPULSION SYSTEMS↗

Powered By ReEDS™ [Slides]

The National Renewable Energy Laboratory's flagship Regional Energy Deployment System (ReEDS) electric grid planning model is informing the answers to some of the biggest questions surrounding electricity sector research. Powered By ReEDS is the third webinar in the Powered By series. Each webinar highlights an innovative NREL grid planning and analysis tool and its real-world applications. The series is an exciting opportunity to learn directly from NREL's grid experts, so make sure to bring your questions.

24 POWER TRANSMISSION AND DISTRIBUTION↗

The fast decoding of Reed-Solomon codes using high-radix fermat theoretic transforms

Fourier-like transforms over GF(F sub n), where F sub n = 2(2n) + 1 is a Fermat prime, are applied in decoding Reed-Solomon codes. It is shown that such transforms can be computed using high-radix fast Fourier transform (FFT) algorithms requiring considerably fewer multiplications than the more usual radix 2 FFT algorithm. A special 256-symbol, 16-symbol-error-correcting, Reed-Solomon (RS) code for space communication-link applications can be encoded and decoded using this high-radix FFT algorithm over GF(F sub 3).

Liu, K. Y.↗

Simplified Correction Of Errors In Reed-Solomon Codes

New decoder realized by simplified pipeline architecture. Simplified procedure for correction of errors and erasures in Reed-Solomon codes expected to result in simpler decoding equipment. Development widens commercial applicability of Reed-Solomon codes, used to correct bursts of errors in digital communication and recording systems. Improved decoder less complex. Made more regular, simple, and suitable for implementation in both VLSI and software.

Truong, T. K.↗