Engineering PapersSearch

SEARCH · Engineering Papers

Results for “RESISTANCE DEVICE”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 37 records · Page 2

Atomically Precise Graphene Nanoribbon Transistors with Long-Term Stability and Reliability

Atomically precise graphene nanoribbons (GNRs) synthesized from the bottom-up exhibit promising electronic properties for high-performance field-effect transistors (FETs). The feasibility of fabricating FETs with GNRs (GNRFETs) has been demonstrated, with ongoing efforts aimed at further improving their performance. However, their long-term stability and reliability remain unexplored, which is as important as their performance for practical applications. In this work, we fabricated short-channel FETs with nine-atom-wide armchair GNRs (9-AGNRFETs). We revealed that the on-state (/ ON ) current performance of the 9-AGNRFETs deteriorates significantly over consecutive full transistor on and off logic cycles, which has neither been demonstrated nor previously considered. To address this issue, we deposited a thin ~10 nm thick atomic layer deposition (ALD) layer of aluminum oxide (Al 2 O 3 ) directly on these devices. The integrity, compatibility, electrical performance, stability, and reliability, of the GNRFETs before and/or after Al 2 O 3 deposition were comprehensively studied. The results indicate that the observed decline in electrical device performance is most likely due to the degradation of contact resistance over multiple measurement cycles. We successfully demonstrated that the devices with the Al 2 O 3 layer operate well up to several thousand continuous full cycles without any degradation. Our study offers valuable insights into the stability and reliability of GNR transistors, which could facilitate their large-scale integration into practical applications.

36 MATERIALS SCIENCE

Thermal Management of Discretized Heaters Using CuW Microchannel Heat Sinks and FC3283

Single-phase cooling using microchannel heat sinks (MCHS) has become a popular approach for overcoming the thermal challenges associated with high-powered microelectronic devices. Thermal management is one of the largest barriers to higher power densities in electronics and frequently limits overall device performance. The implementation of forced convective cooling via single-phase liquid cooling in MCHS reduces the thermal resistance resulting in lower device temperatures at high-power conditions, which can decrease the package size and extend the lifespan of devices. The goal of the work described in this article was to investigate practical cooling solutions for laser diode bars. This study examined the effectiveness of a copper tungsten (CuW) microchannel heat sink paired with a dielectric coolant (FC3283) for dissipating both discrete and uniform heat fluxes up to 600 W/cm2 across a 0.25-cm2 surface area through a numerical and experimental study. CuW was chosen as the MCHS material because it is thermal expansion matched to GaAs, which is a common laser diode substrate. FC3283 serves as a dielectric coolant that is compatible with power electronics cooling. The microchannels utilized in this work were approximately $365$ $μ$ m deep and $100$ $μ$ m wide resulting in a hydraulic diameter of $160$ $μ$ m. The study investigated the cooling performance across a variety of applied power loads and flow rates to determine optimal effectiveness. The resulting thermal resistance ranged from 0.15 cm2 K/W at the highest flow rate to 0.26 cm2 K/W at the lowest flow rate. Further, the resulting thermal performance from this study demonstrates the importance of considering discrete heat sources separately from uniform heat sources and proved that the unique combination of CuW microchannels with FC3283 can be a promising cooling option toward future advancements of laser diode bars and other high-power microelectronics.

42 ENGINEERING

InAs sidewall tunnel diodes enabled by surface states

Negative differential resistance (NDR), where the device current decreases with increasing bias voltage, is a representative phenomenon where quantum mechanics induces counterintuitive physical behavior and offers promising applications such as high-frequency oscillators, amplifiers, and multilevel logic circuits. While the NDR behavior has been extensively studied in various materials and devices, the role of surface properties in NDR, particularly in InAs-based diodes, remains underexplored. In this work, we report the observation of NDR in vertically structured InAs p + n diodes that exhibit a peak-valley current ratio of ∼6, which is suitably high for applications. Circumference-normalized current–voltage characterization revealed that the NDR originates from band-to-band tunneling between the valence band of p + -InAs and the conduction band of an n + -InAs surface, where the n + surface is due to surface states on otherwise n − -InAs. In addition, by comparing devices with various surface passivation methods (without intentional passivation, benzocyclobutene polymer, and silicon nitride), we found that the surface termination significantly affects the NDR characteristics. We present an equivalent circuit model to explain the observed device behavior. These findings offer insights into surface-enabled NDR phenomena and present new knobs for engineering NDR devices.

Circuit theorems

In situ synchrotron x-ray studies of epitaxial SrCoO x films during ionic liquid gating

The manipulation of ions in complex oxide materials can be used to mimic brain-like plasticity through changes to the resistivity of a neuromorphic device. Advances in the design of more energy efficient devices require improved understanding of how ions migrate within a material and across its interface. We investigate the exchange of oxygen and hydrogen in a model SrCoO x epitaxial film—a material that transitions between a ferromagnetic metal and antiferromagnetic insulator depending on the oxygen concentration. Changes to the film during ionic liquid gating were measured by in situ synchrotron x-ray techniques as a function of time and gate voltage, examining the reversibility of the oxide over one complete gating cycle. We find that the out-of-plane lattice constant and oxygen vacancy concentration of SrCoO x are largely reversible although changes were observed in the ordered vacancy structure. Our results provide much needed insight into electrolyte-gated phase behavior in the transition metal oxides.

Li, Yan [Argonne National Laboratory (ANL), Argonn

Investigation of the Effect of Gate Oxide Screening with Adjustment Pulse on Commercial SiC Power MOSFETs

This paper presents a method to recover the negative threshold voltage shift during high field gate oxide screening of 1.2 kV 4H-SiC MOSFETs with an additional adjustment gate voltage pulse. To reduce field failure rates of the MOSFETs in operation, manufacturers perform a screening treatment to remove devices with extrinsic defects in the oxide. Current gate oxide screening procedures are limited to oxide fields at or below ~9 MV/cm for short durations (<1 s), which is not enough to remove all the devices with extrinsic defects. The results show that by implementing a lower field gate pulse, the threshold voltage shift can be partially recovered, and therefore the maximum screening field and time can be increased. However, both the initial screening pulse and the adjustment pulse require careful calibration to prevent significant degradation of the device threshold voltage, on-resistance, interface state density, or intrinsic lifetime. With a well calibrated set of pulses, higher screening fields can be utilized without significantly damaging the devices. This leads to an improvement in the overall screening efficiency of the process, reducing the number of devices with extrinsic oxide defects entering the field, and improving the reliability of the SiC MOSFETs in operation.

42 ENGINEERING

Characterization of the fatigue threshold behavior of UHMWPE

Ultra-high-molecular-weight-polyethylene (UHMWPE) has been the material of choice for bearings in total joint replacements (TJRs) for decades as a result of its excellent wear resistance, chemical inertness, energetic toughness, low friction, and biocompatibility. Utilization of this polymer in orthopedic devices requires oxidation, wear, and fatigue resistance. Balancing these important properties by tailoring processing techniques and modulating microstructural features has been an ongoing endeavor in the field. Research into the clinical applications of UHMWPE has primarily focused on the challenges of wear and oxidation while studies into the realm of fatigue have been more limited. Literature gaps exist in fully understanding the fatigue crack initiation near notches or propagation of small existing flaws in UHMWPE used in TJRs. In particular, the characterization of the fatigue thresholds and near-threshold fatigue behavior of orthopedic grade UHMWPE has yet to be thoroughly explored. In this work, we characterized the fatigue crack arrest threshold of clinically-relevant UHMWPE formulations. Correlations between the fatigue thresholds and bulk mechanical properties as well as microstructural properties were examined across these medical resins. The important role played by crosslinking in influencing the fatigue performance of UHMWPE is highlighted in this study. In addition, it is established that J-integral fracture toughness is the best predictor of fatigue thresholds and could possibly be used as a stand-in metric for fatigue performance if thresholds cannot be directly ascertained. Finally, this study corroborates that the true constitutive parameters best describe the mechanical behavior of UHMWPE.

Cross-linking

Patterned, Low-Temperature Growth of Transition Metal Dichalcogenides for Low Resistance Raised Contacts

Transition metal dichalcogenide (TMD) monolayers are promising channel materials for next-generation electronic devices. A challenge is the high contact resistance between monolayer TMDs and metal contacts, especially for holes. Here, in this regard, raised source/drain contacts are promising. However, the direct, patterned growth of raised contacts at CMOS-compatible temperatures remains largely unresolved. We present plasma-free selenization and sulfurization of metal oxides at substrate temperatures down to 400 °C, compatible with back-end-of-line thermal budgets. To achieve growth at such temperatures, gas-phase chalcogen precursors are first thermally activated at 950 °C. Films grown on single-crystal monolayer TMDs exhibit high crystal quality, as confirmed by transmission electron microscopy. Raised contacts on WSe 2 monolayers fabricated using this approach yield a low hole contact resistance of 0.3 kΩ·μm after chemical doping. This process is shown to be applicable to growing various TMDs, including WS 2 , MoSe 2 , MoS 2 , PtSe 2 , and NbS 2 .

contact engineering

Local strain inhomogeneities during electrical triggering of a metal–insulator transition revealed by X-ray microscopy

Electrical triggering of a metal–insulator transition (MIT) often results in the formation of characteristic spatial patterns such as a metallic filament percolating through an insulating matrix or an insulating barrier splitting a conducting matrix. When MIT triggering is driven by electrothermal effects, the temperature of the filament or barrier can be substantially higher than the rest of the material. Using X-ray microdiffraction and dark-field X-ray microscopy, we show that electrothermal MIT triggering leads to the development of an inhomogeneous strain profile across the switching device, even when the material does not undergo a pronounced, discontinuous structural transition coinciding with the MIT. Diffraction measurements further reveal evidence of unique features associated with MIT triggering including lattice distortions, tilting, and twinning, which indicate structural nonuniformity of both low- and high-resistance regions inside the switching device. Such lattice deformations do not occur under equilibrium, zero-voltage conditions, highlighting the qualitative difference between states achieved through increasing temperature and applying voltage in nonlinear electrothermal materials. Electrically induced strain, lattice distortions, and twinning could have important contributions in the MIT triggering process and drive the material into nonequilibrium states, providing an unconventional pathway to explore the phase space in strongly correlated electronic systems.

42 ENGINEERING

Effect of Networking Density on the Patterning Performance of Molecular Layer Deposited Alucone Electron Beam/EUV Resists

One of the main barriers to continued device scaling in the era of extreme ultraviolet (EUV) lithography is the need for improved photoresist chemistries to address challenges such as poor EUV sensitivity, inadequate etch resistance, and pattern collapse. Metal-organic photoresists are a promising class of materials that can address many of these challenges, and among them, resists deposited via hybrid molecular layer deposition (MLD) have attracted interest for their unique advantages in thickness control, chemical homogeneity, and compatibility with vacuum processing. However, despite many successful demonstrations of patterning, little is known about how the molecular design of hybrid MLD resists affects their lithographic performance. In this work, we study the effect of the network structure, a common feature among all hybrid MLD resists, via a series of aluminum alkoxide ("alucone") negative tone resists with varying networking density. Their patterning mechanism is investigated via electron beam lithography (EBL)─a common proxy for EUV─and compared to their EUV-induced reactions studied via flood exposure and in situ characterization. In conclusion, we show that the resist with the least networking density demonstrates the best sensitivity and resolution, with the ability to resolve dense line/space gratings as small as 14 nm half pitch via EBL.

electron beam lithography

Direct‐Write Printed Contacts to Layered and 2D Materials

Advancements in fabrication methods have shaped new computing device technologies. Among these methods, depositing electrical contacts to the channel material is fundamental to device characterization. Novel layered and 2D materials are promising for next-generation computing electronic channel materials. Direct-write printing of conductive inks is introduced as a surprisingly effective, significantly faster, and cleaner method to contact different classes of layered materials, including graphene (semi-metal), MoS 2 (semiconductor), Bi-2212 (superconductor), and Fe 5 GeTe 2 (metallic ferromagnet). Based on the electrical response, the quality of the printed contacts is comparable to what is achievable with resist-based lithography techniques. These devices are tested by sweeping gate voltage, temperature, and magnetic field to show that the materials remain pristine post-processing. This work demonstrates that direct-write printing is an agile method for prototyping and characterizing the electrical properties of novel layered materials.

2D materials

Acoustic and optical phonon frequencies and acoustic phonon velocities in Si-doped AlN thin films

We report the results of the study of the acoustic and optical phonons in Si-doped AlN thin films grown by metal–organic chemical vapor deposition on sapphire substrates. The Brillouin–Mandelstam and Raman light scattering spectroscopies were used to measure the acoustic and optical phonon frequencies close to the Brillouin zone center. The optical phonon frequencies reveal non-monotonic changes, reflective of the variations in the thin film strain and dislocation densities with the addition of Si dopant atoms. The acoustic phonon velocity decreases monotonically with increasing Si dopant concentration, reducing by ∼300 m/s at the doping level of 3 × 1019 cm−3. The knowledge of the acoustic phonon velocities can be used for the optimization of the ultra-wide bandgap semiconductor heterostructures and for minimizing the thermal boundary resistance of high-power devices.

Physics

SULI Deliverables Using: Python-B1500 [Slides]

A new electrical setup for testing ECRAM devices is described in this presentation. This presentation details the background of ECRAM devices, how the B1500 is used to program ECRAM devices, and the python GUI that was created for controlling the B1500. ECRAM devices are a form of non-volatile memory. The stored data is the resistance between two of the terminals on the device. Using only the B1500, the ECRAM devices can be programmed and the state read out. This creates a simple, logical testing setup. The overall setup was successful, ECRAM devices could easily be programmed and measured. However, there is still room for improvement. Specifically, in the creation of an automated “Program” feature and a “Data Collection” feature. These features will require additional advances in the understanding of ECRAM devices but will greatly automate and improve the current data collection and application of ECRAM devices.

42 ENGINEERING

Feasibility of Passive MOSFET Paralleling for Photovoltaic Current-Voltage Curves

Current-voltage curves are an important method of characterizing Photovoltaic (PV) Modules. NREL has developed several low-cost MOSFET-based devices that can characterize PV cells and modules. The size of PV modules that can be measured is limited by the power limitations of a single MOSFET. By using multiple MOSFET devices, each can operate at a lower current, paralleled on resistance is also decreased allowing for higher power loads. Operating multiple devices in parallel can cause an imbalance in current, thus causing some devices to conduct more, pushing them into a thermal runaway condition. To investigate this, an active feedback circuit was tested with paralleled devices using a PV module load. The efficacy, limitations, and design considerations of using parallel MOSFET loads for PV characterization are explored. This work is not new, but the implementation of a paralleled architecture in a low cost characterization tool is novel.

14 SOLAR ENERGY

Multistate resistance in TaN/(Hf,Zr)O 2 /Ta ferroelectric tunnel junctions

Ferroelectric tunnel junctions (FTJs) utilizing hafnium zirconium oxide (HZO) have emerged as promising non-volatile memory elements for microelectronics, compatible with back end of line (BEOL) complementary–metal–oxide semiconductor fabrication. This study investigates asymmetric electrode TaN/HZO/Ta devices with a 6 nm thick HZO layer as FTJs for multistate resistive memory applications. The individual FTJs exhibit a resistance ratio exceeding 10× when utilized as a binary state device, with pulsing between −1.7 and +1.4 V to set the high resistance state (HRS) and low resistance state (LRS), respectively. Following with reduced write voltage pulses allows the ferroelectric device to operate with a selection of over 32 distinct resistance states (2 5 bits) between the LRS and HRS. This work then explores the stability of the resistance states during write/read pulse cycling, along with the stability of the state after multiple read pulses. Accessing the multibit state shows stability within 50 reads with the binary state remaining stable for more than 4000 reads pulses. With their multistate tunability and versatility, FTJs hold promise as BEOL memory elements for compute-in-memory (CiM) arrays, binary digital memory, or weighted vector matrix multiplication applications with low power consumption during computations.

CMOS

Stress accommodation in nanoscale dolan bridges designed for superconducting qubits

Josephson junctions are the principal circuit element in numerous superconducting quantum information devices and can be readily integrated into large-scale electronics. However, device integration at the wafer scale necessarily depends on having a reliable, high-fidelity, and high-yield fabrication method for creating Josephson junctions. When creating Al/AlO x based superconducting qubits, the standard Josephson junction fabrication method relies on a sub-micron suspended resist bridge, known as a Dolan bridge, which tends to be particularly fragile and can often times fracture during the resist development process, ultimately resulting in device failure. In this work, we demonstrate a unique Josephson junction lithography mask design that incorporates stress-relief channels. Our simulation results show that the addition of stress-relief channels reduces the lateral stress in the Dolan bridge by more than 70% for all the bridge geometries investigated. In practice, our novel mask design significantly increased the survivability of the bridge during device processing, resulting in 100% yield for over 100 Josephson junctions fabricated.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND

Harnessing the Second-Order Metal−Insulator Transition for Neuromorphic Computing

Vanadium oxides are widely studied phase change materials for brain-inspired computing architectures. Systems like VO 2 and V 2 O 3 exhibit first-order metal−insulator transitions (MITs) with hysteresis and percolative switching, increasing stochasticity and device variability. Here, we focus on the less explored Magnéli phase V 4 O 7 , which undergoes a continuous, non-hysteretic, second-order MIT. This surprisingly enables highly reproducible volatile resistive switching in spiking-neuron-type devices. We synthesize V 4 O 7 films, characterize their structural and transport properties, and demonstrate voltage and current-driven threshold switching with electrothermal feedback. In a Pearson–Anson oscillator, V 4 O 7 devices produce stable, tunable spiking across 20–200 kHz, with consistent operation among multiple devices. We introduce a numerical analog leaky-integrate-and-fire (aLIF) model that captures waveform shapes and their dependence on load resistance, temperature, and voltage. Furthermore, these findings suggest that second-order MIT materials like V 4 O 7 are promising for deterministic, scalable spiking neuron arrays for neuromorphic computing.

V4O7

Mobility and threshold voltage extraction in transistors with gate-voltage-dependent contact resistance

The mobility of emerging (e.g., two-dimensional, oxide, organic) semiconductors is commonly estimated from transistor current-voltage measurements. However, such devices often experience contact gating, i.e., electric fields from the gate modulate the contact resistance during measurements, which can lead conventional extraction techniques to estimate mobility incorrectly even by a factor >2. Although this error can be minimized by measuring transistors at high gate-source bias |V gs |, this regime is often inaccessible in emerging devices that suffer from high contact resistance or early gate dielectric breakdown. Here, we propose a method of extracting mobility in transistors with gate-dependent contact resistance that does not require operation at high |V gs |, enabling accurate mobility extraction even in emerging transistors with strong contact gating. Our approach relies on updating the transfer length method (TLM) and can achieve <10% error even in regimes where conventional techniques overestimate mobility by >2×

36 MATERIALS SCIENCE

Low cost switching circuit for van der Pauw resistivity and Hall measurements at various temperatures

The electrical characterization of materials, particularly superconductors, semiconductors, and those undergoing metal-insulator transitions (MITs), relies significantly on resistivity and Hall measurements as a function of temperature. The van der Pauw four-point probe method is commonly used for such measurements, which involves resistance measurements for different circuit configurations connected to sample contacts. However, repeating these measurements at different temperatures is challenging and time consuming. Here, this study introduces a novel approach utilizing a switching circuit controlled by an Arduino device and a LabVIEW program to automate resistance measurements for different electrical configurations. The effectiveness of this setup was demonstrated by testing V 2 O 3 thin film samples deposited on Al 2 O 3 (001) substrates using DC magnetron sputtering. The MIT temperature of the sample was 115 K during heating and 100 K during cooling. The sample exhibited p-type charge carriers with a Hall coefficient of 1.3 ± 0.1 x 10 -4 cm 3 /C and Hall mobility of 1.7 x 10 -1 cm 2 /V∙s, which is consistent with findings from other studies employing commercial equipment.

36 MATERIALS SCIENCE