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28 records · Page 2

Optical Phase-Locked Loop For Optical Communication

Experimental apparatus includes two diode-pumped solid-state lasers of non-planar-ring-oscillator type, one represents the transmitting oscillator, other local oscillator in receiver. Output of transmitting oscillator is amplitude-modulated with pulse-position-modulated data stream. Phase-error variance of less than 0.05 mrad(Sup 2) achieved with relatively-narrow-band loop. Applications include free-space and fiber-optic communications, navigation, and scientific instrumentation in which receivers are required to track phases of transmitted signals.

Win, Moe Z.↗

Sample-Clock Phase-Control Feedback

To demodulate a communication signal, a receiver must recover and synchronize to the symbol timing of a received waveform. In a system that utilizes digital sampling, the fidelity of synchronization is limited by the time between the symbol boundary and closest sample time location. To reduce this error, one typically uses a sample clock in excess of the symbol rate in order to provide multiple samples per symbol, thereby lowering the error limit to a fraction of a symbol time. For systems with a large modulation bandwidth, the required sample clock rate is prohibitive due to current technological barriers and processing complexity. With precise control of the phase of the sample clock, one can sample the received signal at times arbitrarily close to the symbol boundary, thus obviating the need, from a synchronization perspective, for multiple samples per symbol. Sample-clock phase-control feedback was developed for use in the demodulation of an optical communication signal, where multi-GHz modulation bandwidths would require prohibitively large sample clock frequencies for rates in excess of the symbol rate. A custom mixedsignal (RF/digital) offset phase-locked loop circuit was developed to control the phase of the 6.4-GHz clock that samples the photon-counting detector output. The offset phase-locked loop is driven by a feedback mechanism that continuously corrects for variation in the symbol time due to motion between the transmitter and receiver as well as oscillator instability. This innovation will allow significant improvements in receiver throughput; for example, the throughput of a pulse-position modulation (PPM) with 16 slots can increase from 188 Mb/s to 1.5 Gb/s.

Quirk, Kevin J.↗

An Arbitrary Time Interval Generator Base on Vernier Clocks with 0.67 ps Adjustable Steps Implemented in FPGA

In TDC testing and timing system implementations, it is often necessary to generate signal pulses with finely adjustable time intervals. In delay cell–based schemes, the adjustment resolution is constrained by the propagation delay of the cells—typically 15–20 ps per step—and is sensitive to temperature and supply voltage variations. This document presents a fully digital approach that uses two vernier clocks, generated by two stages of cascaded phase-locked loops (PLLs) with a slight frequency difference, to achieve adjustable timing intervals through accumulated phase differences. The scheme was validated on two families of low-cost FPGA devices, achieving adjustable step sizes of 0.67 ps and 0.97 ps.

Wu, Jin-yuan [Fermilab] (ORCID:0000000344329521)↗

Timing performance of phased-locked loops in optical pulse position modulation communication systems

An optical digital communication system requires that an accurate clock signal be available at the receiver for proper synchronization with the transmitted signal. Phase synchronization is especially critical in M-ary pulse position modulation (PPM) systems where the optimum decision scheme is an energy detector which compares the energy in each of M time slots to decide which of M possible words was sent. Timing errors cause energy spillover into adjacent time slots (a form of intersymbol interference) so that only a portion of the signal energy may be attributed to the correct time slot. This effect decreases the effective signal, increases the effective noise, and increases the probability of error. A timing subsystem for a satellite-to-satellite optical PPM communication link is simulated. The receiver employs direct photodetection, preprocessing of the detected signal, and a phase-locked loop for timing synchronization. The variance of the relative phase error is examined under varying signal strength conditions as an indication of loop performance, and simulation results are compared to theoretical calculations.

Lafaw, D. A.↗

Compact, All-PM Fiber Integrated and Alignment-Free Ultrafast Yb:Fiber NALM Laser With Sub-Femtosecond Timing Jitter

We report a simple and compact design of a dispersion compensated mode-locked Yb:fiber oscillator based on a nonlinear amplifying loop mirror (NALM). The fully polarization maintaining (PM) fiber integrated laser features a chirped fiber Bragg grating (CFBG) for dispersion compensation and a fiber integrated compact non-reciprocal phase bias device, which is alignment-free. The main design parameters were determined by numerically simulating the pulse evolution in the oscillator and by analyzing their impact on the laser performance. Experimentally, we achieved an 88 fs compressed pulse duration with sub-fs timing jitter at 54 MHz repetition rate and 51 mW of output power with 5.5×10 -5 [20 Hz, 1 MHz] integrated relative intensity noise (RIN). Furthermore, we demonstrate tight phase-locking of the laser's carrier-envelope offset frequency ( fceo ) to a stable radio frequency (RF) reference and of one frequency comb tooth to a stable optical reference at 291 THz.

47 OTHER INSTRUMENTATION↗

Phase-locked servo system

A phase lock servo system is described for synchronizing the rotation of a slip ring assembly with the rotation of an air bearing table so that a minimum of torque will be imparted through cables extending from the slip ring assembly to the air bearing table as such is rotated. The system includes two servo loops. The first servo loop includes a rate gyroscope carried on the air bearing table which generates a signal through a summing junction to be compared with a signal coming from a tachometer coupled to the slip ring assembly. The corrective signal is applied to a torque motor for rotating the slip ring assembly. The second servo loop includes a pair of photo detector cells which generate pulses responsive to the rotation of the air bearing table and slip ring assembly which are fed through a phase detector, and a variable gain amplifier to the summing junction circuit to provide a fine adjustment for rotating the slip ring assembly.

Burdin, C.↗

Commutated automatic gain control system

A commutated automatic gain control (AGC) system was designed and built for a prototype Loran C receiver. The receiver uses a microcomputer to control a memory aided phase-locked loop (MAPLL). The microcomputer also controls the input/output, latitude/longitude conversion, and the recently added AGC system. The circuit designed for the AGC is described, and bench and flight test results are presented. The AGC circuit described actually samples starting at a point 40 microseconds after a zero crossing determined by the software lock pulse ultimately generated by a 30 microsecond delay and add network in the receiver front end envelope detector.

Yost, S. R.↗

Experimental Validation of Pulse Phase Tracking for X-Ray Pulsar Based

Pulsars are a form of variable celestial source that have shown to be usable as aids for autonomous, deep space navigation. Particularly those sources emitting in the X-ray band are ideal for navigation due to smaller detector sizes. In this paper X-ray photons arriving from a pulsar are modeled as a non-homogeneous Poisson process. The method of pulse phase tracking is then investigated as a technique to measure the radial distance traveled by a spacecraft over an observation interval. A maximum-likelihood phase estimator (MLE) is used for the case where the observed frequency signal is constant. For the varying signal frequency case, an algorithm is used in which the observation window is broken up into smaller blocks over which an MLE is used. The outputs of this phase estimation process were then looped through a digital phase-locked loop (DPLL) in order to reduce the errors and produce estimates of the doppler frequency. These phase tracking algorithms were tested both in a computer simulation environment and using the NASA Goddard Space flight Center X-ray Navigation Laboratory Testbed (GXLT). This provided an experimental validation with photons being emitted by a modulated X-ray source and detected by a silicon-drift detector. Models of the Crab pulsar and the pulsar B1821-24 were used in order to generate test scenarios. Three different simulated detector trajectories were used to be tracked by the phase tracking algorithm: a stationary case, one with constant velocity, and one with constant acceleration. All three were performed in one-dimension along the line of sight to the pulsar. The first two had a constant signal frequency and the third had a time varying frequency. All of the constant frequency cases were processed using the MLE, and it was shown that they tracked the initial phase within 0.15% for the simulations and 2.5% in the experiments, based on an average of ten runs. The MLE-DPLL cascade version of the phase tracking algorithm was used in the varying frequency case. This resulted in tracking of the phase and frequency by the DPLL outputs in both the simulation and experimental environments. The crab pulsar was experimentally tested with a trajectory with a higher acceleration. In this case the phase error tended toward zero as the observation extended to 250 seconds and the doppler frequency error tended to zero in under 100 seconds.

Experimental↗

Carrier and sampling frequency offset estimation for RF communication with crystal-less nodes

When the ultra-low power mm-scale sensor node does not have a crystal oscillator and phase-lock loop, it inevitably exhibits significant carrier frequency offset (CFO) and sampling frequency offset (SFO) with respect to the reference frequencies in the gateway. This disclosure enables efficient real-time calculation of accurate SFO and CFO at the gateway, thus the ultra-low power mm-scale sensor node can be realized without a costly and bulky clock reference crystal and also power-hungry phase lock loop. In the proposed system, the crystal-less sensor starts transmission with repetitive RF pulses with a constant interval, followed by the data payload using pulse-position modulation (PPM). A proposed algorithm uses a two-dimensional (2D) fast Fourier transform (FFT) based process that identifies the SFO and CFO at the same time to establish successful wireless communication between the gateway and crystal-less sensor nodes.

Kim, Hun-Seok↗