Engineering Papers⌕ Search

SEARCH · Engineering Papers

Results for “PCB Fabrication”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 37 records · Page 2

Distributed Capacitive Sensor for Sample Mass Measurement

Previous robotic sample return missions lacked in situ sample verification/ quantity measurement instruments. Therefore, the outcome of the mission remained unclear until spacecraft return. In situ sample verification systems such as this Distributed Capacitive (DisC) sensor would enable an unmanned spacecraft system to re-attempt the sample acquisition procedures until the capture of desired sample quantity is positively confirmed, thereby maximizing the prospect for scientific reward. The DisC device contains a 10-cm-diameter pressure-sensitive elastic membrane placed at the bottom of a sample canister. The membrane deforms under the weight of accumulating planetary sample. The membrane is positioned in close proximity to an opposing rigid substrate with a narrow gap. The deformation of the membrane makes the gap narrower, resulting in increased capacitance between the two parallel plates (elastic membrane and rigid substrate). C-V conversion circuits on a nearby PCB (printed circuit board) provide capacitance readout via LVDS (low-voltage differential signaling) interface. The capacitance method was chosen over other potential approaches such as the piezoelectric method because of its inherent temperature stability advantage. A reference capacitor and temperature sensor are embedded in the system to compensate for temperature effects. The pressure-sensitive membranes are aluminum 6061, stainless steel (SUS) 403, and metal-coated polyimide plates. The thicknesses of these membranes range from 250 to 500 m. The rigid substrate is made with a 1- to 2-mm-thick wafer of one of the following materials depending on the application requirements glass, silicon, polyimide, PCB substrate. The glass substrate is fabricated by a microelectromechanical systems (MEMS) fabrication approach. Several concentric electrode patterns are printed on the substrate. The initial gap between the two plates, 100 m, is defined by a silicon spacer ring that is anodically bonded to the glass substrate. The fabricated proof-of-concept devices have successfully demonstrated tens to hundreds of picofarads of capacitance change when a simulated sample (100 g to 500 g) is placed on the membrane.

Toda, Risaku↗

Wideband Array for C, X, and Ku-Band Applications with 5.3:1 Bandwidth

Planar arrays that exploit strong intentional coupling between elements have allowed for very wide bandwidths in low-profile configurations. However, such designs also require complex impedance matching networks that must also be very compact. For many space applications, typically occurring at C-, X-, Ku-, and most recently at Ka-band, such designs require specialized and expensive fabrication techniques. To address this issue, a novel ultra-wideband array is presented, using a simplified feed network to reduce fabrication cost. The array operates from 3.5-18.5 GHz with VSWR less than 2.4 at broadside, and is of very low profile, having a total height of lambda/10 at the lowest frequency of operation. Validation is provided using a 64-element prototype array, fabricated using common Printed Circuit Board (PCB) technology. The low size, weight, and cost of this array make it attractive for space-borne applications.

X-↗

Reducing Printed Circuit Board Emissions with Low-Noise Design Practices

This paper presents the results of an experiment designed to determine the effectiveness of adopting several low-noise printed circuit board (PCB) design practices. Two boards were designed and fabricated, each consisting of identical mixed signal circuitry. Several important differences were introduced between the board layouts: one board was constructed using recommended low-noise practices and the other constructed without such attention. The emissions from the two boards were then measured and compared, demonstrating an improvement in radiated emissions of up to 22 dB.

Bradley, Arthur T.↗

Characterization of Low-Temperature, Co-Fired Ceramic-Manufactured Electrostatic Thruster-Closeout Report

The goal of the project was to evaluate prototypes of an experimental thruster developed by the University of Arkansas (UA), Fayetteville, AR. The design under evaluation is a radio frequency (RF) electrostatic thruster that was fabricated using the low-temperature, co-fired ceramic (LTCC) materials and fabrication process. This materials system is analogous to printed circuit board (PCB) technology with the most significant difference being that the laminate is replaced by a ceramic material and the copper layer is replaced by printed sinterable silver paste. LTCC designs are baked after fabrication and assembled to realize an entirely monolithic structure with internal conductors, vias, and cavities. In this process, the LTCC electrostatic thruster (LTCC-ET) that is the subject of the present work becomes a monolithic ceramic thruster capable of withstanding temperatures in excess of 500 ºC. The UA and NASA Marshall Space Flight Center (MSFC) jointly performed prototype testing on the LTCC-ET under a NASA Cooperative Agreement Notice (CAN) award. The LTCC-ET was tested at MSFC in May 2018 over a 1-week period. There were two goals for the test program: (1) Testing to determine the operating parameters required to create plasma ignition in the test articles. This was explored by setting a propellant flowrate and increasing RF power until plasma ignition was observed. Testing was conducted with both argon and krypton. (2) Investigate the thrust and specific impulse (Isp) performance of the thruster as a function of propellant flowrate and grid voltage. This goal was not met during the project as technical challenges in maintaining stable plasma ignition arose due to stress and heating of the RF power feed. In summary, a prototype thruster design (consisting of three packaged units) was fabricated by UA and tested for the first time under vacuum conditions at MSFC to experimentally determine basic performance metrics and functionality. It was found that the design was not sufficiently optimized or robust enough in its initial iteration to support a significant test campaign or characterization program. It was concluded that the propellant outlet channels must be reduced in size with the flowpaths adjusted to increase propellant residence time in the thruster, and that the RF connector must be replaced with a version capable of handling higher power throughput and heating. However, even in its unoptimized form, a plasma could be produced in the LTCCET, demonstrating the efficacy of the design approach. The design is especially compelling due to its low cost to manufacture and, more importantly, its scalability of size and power throughput. Low cost and scalability are also important in that additional functionalities, such as thrust vectoring and plume charge neutralization, can be integrated into future designs with minimal additional cost. This project has matured the LTCC-ET development Technology Readiness Level (TRL) from 1 to 2. The low-cost RF plasma source portion of the LTCC device was matured from TRL 2 to 4 through the demonstration of RF plasma ignition under vacuum conditions.

Huang, P.-H. A.↗

Ultra-Wideband Array in PCB for Millimeter-Wave 5G and ISM

Next generation 5G mobile architectures will take advantage of the millimeter-wave spectrum to deliver unprecedented bandwidth. Concurrently, there is a need to consolidate numerous disparate allocations into a single, multi-functional array. Existing arrays are either narrow-band, prohibitively expensive or cannot be scaled to these frequencies. In this paper, we present the first ultra-wideband millimeter-wave array to operate across the six 5G and ISM bands spanning 24-71 GHz. Critically, the array is realized using low-cost PCB. The design concept and optimized layout are presented, and fabrication and measurement considerations are discussed.

Ultra-Wideband Array↗

High-Throughput Microfluidic Electroporation (HTME): A Scalable, 384-Well Platform for Multiplexed Cell Engineering

Electroporation-mediated gene delivery is a cornerstone of synthetic biology, offering several advantages over other methods: higher efficiencies, broader applicability, and simpler sample preparation. Yet, electroporation protocols are often challenging to integrate into highly multiplexed workflows, owing to limitations in their scalability and tunability. These challenges ultimately increase the time and cost per transformation. As a result, rapidly screening genetic libraries, exploring combinatorial designs, or optimizing electroporation parameters requires extensive iterations, consuming large quantities of expensive custom-made DNA and cell lines or primary cells. To address these limitations, we have developed a High-Throughput Microfluidic Electroporation (HTME) platform that includes a 384-well electroporation plate (E-Plate) and control electronics capable of rapidly electroporating all wells in under a minute with individual control of each well. Fabricated using scalable and cost-effective printed-circuit-board (PCB) technology, the E-Plate significantly reduces consumable costs and reagent consumption by operating on nano to microliter volumes. Furthermore, individually addressable wells facilitate rapid exploration of large sets of experimental conditions to optimize electroporation for different cell types and plasmid concentrations/types. Use of the standard 384-well footprint makes the platform easily integrable into automated workflows, thereby enabling end-to-end automation. We demonstrate transformation of E. coli with pUC19 to validate the HTME's core functionality, achieving at least a single colony forming unit in more than 99% of wells and confirming the platform's ability to rapidly perform hundreds of electroporations with customizable conditions. This work highlights the HTME's potential to significantly accelerate synthetic biology Design-Build-Test-Learn (DBTL) cycles by mitigating the transformation/transfection bottleneck.

Gaillard, William R↗

24-71 GHz PCB Array for 5G ISM

Millimeter-wave 5G mobile architectures need to consolidate disparate frequency bands into a single, multifunctional array. Existing arrays are either narrow-band, prohibitively expensive or cannot be scaled to these frequencies. In this paper, we present the first ultra-wideband millimeter wave array to operate across six 5G and ISM bands spanning 24-71 GHz. Importantly, the array is realized using low-cost PCB. The paper presents the design and optimized layout, and discusses fabrication and measurements.

5G and ISM↗

Development of Sample Verification System for Sample Return Missions

This paper describes the development of a proof of-concept sample verification system (SVS) for in-situ mass measurement of planetary rock and soil sample in future robotic sample return missions. Our proof-of-concept SVS device contains a 10 cm diameter pressure sensitive elastic membrane placed at the bottom of a sample canister. The membrane deforms under the weight of accumulating planetary sample. The membrane is positioned in proximity to an opposing substrate with a narrow gap. The deformation of the membrane makes the gap to be narrower, resulting in increased capacitance between the two nearly parallel plates. Capacitance readout circuitry on a nearby printed circuit board (PCB) transmits data via a low-voltage differential signaling (LVDS) interface. The fabricated SVS proof-of-concept device has successfully demonstrated approximately 1pF/gram capacitance change

Electrodes↗

PCB-Based Break-Out Box

Break-out boxes (BOBs) are necessary for all electrical integration/cable checkouts and troubleshooting. Because the price of a BOB is high, and no work can be done without one, often the procedure stops, simply waiting for a BOB. A less expensive BOB would take less time in the integration, testing, and troubleshooting process. The PCB-based BOB works and looks the same as a standard JPL BOB, called Gold Boxes. The only differences between the old BOB and the new PCB-based BOB is that the new one has 80 percent of its circuitry in a printed circuit board. This process reduces the time for fabrication, thus making the BOBs less expensive. Moreover, because of its unique design, the new BOBs can be easily assembled and fixed. About 80 percent of the new PCB-based BOB is in a $22 (at the time of this reporting) custom-designed, yet commercially available PCB. This device has been used successfully to verify that BOB cables were properly made. Also, upon completion, the BOB was beeped out via a multimeter to ensure that all sockets on the connectors were properly connected to the respective banana jack. When compared to the Gold Box BOBs, the new BOB has many advantages. It is much more cost efficient, it delivers equal usability at substantially lower cost of the BOB, and the Gold Box is much heavier when compared to the new BOB. The new BOB is also a bit longer and much more versatile in that connectors are easily changeable and if a banana jack is broken, it can be replaced instead of throwing away an entire BOB.

Lee, Jason H.↗

Low temperature Zn diffusion for GaSb solar cell structures fabrication

Low temperature Zn diffusion in GaSb, where the minimum temperature was 450 C, was studied. The pseudo-closed box (PCB) method was used for Zn diffusion into GaAs, AlGaAs, InP, InGaAs and InGaAsP. The PCB method avoids the inconvenience of sealed ampoules and proved to be simple and reproducible. The special design of the boat for Zn diffusion ensured the uniformality of Zn vapor pressure across the wafer surface, and thus the uniformity of the p-GaSb layer depth. The p-GaSb layers were studied using Raman scattering spectroscopy and the x-ray rocking curve method. As for the postdiffusion processing, an anodic oxidation was used for a precise thinning of the diffused GaSb layers. The results show the applicability of the PCB method for the large-scale production of the GaSb structures for solar cells.

Sulima, Oleg V.↗

2.5D HI Packaging of the Power Converter using TSV interposer.

Abstract: Advantages of the 2.5D HI (Heterogeneous Integration) electronics packaging of the power electronics compared to PCB packaging will be presented. Current 2.5D packaging effort using TSV (Through Silicon Via) will be presented in terms of fabrication, microstructural analysis, reliability, and thermal simulation.

Chung, Hyunim↗

Packaging Technologies for High Temperature Electronics and Sensors

This paper reviews ceramic substrates and thick-film metallization based packaging technologies in development for 500degC silicon carbide (SiC) electronics and sensors. Prototype high temperature ceramic chip-level packages and printed circuit boards (PCBs) based on ceramic substrates of aluminum oxide (Al2O3) and aluminum nitride (AlN) have been designed and fabricated. These ceramic substrate-based chiplevel packages with gold (Au) thick-film metallization have been electrically characterized at temperatures up to 550degC. A 96% alumina based edge connector for a PCB level subsystem interconnection has also been demonstrated recently. The 96% alumina packaging system composed of chip-level packages and PCBs has been tested with high temperature SiC devices at 500degC for over 10,000 hours. In addition to tests in a laboratory environment, a SiC JFET with a packaging system composed of a 96% alumina chip-level package and an alumina printed circuit board mounted on a data acquisition circuit board was launched as a part of the MISSE-7 suite to the International Space Station via a Shuttle mission. This packaged SiC transistor was successfully tested in orbit for eighteen months. A spark-plug type sensor package designed for high temperature SiC capacitive pressure sensors was developed. This sensor package combines the high temperature interconnection system with a commercial high temperature high pressure stainless steel seal gland (electrical feed-through). Test results of a packaged high temperature capacitive pressure sensor at 500degC are also discussed. In addition to the pressure sensor package, efforts for packaging high temperature SiC diode-based gas chemical sensors are in process.

Electronic packaging↗

NASA Tech Briefs, October 2013

Topics include: A Short-Range Distance Sensor with Exceptional Linearity; Miniature Trace Gas Detector Based on Microfabricated Optical Resonators; Commercial Non-Dispersive Infrared Spectroscopy Sensors for Sub-Ambient Carbon Dioxide Detection; Fast, Large-Area, Wide-Bandgap UV Photodetector for Cherenkov Light Detection; Mission Data System Java Edition Version 7; Adaptive Distributed Environment for Procedure Training (ADEPT); LEGEND, a LEO-to-GEO Environment Debris Model; Electronics/Computers; Millimeter-Wave Localizers for Aircraft-to-Aircraft Approach Navigation; Impedance Discontinuity Reduction Between High-Speed Differential Connectors and PCB Interfaces; SpaceCube Version 1.5; High-Pressure Lightweight Thrusters; Non-Magnetic, Tough, Corrosion- and Wear-Resistant Knives From Bulk Metallic Glasses and Composites; Ambient Dried Aerogels; Applications for Gradient Metal Alloys Fabricated Using Additive Manufacturing; Passivation of Flexible YBCO Superconducting Current Lead With Amorphous SiO2 Layer; Propellant-Flow-Actuated Rocket Engine Igniter; Lightweight Liquid Helium Dewar for High-Altitude Balloon Payloads; Method to Increase Performance of Foil Bearings Through Passive Thermal Management; Unibody Composite Pressurized Structure; JWST Integrated Science Instrument Module Alignment Optimization Tool; Radar Range Sidelobe Reduction Using Adaptive Pulse Compression Technique; Digitally Calibrated TR Modules Enabling Real-Time Beamforming SweepSAR Architectures; Electro-Optic Time-to-Space Converter for Optical Detector Jitter Mitigation; Partially Transparent Petaled Mask/Occulter for Visible-Range Spectrum; Educational NASA Computational and Scientific Studies (enCOMPASS); Coarse-Grain Bandwidth Estimation Scheme for Large-Scale Network; Detection of Moving Targets Using Soliton Resonance Effect; High-Efficiency Nested Hall Thrusters for Robotic Solar System Exploration; High-Voltage Clock Driver for Photon-Counting CCD Characterization; Development of the Code RITRACKS; and Enabling Microliquid Chromatography by Microbead Packing of Microchannels.

Source record↗

Packaging Technologies for High Temperature Electronics and Sensors

This paper reviews ceramic substrates and thick-film metallization based packaging technologies in development for 500 C silicon carbide (SiC) electronics and sensors. Prototype high temperature ceramic chip-level packages and printed circuit boards (PCBs) based on ceramic substrates of aluminum oxide (Al2O3) and aluminum nitride (AlN) have been designed and fabricated. These ceramic substrate-based chip-level packages with gold (Au) thick-film metallization have been electrically characterized at temperatures up to 550 C. A 96% alumina based edge connector for a PCB level subsystem interconnection has also been demonstrated recently. The 96% alumina packaging system composed of chip-level packages and PCBs has been tested with high temperature SiC devices at 500 C for over 10,000 hours. In addition to tests in a laboratory environment, a SiC JFET with a packaging system composed of a 96% alumina chip-level package and an alumina printed circuit board mounted on a data acquisition circuit board was launched as a part of the MISSE-7 suite to the International Space Station via a Shuttle mission. This packaged SiC transistor was successfully tested in orbit for eighteen months. A spark-plug type sensor package designed for high temperature SiC capacitive pressure sensors was developed. This sensor package combines the high temperature interconnection system with a commercial high temperature high pressure stainless steel seal gland (electrical feed-through). Test results of a packaged high temperature capacitive pressure sensor at 500 C are also discussed. In addition to the pressure sensor package, efforts for packaging high temperature SiC diode-based gas chemical sensors are in process.

Chen, Liang-Yu↗

[Activities of System Studies and Simulation, Inc.]

Contents include the following: 1. Launch Vehicle Interface Work Performed: a. S3 provided to KSC the new launch inclination targets needed for the April '04 launch date. 2. Prelaunch operations work performed: a. S3 updated the staffing plan for MSFC on-console personnel\during the Final Countdown prior to launch. 3. Software Assessment Work Performed: a. S3 evaluated and recommended approval for Program Control Board (PCB) proposed change 649 for ground software changes, as well as change 650 and 650A for Stored Program Commands. 4. Education and Public Outreach Work Performed: a. S3 continues to coordinate the effort for the design and fabrication of scale models of the GP-3 for use at the launch site, education forums, and management/technical briefings. S3 also prepared a Change Request for additional funds needed for fabrication of additional scale models. S3 drafted the planned uses of these models, including the possibility of participation in the Boston, MA showings of the traveling Einstein Exhibit. 5. Program Management Support Work Performed: a. S3 prepared the input for and closed three MSFC Centerwide Action Item Tracking Systems (CAITS) actions during this period.

Source record↗

PCB-on-DBC GaN Power Module Design with High-Density Integration and Double-Sided Cooling

Lateral gallium nitride (GaN) high-electron-mobility transistors (HEMTs) present better electrical characteristics compared to silicon or silicon carbide devices such as high switching speed and low gate charge, but also present additional challenges on the module design. Here, this paper discusses a high-density GaN power module with double-sided cooling, low inductance, on-package decoupling capacitors, and integrated gate drivers. The GaN dies as well as the gate drive are sandwiched between the printed circuit board (PCB) and direct bonded copper (DBC) substrate to achieve compact loop and double-sided cooling effect. Design considerations and thermal performance are analyzed. A module assembly procedure is presented utilizing the layer-by-layer attachment process. Finally, a 2.7 cm x 1.8 cm half-bridge GaN power module is fabricated and tested, achieving a low power-loop inductance of 1.03 nH, and the overshoot voltage of the switching waveform is less than 5% under a 400-V/25-A double-pulse test. The thermal resistance is 0.32 K/W, verified by simulation and experimental results. The design and assembly process can be generalized and applied to high power applications to achieve high power density and high performance.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗

A Full-length Quench Antenna for MQXFA Production Series Quadrupole Magnet Testing

The MQXFA production series quadrupoles being built for the Hi-Lumi (HL) LHC upgrade by the US Accelerator Upgrade Project (US-HL-LHC AUP) will have very limited instrumentation for characterizing quench events that occur during magnet training and performance validation testing. In order to understand the origin of the quenches, and whether they have some implication for ongoing magnet fabrication, it was decided to build a full-length Quench Antenna (QA) with axial resolution of 50mm to be employed during cold testing in the anticryostat used for magnetic measurements. The goal is to have fineresolution, full-length coverage detection of quench events axially, as well as to have azimuthal resolution on the order of the cable width (about 1 degree for the cross-section), in a device that can be used both for vertical and horizontal testing. To achieve this, a 5m long QA with 128 channels of high-speed data acquisition has been designed and fabricated. The cylindrical antenna features an array of 12 full-length, dipole- and quadrupole-bucked coils positioned radially in the QA interior for azimuthal localization, and over 100 individual channels of short, high-sensitivity, antennas etched as flexible PCB circuits (which also buck dipole and quadrupole fields) wrapped circumferentially on the cylinder exterior in steps of 50mm along the magnet length for axial detection. This report discusses the design, construction and analysis of the MQXFA QA, and first results from using the antenna during quench testing in the production magnets.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Design of High-Power Polyphase PCB Coil Systems for Wireless Power Transfer

Printed circuit board (PCB) coils have been proposed prior for implementation as inductive wireless charging coils to minimize size and cost. Utilization of PCBs can allow for a reduced cost, improved manufacturability, and a wide range of geometric customization options. To circumvent material limitations on insulation and thermal performance, parallel paths can be implemented to divide the current per path accordingly. Within this paper, an unconventional high-power PCB coil is designed employing all possible techniques for wiring with axial and radial parallel paths with equivalent transposition to minimize circulating currents. Design studies are simulated in 3D finite element analysis (FEA) to evaluate imbalance between phases with and without transposition. Two experimental prototype coils were fabricated with measurements for self-inductance and mutual inductance between phases. These measurements were validated to be sufficiently consistent with FEA results. Additionally, a method is proposed for a two-step optimization of coupling coefficient and coil losses.

Lewis, Donovin D.↗