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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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All sourcesNASA NTRSDOE OSTI
NASA NTRS2003

A miniaturized neuroprosthesis suitable for implantation into the brain

This paper presents current research on a miniaturized neuroprosthesis suitable for implantation into the brain. The prosthesis is a heterogeneous integration of a 100-element microelectromechanical system (MEMS) electrode array, front-end complementary metal-oxide-semiconductor (CMOS) integrated circuit for neural signal preamplification, filtering, multiplexing and analog-to-digital conversion, and a second CMOS integrated circuit for wireless transmission of neural data and conditioning of wireless power. The prosthesis is intended for applications where neural signals are processed and decoded to permit the control of artificial or paralyzed limbs. This research, if successful, will allow implantation of the electronics into the brain, or subcutaneously on the skull, and eliminate all external signal and power wiring. The neuroprosthetic system design has strict size and power constraints with each of the front-end preamplifier channels fitting within the 400 x 400-microm pitch of the 100-element MEMS electrode array and power dissipation resulting in less than a 1 degree C temperature rise for the surrounding brain tissue. We describe the measured performance of initial micropower low-noise CMOS preamplifiers for the neuroprosthetic.

Action Potentials/physiology↗
NASA NTRSDate not supplied

Oblique Eccentric Gaze Holding Evokes Larger Horizontal than Vertical Rebound Nystagmus

Rebound nystagmus (RN) has been used to probe the adaptation mechanisms of the gaze holding system. This type of nystagmus is invoked upon returning to central gaze after prolonged fixation at an eccentric point and it is thought to reflect a set-point adaptation of the neural integrator circuit. Previous studies have only observed horizontal RN after horizontal eccentric gaze holding, reflecting adaptation of the horizontal neural integrator. The current study seeks to elucidate how eccentric gaze at oblique target locations, where there are equal horizontal and vertical components, affects the characteristics of the resulting RN. For a given trial, subjects were instructed to fixate a central flashing target for 5 seconds, then fixate an eccentric continuous target for 30 seconds at one of six possible locations (4 oblique and 2 horizontal targets), and finally fixate centrally at a flashing target for 15 seconds where RN is assessed. Binocular eye-tracking data were collected at 250 Hz. Slow-phase velocity (SPV) or the slow drift part of the nystagmus was used to quantify the magnitude of RN. Subjects showed elevated SPV in the horizontal component (2.3 deg/s), but less in the vertical component (1.4 deg/s) after oblique eccentric gaze holding, reflecting an oblique RN. The smaller vertical RN may reflect a different behavior of the horizontal and vertical neural integrators which are anatomically separated. Under the current paradigm, oblique gaze holding would appear to have a smaller effect on adaptation of the vertical integrator than in the horizontal integrator. Further investigation is needed to establish the reference frame of this distinction between the horizontal and vertical integrator circuits.

gaze holding↗
NASA NTRS1993

Photodetector Array For Neural Network

Integrated circuit performs 1,024 threshold operations in parallel. Designed for use in postprocessing output of optical correlator in optoelectronic neural network. Overall function of device to put out digital signals indicative of location(s) of bright spot(s) on detector plane. Response time less than commercial charge-coupled-device (CCD) imaging detector operating at standard television frame rate.

Langenbacher, Harry↗
NASA NTRS1995

Lyapunov exponents from CHUA's circuit time series using artificial neural networks

In this paper we present the general problem of identifying if a nonlinear dynamic system has a chaotic behavior. If the answer is positive the system will be sensitive to small perturbations in the initial conditions which will imply that there is a chaotic attractor in its state space. A particular problem would be that of identifying a chaotic oscillator. We present an example of three well known different chaotic oscillators where we have knowledge of the equations that govern the dynamical systems and from there we can obtain the corresponding time series. In a similar example we assume that we only know the time series and, finally, in another example we have to take measurements in the Chua's circuit to obtain sample points of the time series. With the knowledge about the time series the phase plane portraits are plotted and from them, by visual inspection, it is concluded whether or not the system is chaotic. This method has the problem of uncertainty and subjectivity and for that reason a different approach is needed. A quantitative approach is the computation of the Lyapunov exponents. We describe several methods for obtaining them and apply a little known method of artificial neural networks to the different examples mentioned above. We end the paper discussing the importance of the Lyapunov exponents in the interpretation of the dynamic behavior of biological neurons and biological neural networks.

Gonzalez, J. Jesus↗
NASA NTRS1991

Ferroelectric Memory Capacitors For Neural Networks

Thin-film ferroelectric capacitors proposed as nonvolatile analog memory devices. Intended primarily for use as synaptic connections in electronic neural networks. Connection strengths (synaptic weights) stored as nonlinear remanent polarizations of ferroelectric films. Ferroelectric memory and interrogation capacitors combined into memory devices in vertical or lateral configurations. Photoconductive layer modulated by light provides variable resistance to alter bias signal applied to memory capacitor. Features include nondestructive readout, simplicity, and resistance to ionizing radiation. Interrogated without destroying stored analog data. Also amenable to very-large-scale integration. Allows use of ac coupling, eliminating errors caused by dc offsets in amplifier circuits of neural networks.

Thakoor, Sarita↗
NASA NTRS1990

Porous-Floating-Gate Field-Effect Transistor

Porous-floating-gate, "vertical" field-effect transistor proposed as programmable analog memory device especially suitable for use in electronic neural networks. Analog value of electrical conductance of device represents synaptic weight (strength of synaptic connection) repeatedly modified by application of suitable writing or erasing voltage. Suited for hardware implementations of massively parallel neural-network architectures for two important reasons: vertical transistor structure requires only two external electrodes, and use of tailored amorphous semiconductors provides choice of very wide range of low conductivity values, dictated by overall power dissipation requirements in massively parallel neural-network circuits.

Thakoor, Anilkumar P.↗
NASA NTRS2003

Artificial Neural Network with Hardware Training and Hardware Refresh

A neural network circuit is provided having a plurality of circuits capable of charge storage. Also provided is a plurality of circuits each coupled to at least one of the plurality of charge storage circuits and constructed to generate an output in accordance with a neuron transfer function. Each of a plurality of circuits is coupled to one of the plurality of neuron transfer function circuits and constructed to generate a derivative of the output. A weight update circuit updates the charge storage circuits based upon output from the plurality of transfer function circuits and output from the plurality of derivative circuits. In preferred embodiments, separate training and validation networks share the same set of charge storage circuits and may operate concurrently. The validation network has a separate transfer function circuits each being coupled to the charge storage circuits so as to replicate the training network s coupling of the plurality of charge storage to the plurality of transfer function circuits. The plurality of transfer function circuits may be constructed each having a transconductance amplifier providing differential currents combined to provide an output in accordance with a transfer function. The derivative circuits may have a circuit constructed to generate a biased differential currents combined so as to provide the derivative of the transfer function.

Tuan A Duong↗
NASA NTRS1992

GaAs Optoelectronic Integrated-Circuit Neurons

Monolithic GaAs optoelectronic integrated circuits developed for use as artificial neurons. Neural-network computer contains planar arrays of optoelectronic neurons, and variable synaptic connections between neurons effected by diffraction of light from volume hologram in photorefractive material. Basic principles of neural-network computers explained more fully in "Optoelectronic Integrated Circuits For Neural Networks" (NPO-17652). In present circuits, devices replaced by metal/semiconductor field effect transistors (MESFET's), which consume less power.

Lin, Steven H.↗
NASA NTRS1988

Electronic Neural-Network Simulator

Experimental circuits faster than simulation programs run on digital computers. Serial shift register routes clock pulses C1 to neurons in sequence. Clock pulses C2 interrogate neurons. Neuron interconnection information stored in simulated synapses. Can be expanded to greater complexity.

Moopenn, Alex W.↗
NASA NTRS1995

Remote Neural Pendants In A Welding-Control System

Neural network integrated circuits enhance functionalities of both remote terminals (called "pendants") and communication links, without necessitating installation of additional wires in links. Makes possible to incorporate many features into pendant, including real-time display of critical welding parameters and other process information, capability for communication between technician at pendant and host computer or technician elsewhere in system, and switches and potentiometers through which technician at pendant exerts remote control over such critical aspects of welding process as current, voltage, rate of travel, flow of gas, starting, and stopping. Other potential manufacturing applications include control of spray coating and of curing of composite materials. Potential nonmanufacturing uses include remote control of heating, air conditioning, and lighting in electrically noisy and otherwise hostile environments.

Venable, Richard A.↗
NASA NTRS2003

Cascade Back-Propagation Learning in Neural Networks

The cascade back-propagation (CBP) algorithm is the basis of a conceptual design for accelerating learning in artificial neural networks. The neural networks would be implemented as analog very-large-scale integrated (VLSI) circuits, and circuits to implement the CBP algorithm would be fabricated on the same VLSI circuit chips with the neural networks. Heretofore, artificial neural networks have learned slowly because it has been necessary to train them via software, for lack of a good on-chip learning technique. The CBP algorithm is an on-chip technique that provides for continuous learning in real time. Artificial neural networks are trained by example: A network is presented with training inputs for which the correct outputs are known, and the algorithm strives to adjust the weights of synaptic connections in the network to make the actual outputs approach the correct outputs. The input data are generally divided into three parts. Two of the parts, called the "training" and "cross-validation" sets, respectively, must be such that the corresponding input/output pairs are known. During training, the cross-validation set enables verification of the status of the input-to-output transformation learned by the network to avoid over-learning. The third part of the data, termed the "test" set, consists of the inputs that are required to be transformed into outputs; this set may or may not include the training set and/or the cross-validation set. Proposed neural-network circuitry for on-chip learning would be divided into two distinct networks; one for training and one for validation. Both networks would share the same synaptic weights.

Duong, Tuan A.↗
NASA NTRS1991

High-Gain AlxGa1-xAs/GaAs Transistors For Neural Networks

High-gain AlxGa1-xAs/GaAs npn double heterojunction bipolar transistors developed for use as phototransistors in optoelectronic integrated circuits, especially in artificial neural networks. Transistors perform both photodetection and saturating-amplification functions of neurons. Good candidates for such application because structurally compatible with laser diodes and light-emitting diodes, detect light, and provide high current gain needed to compensate for losses in holographic optical elements.

Kim, Jae-Hoon↗
NASA NTRS1990

Analog Delta-Back-Propagation Neural-Network Circuitry

Changes in synapse weights due to circuit drifts suppressed. Proposed fully parallel analog version of electronic neural-network processor based on delta-back-propagation algorithm. Processor able to "learn" when provided with suitable combinations of inputs and enforced outputs. Includes programmable resistive memory elements (corresponding to synapses), conductances (synapse weights) adjusted during learning. Buffer amplifiers, summing circuits, and sample-and-hold circuits arranged in layers of electronic neurons in accordance with delta-back-propagation algorithm.

Eberhart, Silvio↗
NASA NTRS1990

Fast Feature-Recognizing Optoelectronic System

Proposed optoelectronic system recognizes features or classifies images by processing outputs of photosensors rapidly, in parallel, through circuits developed in research on neural networks. Array of photoconductive elements serve as photomodulated connections in electronic neural network, which provides high speed data compression to generate feature vector. System able to "learn" new patterns for subsequent recognition. Potential applications in robotic vision systems and pattern recognition.

Thakoor, S.↗
NASA NTRS1990

Multispectral image fusion using neural networks

A prototype system is being developed to demonstrate the use of neural network hardware to fuse multispectral imagery. This system consists of a neural network IC on a motherboard, a circuit card assembly, and a set of software routines hosted by a PC-class computer. Research in support of this consists of neural network simulations fusing 4 to 7 bands of Landsat imagery and fusing (separately) multiple bands of synthetic imagery. The simulations, results, and a description of the prototype system are presented.

Kagel, J. H.↗
NASA NTRS1991

High-gain AlGaAs/GaAs double heterojunction Darlington phototransistors for optical neural networks

High-gain MOCVD-grown (metal-organic chemical vapor deposition) AlGaAs/GaAs/AlGaAs n-p-n double heterojunction bipolar transistors (DHBTs) and Darlington phototransistor pairs are provided for use in optical neural networks and other optoelectronic integrated circuit applications. The reduced base doping level used results in effective blockage of Zn out-diffusion, enabling a current gain of 500, higher than most previously reported values for Zn-diffused-base DHBTs. Darlington phototransitor pairs of this material can achieve a current gain of over 6000, which satisfies the gain requirement for optical neural network designs, which advantageously may employ neurons comprising the Darlington phototransistor pairs in series with a light source.

Kim, Jae H.↗