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25 records · Page 2

Endogenous Lunar Volatiles: Insights into the Abundances of Volatiles in the Moon from Lunar Apatite

At the time of publication of New Views of the Moon, it was thought that the Moon was bone dry with less than about 1 ppb H2O. However in 2007, initial reports at the 38th Lunar and Planetary Science Conference speculated that H-species were present in both apatites and pyroclastic volcanic lunar glasses. These early reports were later confirmed through peer-review, which motivated many subsequent studies on magmatic volatiles in and on the Moon within the last decade. Some of these studies have cast into question the post-Apollo view of lunar formation, the distribution and sources of volatiles in the Earth-Moon system, and the thermal and magmatic evolution of the Moon. The mineral apatite has been one of the pillars of this new field of study, and it will be the primary focus of this abstract. Although apatite has been used both to understand the abundances of volatiles in lunar systems as well as the isotopic compositions of those volatiles, the focus here will be on the abundances of F, Cl, and H2O. This work demonstrates the utility of apatite in advancing our understanding of lunar volatiles, hence apatite should be among the topics covered in the endogenous lunar volatile chapter in NVM II. Truncated ternary plot of apatite X-site occupancy (mol%) from highlands apatite and mare basalt apatite plotted on the relative volatile abundance diagram from. The solid black lines delineate fields of relative abundances of F, Cl, and H2O (on a weight basis) in the melt from which the apatite crystallized. The diagram was constructed using available apatite/melt partitioning data for fluorine, chlorine, and hydroxyl.

McCubbin, Francis

Vorago RH-OBC-1 Single Event Effect Characterization Test Report

The Vorago Technologies RH-OBC-1 is a CubeSat Kit Bus compatible single board computer with a Vorago VA10820 ARM Cortex-M0 microcontroller at its core. The board also includes a set of common peripheral integrated circuits, like voltage regulators, non-volatile memories (NVM), an analog-to-digital converter (ADC), a watchdog/supervisor, and a Controller Area Network (CAN) bus transceiver. High-energy proton (200 MeV) testing was conducted at both board and component levels to investigate single-event effects.

CubeSat compatible board

A radiation - tolerant, low - power non - volatile memory based on silicon nanocrystal quantum dots.

Nanocrystal nonvolatile floating-gate memories are a good candidate for space applications - initial results suggest they are fast, more reliable and consume less power than conventional floating gate memories. In the nanocrystal based NVM device, charge is not stored on a continuous polysilicon layer (so-called floating gate), but instead on a layer of discrete nanocrystals. Charge injection and storage in dense arrays of silicon nanocrystals in Si02 is a critical aspect of the performance of potential nanocrystal flash memory structures. The ultimate goal for this class of devices is few- or single-electron storage in a small number of nanocrystal elements. In addition, the nanocrystal layer fabrication technique should be simple, 8-inch wafer compatible and well controlled.

Green, M. L.

One Time Programmable Antifuse Memory Based on Bulk Junctionless Transistor

One time programmable (OTP) antifuse base memory is demonstrated based on a bulk junctionless gate-all-around (GAA) nanowire transistor technology. The presented memory consists of a single transistor (1T) footprint without any process modification. The source/drain (S/D) and gate respectively become bit line and word line where the antifuse is formed by oxide breakdown across the gate and the channel. The channel is connected directly to the bit line due to junctionless S/D and inherently isolated from the neighboring cell by the GAA channel. Therefore, an array of 1T antifuse OTP can be a candidate for the sub-5-nanometer technology node.

Antifuse

Flexible and Effective Object Tiering for Heterogeneous Memory Systems

Computing platforms that package multiple types of memory, each with their own performance characteristics, are quickly becoming mainstream. To operate efficiently, heterogeneous memory architectures require new data management solutions that are able to match the needs of each application with an appropriate type of memory. As the primary generators of memory usage, applications create a great deal of information that can be useful for guiding memory management, but the community still lacks tools to collect, organize, and leverage this information effectively. To address this gap, this work introduces a novel software framework that collects and analyzes object-level information to guide memory tiering. The framework includes tools to monitor the capacity and usage of individual data objects, routines that aggregate and convert this information into tier recommendations for the host platform, and mechanisms to enforce these recommendations according to user-selected policies. Moreover, the developed tools and techniques are fully automatic, work on standard Linux systems, and do not require modification or recompilation of existing software. Using this framework, this study evaluates and compares the impact of a variety of design choices for memory tiering, including different policies for prioritizing objects for the fast memory tier as well as the frequency and timing of migration events. In conclusion, the results, collected on a modern Intel platform with conventional DDR4 SDRAM as well as Intel Optane NVRAM, show that guiding data tiering with object-level information can enable significant performance and efficiency benefits compared with standard hardware- and software-directed data-tiering strategies for a diverse set of memory-intensive workloads.

97 MATHEMATICS AND COMPUTING