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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
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Software and Firmware-logic Design for the PIP-II Machine Protection System Mode and Configuration Control at Fermilab
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Improving Trust in Information Barriers through Separate Provisioning of Hardware and Firmware
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HALucinator Firmware Re-hosting Through Abstraction Layer Emulation.
Abstract not provided.
An Automated Approach to Re-Hosting Embedded Firmware Through Removing Hardware Dependencies.
Abstract not provided.
Formal Methods for Provably Secure Software and Firmware
This project addresses a gap observed in verifying the programming in embedded devices used in international arms control: namely verifying that embedded programming in an arms control device does exactly what it is supposed to do, no more and no less, every time without fail, and without disclosing unauthorized information accidentally or intentionally. In critical military, aerospace, and industrial safety systems this problem is sometimes addressed using formal methods (FM). This multi-year project seeks to identify formal methods toolsets useable in arms control regimes, with emphasis on applicability, ease of use, long term availability, and support.
Improving Trust in Information Barriers through Separate Provisioning of Hardware and Firmware
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Klipper Firmware Tools
Tools for building containers to ease building Klipper and CanBoot for multiple targets. Note: This is being submitted to DOECODE as per instructions received after providing notification of creation of IP outside of work as part of a site-specific IP assignment agreement. This work was not funded by, nor was any work performed under any DOE contract.
A Real-Time ANPC Inverter Digital Twin with Integrated Design-For-Trust
The demand for renewable energy has increased over the last few years, and so has the demand for greater expectations within the energy market. This increasing trend has been accompanied by more significant usage of internet-connected devices (IoT), leading to critical electrical infrastructure being connected to the internet. Implementing internet connectivity with such devices and systems provides benefits such as improving the system's performance, facilitating irregularity and anomaly mitigation, and providing additional situational awareness for enhanced decision-making. However, enhancing the connected system with IoT introduces a drawback – a greater vulnerability to cyber-attacks. Cyber-attacks targeting critical infrastructure in the electrical sector have occurred in the United States and Ukraine. These cyber-attacks highlight and expose vulnerabilities that a system inherits when connecting to the internet. These attacks left thousands of customers without electricity for hours until operators could regain control of the electric utility grid. Therefore, to address the vulnerabilities of an internet-connected power electronic device, this work focused on the hardware layer of the system. Implementing a cyber-control system inside the hardware layer can significantly reduce the possibility of an attacker patching malicious controller firmware into a photovoltaic grid-connected inverter, thus mitigating the likelihood that the inverter becomes inactive a cyber-attack scenario. With this mitigation technique, if a cyberattack is successful and an attacker gains control of the network, a cyber-defense technique is in place to mitigate the impact of the cyber-attack. This additional protection layer was developed based on an innovative concept known as Digital Twin (DT). A DT, in this case, replicates an Active-Neutral Point Clamped (ANPC) inverter and was designed using a hardware language known as VHDL (Very High-Speed Integrated Circuit Hardware Description Language) and applied to Field-Programmable-GateArray (FPGA). The DT is embedded within the FPGA and contained in a controller board, the UCB (Unified Controller Board), developed by the University of Arkansas electrical engineering team. This UCB also contains two Digital Signal Processors (DSPs) responsible for generating associated signals to control an authentic physical inverter. These DSP signals are received and processed by the FPGA that implements the DT of an ANPC; in other words, it simulates in realtime the expected output of an actual ANPC inverter using the signals from the DSP. When a new firmware is ready to be patched, the DT provides output signals simulating behavior that a real ANPC inverter would generate with the new firmware. The new firmware is tested to check if it meets all the operational requirements established using a Design-For-Trust technique (DFTr). If the new firmware fails in at least one of the DFT tests, it is considered malicious and must be rejected. This work is divided into sections, such as Background, which explains the pieces that were used and the strategy behind this work; Process and Procedure, which explains the methodology that was adopted to prove the reliability and effectiveness of this work; Results and Discussion, where the simulations and results are described and explained; followed by Conclusion and Future work section, which concludes this work and adds possible future projects to continue this work further.
Memory forensic analysis of a programmable logic controller in industrial control systems
In industrial control systems (ICS), programmable logic controllers (PLCs) are used to automate physical processes such as nuclear plants and power grid stations, and are often subject to cyber attacks. As in conventional IT domain, the memory analysis of the PLCs can help answer important forensic questions about the attack, such as the presence of malicious firmware, injection of modified control logic (the program running on the PLC), and manipulation of I/O devices (e.g., sensors and actuators). Unlike conventional IT domain, PLCs have heterogeneous hardware architecture, proprietary firmware and control software, making it challenging to employ a unified framework for their memory forensics. For merely extracting artifacts of forensic importance, reverse-engineering the firmware is a tedious task, and the effort needs to be repeated for every PLC model. As a community, a step-wise approach to tackle this challenge is to analyze the memory of specific PLCs, and subsequently find a generic framework applicable to all PLCs. Our work is a step forward in this direction. By following a methodology that focuses on the functional layer of PLCs instead of reverse engineering the firmware, we analyze the digital forensic artifacts available in a common PLC, Allen-Bradley ControlLogix 1756-L61. Before diving into the memory dump, we analyze the PLC control software to create a list of important artifacts that are sure to exist in the PLC memory dump. The approach employs a setup where PLC control software RSLogix-5000 is connected to the PLC, and the memory dump can be obtained as and when needed. We create test cases that sequentially highlight each category of artifacts, followed by an examination of the resultant impact on memory. After attaining the listed artifacts, we employ conventional string and known data searches to extract interesting information present in this PLC's memory. The memory analysis profile, presented as a Python library and shared with the community, can help a forensic investigator to readily extract forensic artifacts from the same model's controller. The adopted approach may help researchers in creating memory profile of other PLCs, and ultimately formulating a generic PLC memory analysis framework.
Forensic Analysis of SOHO Router Binaries
Small Office/Home Office (SOHO) routers are used by millions of consumers across the United States, and are commensurately vulnerable. Forensic analysis of SOHO router firmware helps to understand and mitigate those vulnerabilities. This poster focused particularly on analysis of BusyBox executables, a software suite that provides several Unix utilities in a single file. Three main tools were used to analyze the binaries. BinWalk was used to extract the files, but also to build entropy graphs, extract Linux kernel images, and identify CPU architectures; WiiBin processed the binaries to find endianness, architecture, the percent compressed/encrypted, and compiler data; and @DisCo, a machine learning tool used to determine function similarity in disassembled binaries, analyzed similarities and determined versions of extracted BusyBox files from each router. These tools found that venders from all five routers utilized the same version of the BusyBox software across different firmware updates, demonstrating the importance of constant firmware scrutiny to protect against security vulnerabilities.
Cyber Protection of Grid-Connected Devices Through Embedded Online Security
Cybersecurity research regarding the electric power grid has primarily been focused on protecting the communication layer of grid-connected devices against cyber-attack threats. Although many developed methods have greatly reduced the effects of a cyber-attack on the vulnerabilities of grid-connected devices, discovering new vulnerabilities is inevitable and a constant threat. As a result, the overall reliability and security of network communications with regard to grid-connected devices is a concern. Here, this paper proposes a method that further secures a system by focusing on the control and hardware layer of grid-connected devices. The device’s controller firmware will be validated and authenticated using integrated device emulation resources prior to being activated to control the grid-connected device. This verification process is performed while the controller is online and actively controlling power flows related to the device. Therefore, an attack to the system through a malicious firmware patch would be detected by the online security and rejected while safely maintaining continuous and stable control of the device. This method integrates the concepts of firmware hot-patching, digital twins, and active monitoring into an overall cybersecurity protection system.
Digital Twin of an ANPC inverter with integrated Design-For-Trust
Reducing costs and increasing manufacturing output while creating reliable products are three essential components needed to keep a business competitive. In the past, having an asset that could address these three challenges at the same time would be challenging. However, recent advances in computer processing capabilities coupled with increases to network speeds allowed such a system to become possible; and this is known as a Digital Twin (DT), which represents a virtual copy of a production system or a product. Here, this work exhibits a DT application of an Active Neutral Point Clamped (ANPC) inverter using a controller. The controller emulates the ANPC responses of a new Digital Signal Processing (DSP) firmware and validates this new firmware by using Design-For-Trust (DFTr) characteristics. If the new firmware is malicious, then it should be rejected, thus adding preemptive protection measures for inverter based distributed energy resources.
slaclab/pysmurf-stable-docker
Docker image with pysmurf and firmware files for the SMuRF project. This docker image, named pysmurf-server contains pysmurf, firmware files (mcs and pyrogue's zip) and default configuration files (yml) for stable firmware versions.
Technology Development and Field Monitoring in nZEB - US Country report IEA HPT Annex 49 Task 3
The International Energy Agency (IEA) Heat Pumping Technologies (HPT) Annex 49, “Design and Integration of Heat Pumps for Nearly Zero Energy Buildings,” deals with the application of heat pumps (HPs) as a core component of the HVAC system for nearly or net-zero energy buildings. This report covers the Task 3 activities of the US team. Three institutions are involved on the US team and have worked on the following projects. 1) Oak Ridge National Laboratory (ORNL) summarized development activities since the conclusion of IEA HPT Annex 40 for several integrated HP (IHP) systems - electric ground-source IHP and air-source IHP versions and engine-driven AS-IHP version. 2) The University of Maryland partnered with ORNL and Blue Bear Management to develop a personal cooling device called RoCo that can provide personalized conditioned air to occupants in inadequately or unconditioned environments. With RoCo, building facility management can elevate the HVAC thermostat settings without compromising occupants’ thermal comfort. Researchers have found that a 4°F increase in thermostat settings can save 12–30% energy savings. Therefore, RoCo is a promising technology that can help reduce building energy consumption and facilitate achievement of net-zero energy building performance. 3) The National Institute of Standards and Technology (NIST) is working on a field study effort on the NIST Net-Zero Energy Residential Test Facility. Two air-source split-system HPs were installed in a residential, net-zero energy home that was constructed as a laboratory on the NIST campus in Gaithersburg, Maryland. The first HP was a two-stage, 7 kW (2 ton), 15.8 seasonal energy efficiency ratio (SEER), 9.05 heating seasonal performance factor (HSPF) conventionally ducted system; the second HP was a variable-speed, 10.6 kW (3 ton), 14 SEER, 8.35 HSPF, high-velocity ducted system. These two systems operated side by side, using separate supply ducts and a common return duct, on a weekly alternating schedule to condition the home that was operated with very consistent simulated thermal loads. The team wanted to determine whether the high-velocity system could provide comparable energy-use efficiency to the conventional system. The results of this study showed that it did meet the required loads and had slightly greater efficiency; the average cooling coefficient of performance (COP) was (0.40 ± 0.11) higher, and the average heating COP was statistically equal. A new firmware was provided at the end of the heating season that greatly improved the performance of the high-velocity system; its average heating COP went from (1.8 ± 0.9) to (2.5 ± 1.1) at a 95% confidence level. The new firmware heating COP averaged (1.05 ± 0.23) higher than the old firmware over the same outdoor temperatures. The defrost performance is very different for these two systems, yet they consumed equivalent energy per HDD. The conventional system uses a timed-initiate, temperature-terminate algorithm with auxiliary electric resistive heating, whereas the high-velocity system uses calculated evaporator parameters with a hot-gas bypass before a full reverse-cycle defrost with no supplementary resistive heat.