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At least 37 records · Page 2

Travelling wave‐based fault detection and location in a real low‐voltage DC microgrid

Abstract This paper discusses a device‐level implementation of a travelling wave (TW) protection device (PD) designed for a real low‐voltage DC microgrid. The TWPD fault detection and location algorithm is executed on a commercial digital signal processor (DSP) board, involving signal sampling at 1 MHz via the DSP board's analog‐to‐digital converter (ADC). The analogue input card measures positive pole, negative pole and pole‐to‐pole voltages at the TWPD location. Upon a successful fault detection using a second‐order high‐pass filter, the voltage data is normalised and multi‐resolution analysis (MRA) is performed on a 128‐sample buffer around the TW arrival time. MRA employs the discrete wavelet transform (DWT) to capture high‐frequency voltage patterns, and then the Parseval's energy theorem quantifies these TW characteristics by computing the energy of reconstructed wavelet coefficients. These energy values per decomposed frequency band are the basis for training a random forest classifier that predicts fault location and type. The TWPD is fully implemented and connected to a real DC microgrid in Albuquerque, NM, USA, for validation, and results are shown for field tests verifying the performance under faults.

Paruthiyil, Sajay Krishnan [Department of Electric↗

Interpretive MHD modeling of dispersive shell pellet injection for rapid shutdown in tokamaks

Dispersive shell pellet (DSP) injection is modeled with the extended-MHD code NIMROD for interpretive insight into the results of recent DIII-D DSP experiments and to explore the dynamics of an inside-out thermal quench for disruption mitigation in tokamaks. Simulations of the pre-thermal quench (TQ) phase indicate that the upper bound for the quantity of ablated carbon shell material that will not perturb the flux surfaces is in the ballpark of, but somewhat below the experimental quantity. Even below this quantity, sufficient electrons are added to the plasma by the shell material to produce significant dilution cooling before the TQ is triggered. Simulations carried through the end of the TQ have very large amplitude MHD fluctuations (δB/B>10 -2 ) at the time of the plasma current spike associated with current profile redistribution. Finally, after the plasma current spike, which is of comparable amplitude to that measured in DIII-D experiments, none of the runaway electron test-particles whose orbits are tracked throughout the simulation remain confined.

70 PLASMA PHYSICS AND FUSION TECHNOLOGY↗

Open Circuit Switch Fault Management Method of a Multi-Phase Synchronous Buck Converter for EV Charging Application

Multi-phase synchronous buck converter (MSBC) is becoming popular for the electric vehicle (EV) charging application because of its higher efficiency, smaller passive component sizes, bidirectional power flow, and output current ripple reduction through interleaving. This converter also provides higher reliability than the traditional single phase converter since its modular structure enables fault tolerant operation. Fault management in the converter requires the detection of switch fault, shut down of the faulty phase, and reconfiguration of the PWM signals for the healthy phases to avoid circulating current and high output current ripple. In addition, it is desirable that the fault management method can be implemented using the micro-controller unit (MCU) or digital signal processor (DSP), which are widely used to control power converters. This paper presents a fault management method for detecting switch faults and reconfiguring healthy phases using a DSP. The method is validated through simulations and experiments using a commercial off-the-shelf power stack.

32 ENERGY CONSERVATION, CONSUMPTION, AND UTILIZATI↗

Power Electronic Hardware-in-the-Loop (PE-HIL): Testing Individual Controllers in Large-Scale Power Electronics Systems

Large power electronics systems like multi-port autonomous reconfigurable solar power plant (MARS) are increasingly being researched upon to integrate emerging energy sources. MARS connects photovoltaic (PV) systems and energy storage systems (ESSs) to high-voltage direct current (HVdc) links/grids and high-voltage alternating current (ac) transmission grids. As these large power electronics systems incorporate complex hierarchical control systems that are close-by and communicate fast, the control systems require an unique power electronic hardware-in-the-loop (PE-HIL) real-time architecture to evaluate individual controllers. In this paper, a PE-HIL real-time architecture is proposed to evaluate one of the hundreds to thousands of digital signal processors (DSPs) that are a part of the complex hierarchical control system. The DSP connects to a central processing unit (CPU) and a field programmable gate array (FPGA) that form a part of the upper levels of the control system. The DSP is part of the lower level of the control system. The proposed PE-HIL architecture is tested and evaluated. Preliminary test results are presented to showcase the concept.

Debnath, Suman↗

The spatially resolved transcriptome signatures of glomeruli in chronic kidney disease

Here, we used digital spatial profiling (DSP) to describe the glomerular transcriptomic signatures that may characterize the complex molecular mechanisms underlying progressive kidney disease in Alport syndrome, focal segmental glomerulosclerosis, and membranous nephropathy. Our results revealed significant transcriptional heterogeneity among diseased glomeruli, and this analysis showed that histologically similar glomeruli manifested different transcriptional profiles. Using glomerular pathology scores to establish an axis of progression, we identified molecular pathways with progressively decreased expression in response to increasing pathology scores, including signal recognition particle–dependent cotranslational protein targeting to membrane and selenocysteine synthesis pathways. We also identified a distinct signature of upregulated and downregulated genes common to all the diseases investigated when compared with nondiseased tissue from nephrectomies. These analyses using DSP at the single-glomerulus level could help to increase insight into the pathophysiology of kidney disease and possibly the identification of biomarkers of disease progression in glomerulopathies.

60 APPLIED LIFE SCIENCES↗

Digital Signal Processing of Radar Pulse Echoes

Modern high-performance radar systems are employing ever-more Digital Signal Processing (DSP), replacing ever-more formerly analog components. Precisely predicting the performance of digital filters and correlators requires an awareness of some of the finer points and characteristics of digital filters. We examine a representative radar receiver DSP chain that is processing a Linear Frequency Modulated (LFM) chirp.

47 OTHER INSTRUMENTATION↗

State Energy Offices’ Engagement in Electric Distribution Planning to Meet State Policy Goals

NASEO and Berkeley Lab released a new publication on State Energy Offices’ Engagement in Electric Distribution Planning to Meet State Policy Goals. State and Territory Energy Offices develop plans, programs, policies, and projects that have a substantial impact on electric distribution systems. They also can participate in distribution system planning (DSP) processes to help ensure that utilities – consumer- and investor-owned – meet the state’s future energy needs. This paper recognizes the wide spectrum of roles that State Energy Offices can play in DSP processes, including planning for distributed energy resources and grid modernization. It highlights various examples of non-regulatory activities by State Energy Offices including planning, conducting studies, convening stakeholder processes, and implementing programs that inform and contribute to distribution system planning. It also provides examples of State Energy Offices’ engagement in proceedings before their respective public utility commissions. As State Energy Offices face myriad challenges associated with meeting state policy goals, preparing for anticipated rates of distributed energy resource deployment, addressing concerns regarding grid reliability and resilience, and recommending and making long-term investment decisions, the examples provided through this guide can serve as a resource in navigating those challenges.

24 POWER TRANSMISSION AND DISTRIBUTION↗

A Real-Time ANPC Inverter Digital Twin with Integrated Design-For-Trust

The demand for renewable energy has increased over the last few years, and so has the demand for greater expectations within the energy market. This increasing trend has been accompanied by more significant usage of internet-connected devices (IoT), leading to critical electrical infrastructure being connected to the internet. Implementing internet connectivity with such devices and systems provides benefits such as improving the system's performance, facilitating irregularity and anomaly mitigation, and providing additional situational awareness for enhanced decision-making. However, enhancing the connected system with IoT introduces a drawback – a greater vulnerability to cyber-attacks. Cyber-attacks targeting critical infrastructure in the electrical sector have occurred in the United States and Ukraine. These cyber-attacks highlight and expose vulnerabilities that a system inherits when connecting to the internet. These attacks left thousands of customers without electricity for hours until operators could regain control of the electric utility grid. Therefore, to address the vulnerabilities of an internet-connected power electronic device, this work focused on the hardware layer of the system. Implementing a cyber-control system inside the hardware layer can significantly reduce the possibility of an attacker patching malicious controller firmware into a photovoltaic grid-connected inverter, thus mitigating the likelihood that the inverter becomes inactive a cyber-attack scenario. With this mitigation technique, if a cyberattack is successful and an attacker gains control of the network, a cyber-defense technique is in place to mitigate the impact of the cyber-attack. This additional protection layer was developed based on an innovative concept known as Digital Twin (DT). A DT, in this case, replicates an Active-Neutral Point Clamped (ANPC) inverter and was designed using a hardware language known as VHDL (Very High-Speed Integrated Circuit Hardware Description Language) and applied to Field-Programmable-GateArray (FPGA). The DT is embedded within the FPGA and contained in a controller board, the UCB (Unified Controller Board), developed by the University of Arkansas electrical engineering team. This UCB also contains two Digital Signal Processors (DSPs) responsible for generating associated signals to control an authentic physical inverter. These DSP signals are received and processed by the FPGA that implements the DT of an ANPC; in other words, it simulates in realtime the expected output of an actual ANPC inverter using the signals from the DSP. When a new firmware is ready to be patched, the DT provides output signals simulating behavior that a real ANPC inverter would generate with the new firmware. The new firmware is tested to check if it meets all the operational requirements established using a Design-For-Trust technique (DFTr). If the new firmware fails in at least one of the DFT tests, it is considered malicious and must be rejected. This work is divided into sections, such as Background, which explains the pieces that were used and the strategy behind this work; Process and Procedure, which explains the methodology that was adopted to prove the reliability and effectiveness of this work; Results and Discussion, where the simulations and results are described and explained; followed by Conclusion and Future work section, which concludes this work and adds possible future projects to continue this work further.

do Amaral Custodio, Paulo Vitor↗

Surface Trap Dynamics and Gamma‐Ray Detection Enhancement in Passivated FAPbBr 3 Perovskite Crystals

Perovskite‐based direct radiation detectors offer a compelling platform for room‐temperature gamma spectroscopy due to their high sensitivity, tunable optoelectronic properties, and compatibility with solution processing. While prior studies on formamidinium lead tribromide (FAPbBr 3 ) have shown that surface passivation mitigates deep trap state impact on the charge collection efficiency (CCE), the influence of surface‐based shallow traps on time‐resolved detector response remains largely unexplored. In this article, a digital signal processing (DSP) method is applied to analyze waveform rising edge dynamics in FAPbBr 3 single‐crystal detectors, identifying prompt and delayed charge collection components. Using the second derivative of the collected charge signal, the onset of shallow trap reemission is isolated, occurring 1.1 µs after carrier generation. Surface passivation suppressed deep trap states, shifting carrier occupancy toward shallower traps and extending the temporal window of delayed charge collection. This delayed contribution correlates with measurable changes in the temporal and amplitude distributions of detector events. By leveraging time‐domain filtering informed by these dynamics, a selective enhancement in signal quality and gamma peak‐to‐Compton ratio (PCR) is achieved, while preserving over 90% of photoelectric events. An improvement in the PCR to 1.80, from the original 1.09, is enabled by focusing on high collection efficiency events corresponding to reemitted carriers in the 1.1 to 3 µs range after the generation event. These results demonstrate a pathway for leveraging shallow trap dynamics to enhance spectral fidelity in time‐resolved perovskite detectors.

36 MATERIALS SCIENCE↗

Scalable branching on dual decomposition of stochastic mixed-integer programming problems

In this work, we present a scalable branching method for the dual decomposition of stochastic mixed-integer programming. Our new branching method is based on the branching method proposed by Caroe and Schultz that creates branching disjunctions on first-stage variables only. We propose improvements to the process for creating branching disjunctions, including (1) branching on the optimal solutions of the Dantzig-Wolfe reformulation of the restricted master problem and (2) using a more comprehensive (yet simple) measure for the dispersions associated with subproblem solution infeasibility. We prove that the proposed branching process leads to an algorithm that terminates finitely, and we provide conditions under which globally optimal solutions can be identified after termination. We have implemented our new branching method, as well as the Caroe-Schultz method and a branch-and-price method, in the open-source software package DSP. Using SIPLIB test instances, we present extensive numerical results to demonstrate that the proposed branching method significantly reduces the number of node subproblems and solution times.

97 MATHEMATICS AND COMPUTING↗

SALSA: a new versatile readout chip for MPGD detectors

The SALSA chip is a future readout ASIC foreseen for the MPGD detectors, developed in the framework of the EIC collider project, to equip the MPGD trackers of the EPIC experiment. It is designed to be versatile, to be adapted to other usages of MPGD detectors like TPC or photon detectors. It integrates a frontend block and an ADC for each of the 64 channels, associated to a configurable DSP processor meant to correct data and reduce the raw data flux to limit the output bandwidth. It will be compatible with the continuous readout foreseen for the EPIC DAQ, but will also work in a triggered environment. Several prototypes are already produced in order to qualify the different blocks of the chip, in particular the frontend, the ADC and the clock generation. The next 32-channel prototype is currently under development and is planed to be produced in 2025. In conclusion, the final prototype will be produced and tested from 2026 for a production of the SALSA chip at the horizon of 2027.

Data processing↗

Genetic Algorithm-Based Commutation Angle Control for Torque Ripple Mitigation in Switched Reluctance Motor Drives

This work addresses the application of the Genetic Algorithm (GA) technique to optimize the commutation angles of a 2 kW 8/6 switched reluctance machine (SRM). The primary goal is to reduce the well-known drawback of SRMs: the torque ripple. Firstly, the machine was modeled in Matlab /Simulink ® using lookup tables obtained via finite element method (FEM) simulations. Subsequently, the model was used to perform the GA routine aiming to find the optimal phase commutation angles that minimize the torque ripple factor. Notably, the torque performance of the SRM was significantly affected by the commutation angles during the search for the optimal solution. Afterwards, the GA results for four different operation points were verified experimentally through a developed drive platform with digital signal processor-based (DSP) control and an asymmetric bridge converter. As showed by the experiments, the proposed approach was suitable to reduce the torque ripple by more than 50% for one of the evaluated operating points. Furthermore, it was confirmed that the torque ripple mitigation led to acoustic noise improvement.

42 ENGINEERING↗

Digital Twin of an ANPC inverter with integrated Design-For-Trust

Reducing costs and increasing manufacturing output while creating reliable products are three essential components needed to keep a business competitive. In the past, having an asset that could address these three challenges at the same time would be challenging. However, recent advances in computer processing capabilities coupled with increases to network speeds allowed such a system to become possible; and this is known as a Digital Twin (DT), which represents a virtual copy of a production system or a product. Here, this work exhibits a DT application of an Active Neutral Point Clamped (ANPC) inverter using a controller. The controller emulates the ANPC responses of a new Digital Signal Processing (DSP) firmware and validates this new firmware by using Design-For-Trust (DFTr) characteristics. If the new firmware is malicious, then it should be rejected, thus adding preemptive protection measures for inverter based distributed energy resources.

cybersecurity↗

A Robust Method to Secure Multi-Inverter Grid Tied PV and Battery Energy Storage Systems Against Cyber Intrusions

This paper details a robust method to secure a multi-inverter grid tied system that interfaces photovoltaic (PV) and battery energy storage against potential cyber-attacks. The method can be applied to any third-party inverter systems without a need to modify their internal controls. A small random private excitation signal termed "watermark" is injected into the DC input voltage terminals (via a series transformer) connected to the PV/battery inverter system. An external robust cyber intrusion detector (CID) hardware consisting of a digital signal processor (DSP) generates the "watermark" and also receives the sensor signals that control the setpoints of the PV/battery grid tied system. The CID algorithm is shown to detect all possible cyber intrusions (such as false data injection(FDI)) on external sensor signals such as P and Q measured by a smart meter that control the overall system operation. The proposed CID computes online system ID and two variance tests in real time on each sensor signal and is able pinpoint intrusion location in a multi-inverter system. Results on a hardware in the loop (HIL) of a two-inverter grid connected system demonstrate effectiveness of the proposed CID system for FDI and unobservable FDI. Test results on a laboratory prototype will be discussed in the conference presentation.

Ibrahim, Hasan↗

IRIS-DMEM: Efficient Memory Management for Heterogeneous Computing

This paper proposes an efficient data memory management approach for the Intelligent RuntIme System (IRIS) heterogeneous computing framework along with new data transfer policies. IRIS provides a task-based programming model for extreme heterogeneous computing (e.g., CPU, GPU, DSP, FPGA) with support for today's most important programming languages (e.g., OpenMP, OpenCL, CUDA, HIP, OpenACC). However, the IRIS framework either forces the programmer to introduce data transfer commands for each task or relies on suboptimal memory management for automatic and transparent data transfers. The work described here extends IRIS with novel heterogeneous memory handling and introduces novel data transfer policies by employing the Distributed data MEMory handler (DMEM) for efficient and optimal movement of data among the various computing resources. The proposed approach achieves performance gains of up to 7× for tiled LU factorization and tiled DGEMM (i.e., matrix multiplication) benchmarks. Moreover, this approach also reduces data transfers by up to 71% when compared to previous IRIS heterogeneous memory management handlers. This work compares the performance results of the IRIS framework's novel DMEM with the StarPU runtime and MAGMA math library for GPUs. Experiments show a performance gain of up to 1.95× over StarPU and 2.1× over MAGMA.

Miniskar, Narasinga Rao↗

A Digital Three Level Space Vector Modulator for High Frequency Vector Sequence Generation

This letter proposes a digital high-speed three-level space vector pulse width modulator (3L-SVPWM). A conventional 3L-SVPWM is typically computation-based, involving a sequential execution of sub-tasks on a digital signal processor (DSP) based controller. The resulting high computation time of 5.4 μs limits the implementation of additional control blocks for switching frequencies greater than 100 kHz. This is overcome by transforming sub-tasks into digital blocks with 1-0 decisions and simpler arithmetic operations. The sub-task blocks are executed concurrently on a programmable logic device (PLD). Hence, a fast 3L-SVPWM execution in 140 ns is achieved. The proposed digital 3L-SVPWM enables high switching frequency operation of wide bandgap (WBG) device-based 3 L inverters to generate high fundamental frequency waveforms. A finite state machine is an integral part of the proposed implementation with the ability to generate any vector sequence, maximizing the usage of redundant vector states in 3L-SVPWM. Here, the proposed digital 3L-SVPWM operation is demonstrated with a GaN-based 3 L active neutral point clamped (3L-ANPC) inverter. Experimental results are presented at 250 kHz switching frequency to generate vector sequences for center-aligned SVPWM (CA-SVPWM) and common mode voltage reduced SVPWM (CMVR-SVPWM). The results also showcase a high fundamental frequency generation capability of 10 kHz.

active neutral point clamped inverter↗

Real-time Electromagnetic Transient Simulation of Multi-Terminal HVDC-AC Grids based on GPU

High-fidelity electromagnetic transient (EMT) simulation plays a critical role in understanding the dynamic behavior and fast transients involved in operation, control, and protection of Multi-Terminal dc (MTdc) grids. Here, this paper proposes a cost-effective high-performance real-time EMT simulation platform for large-scale cross-continental MTdc grids based on graphics processing unit (GPU). The proposed simulation platform: i) assembles detailed EMT models of all components within an MTdc-ac grid into a single platform. This setup provides a complete simulation solution to capture fast transient signals required for high-bandwidth controller design and protection studies without any compromise; ii) implements the first GPU-based simulation architecture and corresponding algorithms for MTdc-ac grids with real-time performance at scales of 1s; iii) is highly-efficient and balances the high utilization of GPU resources and low latency required for the simulation; and iv) outperforms the existing central processing unit (CPU)- or digital signal processor (DSP)/field-programmable gate array (FPGA)-based simulators in terms of its higher scalability on large-scale MTdc-ac grids and superior price-performance ratio on the hardware. Accuracy and performance of the proposed platform are evaluated with respect to the reference results from PSCAD/EMTDC environment.

24 POWER TRANSMISSION AND DISTRIBUTION↗

Mixed domain coherent link with electrically reconfigurable IMDD and coherent modes for O-band data center applications

We report the first O-band link with electrically reconfigurable intensity-modulation direct-detection (IMDD) and coherent operation using custom silicon photonic chips packaged with commercial electronic chips. Transmission below the KP4-FEC threshold is shown using commercial 53 Gbaud PAM4 digital signal processing (DSP) for 16QAM (200 Gbps/ λ ) and PAM4 (100 Gbps/ λ ). Efficient operation of the packaged full link at 12 and 11.2 pJ/bit is achieved for the PAM4 and 16QAM modes, respectively.

Misak, Stephen (ORCID:0000000154973084)↗