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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 37 records · Page 2
All sourcesNASA NTRSDOE OSTI
DOE OSTI2022

Bridging Python to Silicon: The SODA Toolchain

Systems performing scientific computing, data analysis, and machine learning tasks have a growing demand for application-specific accelerators that can provide high computational performance while meeting strict size and power requirements. However, the algorithms and applications that need to be accelerated are evolving at a rate that is incompatible with manual design processes based on hardware description languages. Agile hardware design tools based on compiler techniques can help by quickly producing an application-specific integrated circuit (ASIC) accelerator starting from a high-level algorithmic description. Here, we present the software-defined accelerator (SODA) synthesizer, a modular and open-source hardware compiler that provides automated end-to-end synthesis from high-level software frameworks to ASIC implementation, relying on multilevel representations to progressively lower and optimize the input code. Our approach does not require the application developer to write any register-transfer level code, and it is able to reach up to 364 giga floating point operations per second (GFLOPS)/W efficiency (32-bit precision) on typical convolutional neural network operators.

97 MATHEMATICS AND COMPUTING↗
NASA NTRS1990

In defense of compilation: A response to Davis' form and content in model-based reasoning

In a recent paper entitled 'Form and Content in Model Based Reasoning', Randy Davis argues that model based reasoning research aimed at compiling task specific rules from underlying device models is mislabeled, misguided, and diversionary. Some of Davis' claims are examined and his basic conclusions are challenged about the value of compilation research to the model based reasoning community. In particular, Davis' claim is refuted that model based reasoning is exempt from the efficiency benefits provided by knowledge compilation techniques. In addition, several misconceptions are clarified about the role of representational form in compilation. It is concluded that techniques have the potential to make a substantial contribution to solving tractability problems in model based reasoning.

Keller, Richard↗
NASA NTRS1994

The application of compiler-assisted multiple instruction retry to VLIW architectures

Very Long Instruction Word (VLIW) architectures enhance performance by exploiting fine-grained instruction level parallelism. We describe the development of two compiler assisted multiple instruction word retry schemes for VLIW architectures. The first scheme utilizes the compiler techniques previously developed for processors with single functional units. A compiler generated hazard-free code with different degrees of rollback capability for uniprocessors is compacted by a modified VLIW trace scheduling algorithm. Nops are then inserted in the scheduled code words to resolve data hazards for VLIW architectures. Performance is compared under three parameters: the rollback distance for uni-processors; the number of functional units; and the rollback distance for VLIW architectures. The second scheme employs a hardware read buffer to resolve frequently occurring data hazards, and utilizes the compiler to resolve the remaining hazards. Performance results are shown for six benchmark programs.

Chen, Shyh-Kwei↗
NASA NTRS2017

Automated Analysis of Stateflow Models

Stateflow is a widely used modeling framework for embedded and cyber physical systems where control software interacts with physical processes. In this work, we present a framework a fully automated safety verification technique for Stateflow models. Our approach is two-folded: (i) we faithfully compile Stateflow models into hierarchical state machines, and (ii) we use automated logic-based verification engine to decide the validity of safety properties. The starting point of our approach is a denotational semantics of State flow. We propose a compilation process using continuation-passing style (CPS) denotational semantics. Our compilation technique preserves the structural and modal behavior of the system. The overall approach is implemented as an open source toolbox that can be integrated into the existing Mathworks Simulink Stateflow modeling framework. We present preliminary experimental evaluations that illustrate the effectiveness of our approach in code generation and safety verification of industrial scale Stateflow models.

Stateflow↗
DOE OSTI2026

ROSE

Developed at Lawrence Livermore National Laboratory (LLNL), ROSE is an open source compiler infrastructure to build source-to-source program transformation and analysis tools for large-scale C (C89 to C23), C++ (C++98 to C++23), UPC, Fortran (Fortran4, 66, 77, 95, 2003), OpenMP, Java, Python, and Binary applications. ROSE users range from experienced compiler researchers to library and tool developers who may have minimal compiler experience. ROSE is particularly well suited for building custom tools for static analysis, program optimization, arbitrary program transformation, domain-specific optimizations, complex loop optimizations, performance analysis, and cyber-security. ROSE is: A library (and set of associated tools) to quickly and easily apply compiler techniques to one's code in order to improve application performance and developer productivity. A research and development compiler infrastructure for for writing custom source-to-source translators to perform source code transformations, analysis, and optimizations. Is

Pinnow, NathanT [Lawrence Livermore National Labor↗
NASA NTRS1990

Parallel machine architecture and compiler design facilities

The objective is to provide an integrated simulation environment for studying and evaluating various issues in designing parallel systems, including machine architectures, parallelizing compiler techniques, and parallel algorithms. The status of Delta project (which objective is to provide a facility to allow rapid prototyping of parallelized compilers that can target toward different machine architectures) is summarized. Included are the surveys of the program manipulation tools developed, the environmental software supporting Delta, and the compiler research projects in which Delta has played a role.

Kuck, David J.↗
NASA NTRS1992

Reformulating Constraints for Compilability and Efficiency

KBSDE is a knowledge compiler that uses a classification-based approach to map solution constraints in a task specification onto particular search algorithm components that will be responsible for satisfying those constraints (e.g., local constraints are incorporated in generators; global constraints are incorporated in either testers or hillclimbing patchers). Associated with each type of search algorithm component is a subcompiler that specializes in mapping constraints into components of that type. Each of these subcompilers in turn uses a classification-based approach, matching a constraint passed to it against one of several schemas, and applying a compilation technique associated with that schema. While much progress has occurred in our research since we first laid out our classification-based approach [Ton91], we focus in this paper on our reformulation research. Two important reformulation issues that arise out of the choice of a schema-based approach are: (1) compilability-- Can a constraint that does not directly match any of a particular subcompiler's schemas be reformulated into one that does? and (2) Efficiency-- If the efficiency of the compiled search algorithm depends on the compiler's performance, and the compiler's performance depends on the form in which the constraint was expressed, can we find forms for constraints which compile better, or reformulate constraints whose forms can be recognized as ones that compile poorly? In this paper, we describe a set of techniques we are developing for partially addressing these issues.

Tong, Chris↗
DOE OSTI2021

Sampling on NISQ Devices: "Who’s the Fairest One of All?"

Modern NISQ devices are subject to a variety of biases and sources of noise that degrade the solution quality of computations carried out on these devices. A natural question that arises in the NISQ era, is how fairly do these devices sample ground state solutions. To this end, we run five fair sampling problems (each with at least three ground state solutions) that are based both on quantum annealing and, on the Grover Mixer, -QAOA algorithm for gate-based NISQ hardware. In particular, we use seven IBM Q devices, the Aspen-9 Rigetti device, the IonQ device, and three D-Wave quantum annealers. For each of the fair sampling problems, we measure the ground state probability, the relative fairness of the frequency of each ground state solution with respect to the other ground state solutions, and the aggregate error as given by each hardware provider. Overall, our results show that NISQ devices do not achieve fair sampling yet. Furthermore, we also observe differences in the software stack with a particular focus on compilation techniques that illustrate what work will still need to be done to achieve a seamless integration of frontend (i.e., quantum circuit description) and backend compilation.

Computer Science↗
DOE OSTI2024

Research Progress and Perspectives on Pre‐Sodiation Strategies for Sodium‐Ion Batteries

Sodium‐ion batteries (SIBs) with abundant elements have garnered significant attention from researches as a promise compensation to lithium‐ion batteries (LIBs). However, the large‐scale commercial application of SIBs is partially hindered by the limited initial coulombic efficiency (ICE) due to the irreversible formation of solid electrolyte interphase (SEI) and intercalation into the defects in the anode. Similar to pre‐lithiation techniques, pre‐sodiation approaches are considered to be one of the most direct and effective way to compensate for the loss of active sodium at the anode side of SIBs during the initial cycle. In this context, additional sodium ions are pre‐injected to the cathode/anode material by chemical/electrochemical methods, aiming to improve battery span life and energy density. Here, this review delves into the necessity and impact of pre‐sodiation techniques, compiling the latest research progress, for instance, self‐sacrificing cathode additives, over‐sodiated cathode materials, direct contact and solution chemical pre‐sodiation. Notably, the research mechanisms underlying solution chemical pre‐sodiation are highlighted. This comprehensive overview aims to foster a deeper understanding of the pre‐sodiation techniques and expects to provide guidance for realizing the commercial application of high energy density sodium‐ion batteries.

25 ENERGY STORAGE↗
DOE OSTI2026

Pathfinding quantum simulations of neutrinoless double- β decay

We present results from co-designed quantum simulations of the neutrinoless double- β decay of a simple nucleus in 1+1D quantum chromodynamics using IonQ’s Forte-generation trapped-ion quantum computers. Electrons, neutrinos, and up and down quarks are distributed across two lattice sites and mapped to 32 qubits, with an additional 4 qubits used for flag-based error mitigation. A four-fermion interaction is used to implement weak interactions, and lepton-number violation is induced by a neutrino Majorana mass. Quantum circuits that prepare the initial nucleus and time evolve with the Hamiltonian containing the strong and weak interactions are executed on IonQ Forte Enterprise. Enabled by tuned model parameters, lepton-number violation is observed in real time, providing a clear signal of neutrinoless double- β decay. This was made possible by co-designing the simulation to maximally utilize the all-to-all connectivity and native gate-set available on IonQ’s quantum computers. Quantum circuit compilation techniques and co-designed error-mitigation methods, informed from executing benchmarking circuits with up to 2,356 two-qubit gates, enabled observables to be extracted with high precision. We discuss the potential of future quantum simulations to provide yocto-second resolution of the reaction pathways in these, and other, nuclear processes.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗
NASA NTRS1991

A Large-Grain Mapping Approach for Multiprocessor Systems Through Data Flow Model Ph.D. Thesis

A large-grain level mapping method is presented of numerical oriented applications onto multiprocessor systems. The method is based on the large-grain data flow representation of the input application and it assumes a general interconnection topology of the multiprocessor system. The large-grain data flow model was used because such representation best exhibits inherited parallelism in many important applications, e.g., CFD models based on partial differential equations can be presented in large-grain data flow format, very effectively. A generalized interconnection topology of the multiprocessor architecture is considered, including such architectural issues as interprocessor communication cost, with the aim to identify the 'best matching' between the application and the multiprocessor structure. The objective is to minimize the total execution time of the input algorithm running on the target system. The mapping strategy consists of the following: (1) large-grain data flow graph generation from the input application using compilation techniques; (2) data flow graph partitioning into basic computation blocks; and (3) physical mapping onto the target multiprocessor using a priority allocation scheme for the computation blocks.

Kim, Hwa-Soo↗
NASA NTRS1992

USRA/RIACS

The Research Institute for Advanced Computer Science (RIACS) was established by the Universities Space Research Association (USRA) at the NASA Ames Research Center (ARC) on June 6, 1983. RIACS is privately operated by USRA, a consortium of universities with research programs in the aerospace sciences, under a cooperative agreement with NASA. The primary mission of RIACS is to provide research and expertise in computer science and scientific computing to support the scientific missions of NASA ARC. The research carried out at RIACS must change its emphasis from year to year in response to NASA ARC's changing needs and technological opportunities. A flexible scientific staff is provided through a university faculty visitor program, a post doctoral program, and a student visitor program. Not only does this provide appropriate expertise but it also introduces scientists outside of NASA to NASA problems. A small group of core RIACS staff provides continuity and interacts with an ARC technical monitor and scientific advisory group to determine the RIACS mission. RIACS activities are reviewed and monitored by a USRA advisory council and ARC technical monitor. Research at RIACS is currently being done in the following areas: (1) parallel computing; (2) advanced methods for scientific computing; (3) learning systems; (4) high performance networks and technology; and (5) graphics, visualization, and virtual environments. In the past year, parallel compiler techniques and adaptive numerical methods for flows in complicated geometries were identified as important problems to investigate for ARC's involvement in the Computational Grand Challenges of the next decade. We concluded a summer student visitors program during this six months. We had six visiting graduate students that worked on projects over the summer and presented seminars on their work at the conclusion of their visits. RIACS technical reports are usually preprints of manuscripts that have been submitted to research journals or conference proceedings. A list of these reports for the period July 1, 1992 through December 31, 1992 is provided.

Oliger, Joseph↗
NASA NTRS1993

RIACS/USRA

The Research Institute for Advanced Computer Science (RIACS) was established by the Universities Space Research Association (USRA) at the NASA Ames Research Center (ARC) on 6 June 1983. RIACS is privately operated by USRA, a consortium of universities with research programs in the aerospace sciences, under contract with NASA. The primary mission of RIACS is to provide research and expertise in computer science and scientific computing to support the scientific missions of NASA ARC. The research carried out at RIACS must change its emphasis from year to year in response to NASA ARC's changing needs and technological opportunities. A flexible scientific staff is provided through a university faculty visitor program, a post doctoral program, and a student visitor program. Not only does this provide appropriate expertise but it also introduces scientists outside of NASA to NASA problems. A small group of core RIACS staff provides continuity and interacts with an ARC technical monitor and scientific advisory group to determine the RIACS mission. RIACS activities are reviewed and monitored by a USRA advisory council and ARC technical monitor. Research at RIACS is currently being done in the following areas: Parallel Computing, Advanced Methods for Scientific Computing, High Performance Networks and Technology, and Learning Systems. Parallel compiler techniques, adaptive numerical methods for flows in complicated geometries, and optimization were identified as important problems to investigate for ARC's involvement in the Computational Grand Challenges of the next decade.

Oliger, Joseph↗
NASA NTRS1971

Testing methods and techniques: Environmental testing: A compilation

Various devices and techniques are described for testing hardware and components in four special environments: low temperature, high temperature, high pressure, and vibration. Items ranging from an automatic calibrator for pressure transducers to a fixture for testing the susceptibility of materials to ignition by electric spark are included.

Source record↗
NASA NTRS1971

Testing methods and techniques: Strength of materials and components. A compilation

The methods, techniques, and devices used in testing the mechanical properties of various materials are presented. Although metals and metal alloys are featured prominently, some of the items describe tests on a variety of other materials, from concrete to plastics. Many of the tests described are modifications of standard testing procedures, intended either to adapt them to different materials and conditions, or to make them more rapid and accurate. In either case, the approaches presented can result in considerable cost savings and improved quality control. The compilation is presented in two sections. The first deals specifically with material strength testing; the second treats the special category of fracture and fatigue testing.

Source record↗
NASA NTRS1972

Testing methods and techniques: Testing electrical and electronic devices: A compilation

The methods, techniques, and devices used in testing various electrical and electronic apparatus are presented. The items described range from semiconductor package leak detectors to automatic circuit analyzer and antenna simulators for system checkout. In many cases the approaches can result in considerable cost savings and improved quality control. The testing of various electronic components, assemblies, and systems; the testing of various electrical devices; and the testing of cables and connectors are explained.

Source record↗