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Results for “system performance”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 343 records · Page 19
All sourcesNASA NTRSDOE OSTI
NASA NTRS2004

Mars Exploration Rover heat rejection system performance - comparison of ground and flight data

This paper will describe the various design modifications made on the MER HRS from that of Mars Pathfinder spacecraft. A description of the flight performance during the seven-month cruise of the spacecraft will be given. A comparison of the performance on the ground and the flight will be presented. Any significant deviation in the flight performance will be described.

heat rejection↗
NASA NTRS2012

ACCESS: Design and Sub-System Performance

Establishing improved spectrophotometric standards is important for a broad range of missions and is relevant to many astrophysical problems. ACCESS, "Absolute Color Calibration Experiment for Standard Stars", is a series of rocket-borne sub-orbital missions and ground-based experiments designed to enable improvements in the precision of the astrophysical flux scale through the transfer of absolute laboratory detector standards from the National Institute of Standards and Technology (NIST) to a network of stellar standards with a calibration accuracy of 1% and a spectral resolving power of 500 across the 0.35 -1.7 micrometer bandpass.

Kaiser, Mary Elizabeth↗
NASA NTRS2017

Meteorological Observations and System Performance From the NASA D3R's First 5 Years

The NASA dual-frequency, dual-polarization, Doppler radar (D3R) was conceived and developed to support ground validation (GV) operations of the Global Precipitation Measurement (GPM) mission. The D3R operates in the same frequencies bands, Ku- and Ka-band, as GPMs dual-frequency precipitation radar enabling direct comparisons of microphysical observations of precipitation. To support the GPM GVmission, D3R substantively participated in four field campaigns in North America with diverse geographic features covering both winter and summer conditions.

Radar↗
NASA NTRS2015

SARDA HITL #6 Simulation: System Performance Analysis (Initial Results)

This presentation discusses the results of the 6th human-in-the-loop simulation of the Spot and Runway Departure Advisor (SARDA). SARDA is a research prototype decision support tool for both Air Traffic Control Tower controllers and airlines ramp controllers to assit in controlling surface traffic of a busy airport. Data was collected during the human-in-the-loop simulations of SARDA for ramp operatoins at Charlotte International Airport (Oct-Nov 2014). The performance results include taxi time, taxi delay, total delay, and runway usage.

surface management↗
NASA NTRS2020

An embedded planar-foil capacitor material, FPGA based interposer, aimed at improving system performance and reduced board size for space based electronics

This paper presents work to date in developing, and testing an embedded planar-foil capacitor based interposer intended to be integrated together with high-density components such as Field Programmable Gate Arrays (FPGAs), and Application Specific Integrated Circuits (ASIC). FPGA devices typically have a large number of I/O and power pins. The high speed enabled by these devices requires a large number of discrete bypass capacitors as close as possible to the power pins. These capacitors take up a considerable amount of the board area on the application circuit board. The developed interposer replaces these components freeing up space of traditional bypass capacitors for other circuitry.

Cheng, Ben↗
NASA NTRS2020

An Embedded Planar-Foil Capacitor Material, FPGA Based Interposer, Aimed at Improving System Performance and Reduced Board Size for Space Based Electronics

This paper presents our work to date in developing, and testing an embedded planar-foil capacitor based interposer intended to be integrated together with high-density components such as Field Programmable Gate Arrays (FPGAs), and Application Specific Integrated Circuit (ASIC) applications. FPGA devices typically have a large number of I/O and power pins. The high speed enabled by these devices requires a large number of discrete bypass capacitors as close as possible to the power pins. These capacitors take up a considerable amount of the board area on the application circuit board. Our interposer replaces these components freeing up space of traditional bypass capacitors for other circuitry. Our Interposer focuses on the needs of Micro Semi’s RTG4 FPGA. We developed the interposer using COTS embedded foil capacitors. The Interposer is customized to the capacitance requirements for each of the FPGA banks. We evaluated three foil manufactures Oak Mitsui, 3M and TDK. The three different designs were evaluated, but we will focus on the Oak-Mitsui based Interposer that we constructed and tested. Through simulations, we validate the horizontal and vertical interconnect inductances, that FPGA decoupling requirements are met. The use of the interposer results in an overall reduction in our Printed Wiring Board (PWB) area.

Hunter, Don J↗