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At least 343 records · Page 19

Nanoscale reshaping of resonant dielectric microstructures by light-driven explosions

Femtosecond-laser-assisted material restructuring employs extreme optical intensities to localize the ablation regions. To overcome the minimum feature size limit set by the wave nature of photons, there is a need for new approaches to tailored material processing at the nanoscale. Here, we report the formation of deeply-subwavelength features in silicon, enabled by localized laser-induced phase explosions in prefabricated silicon resonators. Using short trains of mid-infrared laser pulses, we demonstrate the controllable formation of high aspect ratio (>10:1) nanotrenches as narrow as ~ $λ / 80$. The trench geometry is shown to be scalable with wavelength, and controlled by multiple parameters of the laser pulse train, such as the intensity and polarization of each laser pulse and their total number. Particle-in-cell simulations reveal localized heating of silicon beyond its boiling point and suggest its subsequent phase explosion on the nanoscale commensurate with the experimental data. The observed femtosecond-laser assisted nanostructuring of engineered microstructures (FLANEM) expands the nanofabrication toolbox and opens exciting opportunities for high-throughput optical methods of nanoscale structuring of solid materials.

42 ENGINEERING↗

Chirped-grating spectrometer-on-a-chip

We demonstrate an on-chip spectrometer readily integrable with CMOS electronics. The structure is comprised of a SiO 2 /Si 3 N 4 /SiO 2 waveguide atop a silicon substrate. A transversely chirped grating is fabricated, in a single-step optical lithography process, on a portion of the waveguide to provide angle and wavelength dependent coupling to the guided mode. The spectral and angular information is encoded in the spatial dependence of the grating period. A uniform pitch grating area, separated from the collection area by an unpatterned propagation region, provides the out-coupling to a CMOS detector array. A resolution of 0.3 nm at 633 nm with a spectral coverage tunable across the visible and NIR (to ∼ 1 µm limited by the Si photodetector) by changing the angle of incidence, is demonstrated without the need for any signal processing deconvolution. This on-chip spectrometer concept will cost effectively enable a broad range of applications that are beyond the reach of current integrated spectroscopic technologies.

Nezhadbadeh, Shima↗

Crystallization and assembly at interfaces: Celebrating the achievements of a vibrant research community

Crystallization is one of the cornerstones of modern materials science and engineering and plays a critical role in industries ranging from petroleum derivative manufacturing to microstructural engineering of structural materials and the defect-free growth of silicon single crystals for integrated chip technology. Also, in the realm of environmental and biological processes, the mineralization of diverse compounds has shaped the vast array of ecosystems we observe today. Conversely, understanding the crystallization and assembly of building blocks of various sizes at interfaces has broader impacts on materials synthesis, performance of energy storage devices, optimized processing conditions, and more.

36 MATERIALS SCIENCE↗

Ion Traps and Packaging for Heterogenous Integration - Chimera

Microfabricated surface ion traps and silicon-based photonics are critical technologies for scaling quantum systems. Current ion trap architectures face scalability and integration challenges due to limitations in optical access, fabrication techniques, and material compatibility. State-of-the-art quantum computers and atomic clocks are investigating monolithic integration, which necessitates custom traps for each ion species and has not overcome the integration hurdles presented by merging these technologies. The Chimera (Ion Traps and Packaging for Heterogeneous Integration) project proposes a novel approach utilizing heterogeneous integration (HI) of ion traps and photonic circuits. This separation of components allows for flexibility in ion trap design and reduces fabrication compromises. The Chimera project specifically designed an ion trap to interface vertically with a separately fabricated waveguide chip and demonstrates the first steps to integrating them at the packaging level. The ion trap features a large area of removed silicon, allowing the photonics chip outputs closer to the ion trap, improving alignment and packaging processes. The alignment must be accurate to < 1 µm to ensure that the light from the waveguide can overlap with the trapping region. This fine alignment must also be maintained through an ultra-high vacuum bake, a critical step in preparing an ion trap experiment. By combining separate chips, we demonstrate a new path for scaling trapped ion technology that is less reliant on monolithic integration. We successfully fabricated a trap with a large area of oxide removed, resulting in a region thinned to about 40 µm, a key milestone toward successful integration.

42 ENGINEERING↗

Development of Next Generation Hierarchical Hybrid Cu-Si anode Batteries via Direct-Ink Writing Application: End of (6th) Month Report - November 2025

Sustainable renewable energy continues to be in dire need to effectively combat global warming. Emerging technology for electric vehicles/ devices remains in high demand that is not only lower in cost, more efficient, but safer in comparison to commercial materials on the market. Although first-generation lithium-ion batteries have exhibited extensive commercial application, conventional graphite no longer meets this increasing demand as an efficient anode material. Due to the fact that graphite has a subpar theoretical specific capacity (372 mAh g -1 ), thus significant limitations in rate capability (for potential faster charging at higher C-rates currently commercially available.). Alternatively, silicon has gained significant attention as a superior candidate to potentially surpass graphite. Due to silicon’s exceedingly high theoretical capacity (4,200 mAh g -1 ) in comparison to standard graphite, its abundance thus in turn it’s low-cost, in addition to exhibiting a significantly low working potential (< 0.4 V vs Li/Li + ). However, one of the main (and most detrimental) challenges is silicon’s tendency to expand in volume (> 300%) upon discharge as it begins the lithiation process. As a direct result, it causes not only for the particles to both crack and pulverize under mechanical stress as the volume continues to expand and contract during cycling. Upon assembling the cell, it needs to undergo ‘charging’ for initially discharging/ ‘activating’ the cell, otherwise commonly known as the ‘formation’ step. As a result a solid electrolyte interface (SEI) layer begins to form at the anode surface because some of the electrolyte begins to react during the formation process. However, this (SEI) layer is deemed as a ‘protective’ interlayer because in theory it prevents further reaction as the cell continues to cycle. However, due to the volume change it causes significant degradation at the interface. As cracking starts to occur at the anode surface, it results in a ‘new’ altered surface with each cycle that causes further reaction with the electrolyte as a byproduct quickly consuming active Li/ and more electrolyte. Thus, fracturing this ‘protective layer,’ causing significantly higher impedance as a result, and in turn a decline in capacity due to active Li-loss. In addition to the active material exfoliating off from the current collector, further contributing to the steady decline in capacity and overall performance. Current state of the art Si-anode batteries on the market range between a maximum content of 5-10 Si wt%. It has been previously reported Tesla has utilized SiO x -C anodes containing 5 wt% Si within their ‘Model 3/ Model X’ electric vehicles. However, more recent ‘Model 3’ vehicles have started to incorporate 10 Si wt%, in which they were able to increase their energy density upwards by approximately 30%. Recent effort has been focused on continuing to increase the wt% of Si being utilized, eventually to 100 wt% of Si, to maximize the energy density even further.

36 MATERIALS SCIENCE↗

Identification and mitigation of memory block timing issue in ITk ABCStar during ASIC production

The ABCStar is a mixed-signal front-end readout ASIC for the strips sensor portion of the ATLAS ITk detector being developed as part of the High-Luminosity LHC upgrade. In pre-production testing, a subtle design flaw was uncovered in the ABCStar that was reducing wafer yields in some manufactured lots from the expected 90% to as low as 2%. The root cause was determined to be a timing issue in the logic synthesized to control previously silicon proven memory blocks re-used for this ASIC. The solutions proposed included manufacturing process changes by the wafer foundry, changes to the operating parameters for the ABCStar in the detector, and the possibility that a redesign might be required. The two mitigation efforts were undertaken in parallel, with the process modification route a less desirable solution since already manufactured wafers would need to be scrapped in favour of the new ones. Based on a knowledge of the existing process, and testing done on the worst performing wafers, it was proposed that raising the core operating voltage of the ABCStar from 1.20V to 1.25V could address the timing issue by sufficiently speeding up its transistors. An extensive testing program that included the effects of temperature and radiation expected over the lifetime of the ITk detector was conducted to validate that approach. Those tests and studies proved that even the worst performing wafers would have yields over 80% with the 1.25V core voltage, and neither the modified process nor redesign would be required for ensuring reliable operation of the ITk. Based on testing, a further timing mitigation was implemented to provide an additional margin of reliability by increasing the duty cycle of the clock to the ABCStar. Testing of all ABCStar wafers has been completed and the production of the detector modules using these ASICs is now well underway as a result of the efforts detailed herein.

FOS: Physical sciences↗

Parallelizing the Unpacking and Clustering of Detector Data for Reconstruction of Charged Particle Tracks on Multi-core CPUs and Many-core GPUs

We present results from parallelizing the unpacking and clustering steps of the raw data from the silicon strip modules for reconstruction of charged particle tracks. Throughput is further improved by concurrently processing multiple events using nested OpenMP parallelism on CPU or CUDA streams on GPU. The new implementation along with earlier work in developing a parallelized and vectorized implementation of the combinatoric Kalman filter algorithm has enabled efficient global reconstruction of the entire event on modern computer architectures. We demonstrate the performance of the new implementation on Intel Xeon and NVIDIA GPU architectures.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗

Silicon-Lattice-Matched Boron-Doped Gallium Phosphide: A Scalable Acousto-Optic Platform

The compact size, scalability, and strongly confined fields in integrated photonic devices enable new functionalities in photonic networking and information processing, both classical and quantum. Gallium phosphide (GaP) is a promising material for active integrated photonics due to its high refractive index, wide bandgap, strong nonlinear properties, and large acousto-optic figure of merit. Here, this study demonstrates that silicon-lattice-matched boron-doped GaP (BGaP), grown at the 12-inch wafer scale, provides similar functionalities as GaP. BGaP optical resonators exhibit intrinsic quality factors exceeding 25,000 and 200,000 at visible and telecom wavelengths, respectively. It further demonstrates the electromechanical generation of low-loss acoustic waves and an integrated acousto-optic (AO) modulator. High-resolution spatial and compositional mapping, combined with ab initio calculations, indicate two candidates for the excess optical loss in the visible band: the silicon-GaP interface and boron dimers. These results demonstrate the promise of the BGaP material platform for the development of scalable AO technologies at telecom and provide potential pathways toward higher performance at shorter wavelengths.

36 MATERIALS SCIENCE↗

Photo‐Induced Charge State Dynamics of the Neutral and Negatively Charged Silicon Vacancy Centers in Room‐Temperature Diamond

Abstract The silicon vacancy (SiV) center in diamond is drawing much attention due to its optical and spin properties, attractive for quantum information processing and sensing. Comparatively little is known, however, about the dynamics governing SiV charge state interconversion mainly due to challenges associated with generating, stabilizing, and characterizing all possible charge states, particularly at room temperature. Here, multi‐color confocal microscopy and density functional theory are used to examine photo‐induced SiV recombination — from neutral, to single‐, to double‐negatively charged — over a broad spectral window in chemical‐vapor‐deposition (CVD) diamond under ambient conditions. For the SiV 0 to SiV ‐ transition, a linear growth of the photo‐recombination rate with laser power at all observed wavelengths is found, a hallmark of single photon dynamics. Laser excitation of SiV ‒ , on the other hand, yields only fractional recombination into SiV 2‒ , a finding that is interpreted in terms of a photo‐activated electron tunneling process from proximal nitrogen atoms.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗

Silicon Carbide Passive Temperature Sensors at INL

Discuss the SiC passive thermometry methods currently performed at INL and ORNL, decide on best path forward for establishing an ASTM Standard for processing SiC temperature monitors, and expand this ASTM benchmarking efforts to international collaborators (Netherlands, Canada, and Poland).

36 MATERIALS SCIENCE↗

Enhanced ferroelectricity in ultrathin films grown directly on silicon

Ultrathin ferroelectric materials could potentially enable low-power logic and nonvolatile memories. As ferroelectric materials are made thinner, however, the ferroelectricity is usually suppressed. Size effects in ferroelectrics have been thoroughly investigated in perovskite oxides—the archetypal ferroelectric system. Perovskites, however, have so far proved unsuitable for thickness scaling and integration with modern semiconductor processes. In this paper we report ferroelectricity in ultrathin doped hafnium oxide (HfO 2 ), a fluorite-structure oxide grown by atomic layer deposition on silicon. We demonstrate the persistence of inversion symmetry breaking and spontaneous, switchable polarization down to a thickness of one nanometre. Our results indicate not only the absence of a ferroelectric critical thickness but also enhanced polar distortions as film thickness is reduced, unlike in perovskite ferroelectrics. This approach to enhancing ferroelectricity in ultrathin layers could provide a route towards polarization-driven memories and ferroelectric-based advanced transistors. This work shifts the search for the fundamental limits of ferroelectricity to simpler transition-metal oxide systems—that is, from perovskite-derived complex oxides to fluorite-structure binary oxides—in which ‘reverse’ size effects counterintuitively stabilize polar symmetry in the ultrathin regime.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗

Prediction of Leakage Current and Depletion Voltage in Silicon Detectors Under Extraterrestrial Radiation Conditions

Silicon detection is a mature technology for registering the passage of charged particles. At the same time it continues to evolve toward increasing radiation tolerance as well as precision and adaptability. For these reasons it is likely to remain a critical element of detection of systems associated with extraterrestrial exploration. Silicon sensor leakage current and depletion voltage depend on the integrated fluence received by the sensor and on its thermal history during and after the irradiation process. For minimal assumptions on shielding and hence on the particle energy spectrum, and using published data on Martian ground temperature, we predict the leakage current density and the depletion voltage, as a function of time, of silicon sensors in transit to and deployed continuously on the Mars surface for a duration of up to 28 Earth-years, for several sensor geometries and a worst-case temperature scenario.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗

Zinc‐Imidazolate Films as an All‐Dry Resist Technology

Here, motivated by the drawbacks of solution phase processing, an all‐dry resist formation process is presented that utilizes amorphous zinc‐imidazolate (aZnMIm) films deposited by atomic/molecular layer deposition (ALD/MLD), patterned with electron beam lithography (EBL), and developed by novel low temperature (120 °C) gas phase etching using 1,1,1,5,5,5‐hexafluoroacetylacetone (hfacH) to achieve well‐resolved 22 nm lines with a pitch of 30 nm. The effects of electron beam irradiation on the chemical structure and hfacH etch resistance of aZnMIm films are investigated, and it is found that electron irradiation degrades the 2‐methylimidazolate ligands and transforms aZnMIm into a more dense material that is resistant to etching by hfacH and has a C:N:Zn ratio effectively identical to that of unmodified aZnMIm. These findings showcase the potential for aZnMIm films to function in a dry resist technology. Sensitivity, contrast, and critical dimensions of the patterns are determined to be 37 mC cm −2 , 0.87, and 29 nm, respectively, for aZnMIm deposited on silicon substrates and patterned at 30 keV. This work introduces a new direction for solvent‐free resist processing, offering the prospect of scalable, high‐resolution patterning techniques for advanced semiconductor fabrication processes.

77 NANOSCIENCE AND NANOTECHNOLOGY↗

Lossless Phonon Transition Through GaN‐Diamond and Si‐Diamond Interfaces

Abstract Advancing Silicon (Si) technology beyond Moore's law through 3D architectures requires highly efficient heat management methods compatible with foundry processes. While continued increases in transistor density can be achieved through 3D architectures, self‐heating in the upper tiers degrades the performance. Self‐heating is a critical problem for high‐power, high‐frequency, wide bandgap, and ultra‐wide bandgap devices as well. Diamond, known for its exceptional thermal conductivity, offers a viable solution in both these cases. Since thermal boundary resistance (between the channel/junction and diamond plays a crucial role in overall thermal resistance, this study investigates various dielectrics for interface engineering, such as Silicon dioxide (SiO 2 ), amorphous‐ Silicon Carbide (a‐SiC), and Silicon Nitride (SiN x ), to make a phonon bridge at gallium nitride (GaN)‐diamond and Si‐diamond interfaces. The a‐SiC interlayer reduces diamond/GaN (<5 m 2 K per GW) and diamond/Si (<2 m 2 K per GW) thermal boundary resistances by linking low‐ and high‐frequency phonons, boosting phonon transport through the interface. Engineered interfaces enhance heat spreading from the channel/junction and rule out premature failure.

Malakoutian, Mohamadali↗

Molecular Layer Deposited Aluminum‐Based Hybrid Resist for High‐Resolution Nanolithography and Direct Ultra‐High Aspect Ratio Pattern Transfer

Inorganic-containing hybrid photoresists are critical for next-generation extreme ultraviolet (EUV) lithography and angstrom-era semiconductor miniaturization. However, associated conventional solution processing struggles to achieve ultrathin, uniform films with high conformality and compositional control, limiting overall patterning performance. Here, this study reports the systematic lithographic patterning characterization of an Al-based hybrid resist synthesized via vapor-phase molecular layer deposition (MLD), using the trimethylaluminum (TMA) metal precursor and the hydroquinone (HQ) aromatic organic linker. The resist supports both sub-20 nm high-resolution nanolithography and virtually infinite silicon plasma etch selectivity. Lithographic performance studied using electron beam lithography (EBL) as a proxy for EUV shows that, under an optimized process adopting post-exposure bake, the resist achieves the best resolution of 15.4 nm linewidth under stringent 1:1 line-space high-density patterning—limited only by the minimum beam size of the EBL system. The resist also shows wide dose latitude and balanced performance in resolution, roughness, and sensitivity. The infinite silicon etch selectivity, stemming from spontaneous aluminum oxyfluoride passivation layer formation, enables fabrication of micrometer-tall, 40 nm-wide silicon nanofin structures using only a ≈30 nm-thick resist layer, without no hard mask. These results highlight the potential of MLD-based hybrid resists for developing next-generation resist materials for micro/nanoelectronics manufacturing.

36 MATERIALS SCIENCE↗

Variable voltage electron microscopy: Toward atom-by-atom fabrication in 2D materials

The precisely focused electron beam (e-beam) in scanning transmission electron microscopy has been found to be a versatile tool for patterning matter on the atomic level and enabling atom-by-atom fabrication, however, beam-induced phenomena are known to be extremely sensitive to the e-beam energy and are closely correlated with the proximity of the knock-on threshold. Here we provide a method to control the energy transferred to the sample while facilitating much faster changes in accelerating voltages by maintaining a nearly constant temperature in the electron microscope lenses. We use this method to demonstrate in-situ nano-milling of a graphene film followed rapidly by “gentler” imaging at lower energy. Additionally, the insertion and controlled movement of silicon dopants in graphene is demonstrated by employing a different e-beam energy during each process. We believe the incorporation of variable e-beam energy will broaden the potential for atomic scale e-beam fabrication.

36 MATERIALS SCIENCE↗

Giant Enhancement of Four-Wave Mixing by Doubly Zone-Folded Nonlocal Metasurfaces

Resonant optical metasurfaces hold promise for enhancing nonlinear optical signals and manipulating their fundamental properties. However, they rarely excel at amplifying signals from nonlinear processes with two incident pump beams, such as four-wave mixing (FWM) or sum-frequency generation. Frequency-mixing experiments impose challenging requirements for metasurface design due to the need to support multiple optical resonances with compatible field profiles at specified resonant wavelengths, often across a substantial spectral separation. Here, in this work, we introduce nonlocal ‘quadromer’ metasurfaces containing four nanostructures per unit cell as the key to unlocking configurable, multiresonant metasurfaces that enhance frequency-mixing processes. As a proof of concept, we experimentally demonstrate enhanced FWM using quadromer metasurfaces made of silicon and silicon-rich silicon nitride. The results are relevant for applications such as imaging of infrared light upconverted into the visible spectrum and the generation of quantum light via spontaneous FWM.

four-wave mixing↗

Large-scale integration of artificial atoms in hybrid photonic circuits

A central challenge in developing quantum computers and long-range quantum networks is the distribution of entanglement across many individually controllable qubits. Colour centres in diamond have emerged as leading solid-state ‘artificial atom’ qubits because they enable on-demand remote entanglement, coherent control of over ten ancillae qubits with minute-long coherence times and memory-enhanced quantum communication. A critical next step is to integrate large numbers of artificial atoms with photonic architectures to enable large-scale quantum information processing systems. So far, these efforts have been stymied by qubit inhomogeneities, low device yield and complex device requirements. Here we introduce a process for the high-yield heterogeneous integration of ‘quantum microchiplets’—diamond waveguide arrays containing highly coherent colour centres—on a photonic integrated circuit (PIC). We use this process to realize a 128-channel, defect-free array of germanium-vacancy and silicon-vacancy colour centres in an aluminium nitride PIC. Photoluminescence spectroscopy reveals long-term, stable and narrow average optical linewidths of 54 megahertz (146 megahertz) for germanium-vacancy (silicon-vacancy) emitters, close to the lifetime-limited linewidth of 32 megahertz (93 megahertz). We show that inhomogeneities of individual colour centre optical transitions can be compensated in situ by integrated tuning over 50 gigahertz without linewidth degradation. The ability to assemble large numbers of nearly indistinguishable and tunable artificial atoms into phase-stable PICs marks a key step towards multiplexed quantum repeaters and general-purpose quantum processors

36 MATERIALS SCIENCE↗