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At least 343 records · Page 19

High-throughput manufacturing of epitaxial membranes from a single wafer by 2D materials-based layer transfer process

Layer transfer techniques have been extensively explored for semiconductor device fabrication as a path to reduce costs and to form heterogeneously integrated devices. These techniques entail isolating epitaxial layers from an expensive donor wafer to form freestanding membranes. However, current layer transfer processes are still low-throughput and too expensive to be commercially suitable. Here we report a high-throughput layer transfer technique that can produce multiple compound semiconductor membranes from a single wafer. We directly grow two-dimensional (2D) materials on III–N and III–V substrates using epitaxy tools, which enables a scheme comprised of multiple alternating layers of 2D materials and epilayers that can be formed by a single growth run. Each epilayer in the multistack structure is then harvested by layer-by-layer mechanical exfoliation, producing multiple freestanding membranes from a single wafer without involving time-consuming processes such as sacrificial layer etching or wafer polishing. Moreover, atomic-precision exfoliation at the 2D interface allows for the recycling of the wafers for subsequent membrane production, with the potential for greatly reducing the manufacturing cost.

77 NANOSCIENCE AND NANOTECHNOLOGY↗

A Control Scheme to Mitigate the Dead-Time Effects in a Wireless Power Transfer System

In practice, a dead-time is always provided between the complementary switching instances of the inverter phase-leg devices. At higher operating frequencies, the dead-time issues in wireless power transfer (WPT) systems become critical, especially as the power level increases. In certain operating conditions, the dead-time effect in wireless power transfer system affects the switching characteristics. Consequently, the switching losses in the power semiconductor devices increase and also impact the efficiency of the overall system. In this paper, a simple control scheme is proposed to eliminate the dead-time effect (or voltage polarity reversal) in the WPT inverter. The proposed control scheme monitors the inverter output voltage, and the switching frequency is auto-tuned to eliminate the undesired switching instances in the inverter voltage. The proposed control scheme is validated using the closed-loop simulations in PLECS, and the experimental results on a 5.6 kW WPT prototype are also presented. After eliminating the voltage-polarity-reversal at the inverter output, the inverter losses were reduced by ~40%, and the overall system losses were reduced by ~17%.

Kavimandan, Utkarsh↗

Radiation Hardness Assurance for Space Systems

The space radiation environment can lead to extremely harsh operating conditions for on-board electronic box and systems. The characteristics of the radiation environment are highly dependent on the type of mission (date, duration and orbit). Radiation accelerates the aging of the electronic parts and material and can lead to a degradation of electrical performance; it can also create transient phenomena on parts. Such damage at the part level can induce damage or functional failure at electronic box, subsystem, and system levels. A rigorous methodology is needed to ensure that the radiation environment does not compromise the functionality and performance of the electronics during the system life. This methodology is called hardness assurance. It consists of those activities undertaken to ensure that the electronic piece parts placed in the space system perform to their design specifications after exposure to the space environment. It deals with system requirements, environmental definitions, part selection, part testing, shielding and radiation tolerant design. All these elements should play together in order to produce a system tolerant to.the radiation environment. An overview of the different steps of a space system hardness assurance program is given in section 2. In order to define the mission radiation specifications and compare these requirements to radiation test data, a detailed knowledge of the space environment and the corresponding electronic device failure mechanisms is required. The presentation by J. Mazur deals with the Earth space radiation environment as well as the internal environment of a spacecraft. The presentation by J. Schwank deals with ionization effects, and the presentation by T. Weatherford deals with Single particle Event Phenomena (SEP) in semiconductor devices and microcircuits. These three presentations provide more detailed background to complement the sections 3 and 4. Part selection and categorization are discussed in section 5. Section 6 presents the organization of the hardness assurance within a project. Section 7 discusses emerging radiation hardness assurance issues.

Poivey, Christian↗

Effective Mass from Seebeck Coefficient

Abstract Engineering semiconductor devices requires an understanding of the effective mass of electrons and holes. Effective masses have historically been determined in metals at cryogenic temperatures estimated using measurements of the electronic specific heat. Instead, by combining measurements of the Seebeck and Hall effects, a density of states effective mass can be determined in doped semiconductors at room temperature and above. Here, a simple method to calculate the electron effective mass using the Seebeck coefficient and an estimate of the free electron or hole concentration, such as that determined from the Hall effect, is introduced here is the Seebeck effective mass, n H is the charge carrier concentration measured by the Hall effect ( n H = 1/ eR H , R H is Hall resistance) in 10 20 cm −3 , T is the absolute temperature in K, S is the Seebeck coefficient, and k B / e = 86.3 μV K −1 . This estimate of the effective mass can aid the understanding and engineering of the electronic structure as it is largely independent of scattering and the effects of microstructure (grain boundary resistance). It is particularly helpful in characterizing thermoelectric materials.

Snyder, Gerald Jeffrey↗

Image-enhanced bipolaron formation at organic semiconductor/electrode interfaces

We explore the image charge interaction for organic semiconductor bipolarons near a conducting interface and find that the cross term between one of the constituent charges and the image of its neighbor stabilizes the bipolaron by up to ~0.3 eV, dramatically increasing the concentration of this species near the interface. Using density functional theory calculations for the common hole transport molecule N,N'-bis(3-methylphenyl)- N,N'-diphenylbenzidine, we validate a simple point charge description of this effect and incorporate it within an interface energy level alignment model to predict the density of polarons and bipolarons near the interface. We find that the image effect greatly enhances bipolaron formation in the first few monolayers, leading to the expectation that bipolarons account for more than 1% of the total interface charge in many cases of practical interest. Furthermore, this result reinforces the notion that bipolarons are robust near the contacts of many organic semiconductor devices and thus helps to rationalize their involvement in the phenomenon of unipolar organic magnetoresistance.

36 MATERIALS SCIENCE↗

Multiscale Electrothermal Design of a Modular Multilevel Converter for Medium-Voltage Grid-Tied Applications

As a key feature of modular multilevel converters (MMCs), a large number of semiconductor devices are employed in the converter and distributed over a stack of submodules. Each submodule has a strict temperature limit that imposes constraints on the operating range of the converter. Different loading conditions/losses in the submodules lead to unavoidable temperature variations inside the MMC, which consequently affect the system-level performance and reliability. This paper is focused on the electrothermal analysis and design of a medium-voltage silicon carbide (SiC)-based MMC system, from submodule power semiconductors to the overall MMC system integration of multiple submodules, for grid-connected applications. Loss calculations are performed to estimate the cooling requirements and aid thermal design at different levels. The performance of a forced-air cooling approach is analyzed within a numerical modeling framework. Maximum temperature of the SiC power modules is predicted using numerical tools. Thermal design of the MMC cabinet with various arrangements of air inlet(s) and outlet(s) is investigated and compared from a cooling performance perspective. A fully resolved model of the arrangement that yields optimal results is developed to accurately predict the temperature profile of the essential components in the submodules.

computational fluid dynamics↗

Microwave Microscopy and Its Applications

Understanding the nanoscale electrodynamic properties of a material at microwave frequencies is of great interest for materials science, condensed matter physics, device engineering, and biology. With specialized probes, sensitive detection electronics, and improved scanning platforms, microwave microscopy has become an important tool for cutting-edge materials research in the past decade. In this article, we review the basic components and data interpretation of microwave imaging and its broad range of applications. In addition to the general-purpose mapping of permittivity and conductivity, microwave microscopy is now exploited to perform quantitative measurements on semiconductor devices, photosensitive materials, ferroelectric domains and domain walls, and acoustic-wave systems. Implementation of the technique in low-temperature and high-magnetic-field chambers has also led to major discoveries in quantum materials with strong correlation and topological order. We conclude the review with an outlook of the ultimate resolution, operation frequency, and future industrial and academic applications of near-field microwave microscopy.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Ionizing Radiation Sensing with Functionalized and Copper-Coated SWCNT/PMMA Thin Film Nanocomposites

This paper studies the ionizing radiation effects on functionalized single-walled carbon nanotube (SWCNT)/poly(methyl methacrylate) (PMMA) thin-film nanocomposites [SWNT/PMMA]. The functionalized thin-film devices are made of ferrocene-doped SWCNTs, SWCNTs functionalized with carboxylic acid (COOH), and SWCNTs coated/ modified with copper. The nanocomposite was synthesized by the solution blending method and the resulting nanocomposite was spin-cast on interdigitated electrodes (IDEs). A 160 kV X-ray source was used to irradiate the thin film and changes in the electrical resistance of the nanocomposites due to X-rays were measured using a semiconductor device analyzer. Carboxylic acid functionalized and copper-coated SWCNT/PMMA nanocomposite showed a reduced response to X-rays compared to unfunctionalized SWCNT/PMMA nanocomposite. Ferrocene-doped SWCNT showed a higher sensitivity to X-rays at lower dose rates. This is in contrast to a previous study that showed that similar nanocomposites using functionalized multi-walled CNTs (MWCNTs) had demonstrated an improved response to X-rays ionizing radiation compared to unfunctionalized MWCNTs for all dose rates. Electrical measurements were also performed using the Arduino Nano microcontroller. The result showed that a relatively economical, lightweight-designed prototype radiation sensor based on SWCNT/PMMA thin-film devices could be produced by interfacing the devices with a modest microcontroller. This work also shows that by encapsulating the SWCNT/PMMA thin-film device in a plastic container, the effect of ambient humidity can be reduced and the device can still be used to detect X-ray radiation. This study further shows that the sensitivity of SWCNT to X-rays was dependent on both the functionalization of the SWCNT and the dose rate.

36 MATERIALS SCIENCE↗

Multiscale Electrothermal Design of a Modular Multilevel Converter for Grid-Tied Applications

As a key feature of modular multilevel converters (MMCs), a large number of semiconductor devices are employed in the converter and distributed over a stack of submodules. Each submodule has a strict temperature limit that imposes constraints on the operating range of the converter. Different loading conditions/losses in the submodules lead to unavoidable temperature variations inside the MMC, which consequently affect the system-level performance and reliability. This paper is focused on the electrothermal analysis and design of a medium-voltage silicon carbide (SiC)-based MMC system, from submodule power semiconductors to the overall MMC system integration of multiple submodules. Loss calculations are performed to estimate the cooling requirements and aid thermal design at different levels. The performance of forced-air cooling approach is analyzed within a numerical modeling framework. Maximum temperature of the SiC power modules is predicted using numerical tools. Thermal design of the MMC cabinet with various arrangement of air inlet(s) and outlet(s) is investigated and compared from a cooling performance perspective.

CFD↗

Silicon Heat Pipe Array

Improved methods of heat dissipation are required for modern, high-power density electronic systems. As increased functionality is progressively compacted into decreasing volumes, this need will be exacerbated. High-performance chip power is predicted to increase monotonically and rapidly with time. Systems utilizing these chips are currently reliant upon decades of old cooling technology. Heat pipes offer a solution to this problem. Heat pipes are passive, self-contained, two-phase heat dissipation devices. Heat conducted into the device through a wick structure converts the working fluid into a vapor, which then releases the heat via condensation after being transported away from the heat source. Heat pipes have high thermal conductivities, are inexpensive, and have been utilized in previous space missions. However, the cylindrical geometry of commercial heat pipes is a poor fit to the planar geometries of microelectronic assemblies, the copper that commercial heat pipes are typically constructed of is a poor CTE (coefficient of thermal expansion) match to the semiconductor die utilized in these assemblies, and the functionality and reliability of heat pipes in general is strongly dependent on the orientation of the assembly with respect to the gravity vector. What is needed is a planar, semiconductor-based heat pipe array that can be used for cooling of generic MCM (multichip module) assemblies that can also function in all orientations. Such a structure would not only have applications in the cooling of space electronics, but would have commercial applications as well (e.g. cooling of microprocessors and high-power laser diodes). This technology is an improvement over existing heat pipe designs due to the finer porosity of the wick, which enhances capillary pumping pressure, resulting in greater effective thermal conductivity and performance in any orientation with respect to the gravity vector. In addition, it is constructed of silicon, and thus is better suited for the cooling of semiconductor devices.

Yee, Karl Y.↗

Rugged WBG Devices and Advanced Electric Machines for High Power Density Automotive Electric Vehicles

This work explored two very important approaches for supporting transportation electrification and reducing dependence on imports of critical materials. In the first task, several novel electric machine architectures with low rare earth metal content were compared analytically, then experimentally to verify their performance. Rare earth metals are imported largely from China and are widely used in many clean energy systems such as wind turbines and EV motors. Reducing our dependence on this critical material is an important objective for ensuring our independence and continued economic prosperity. In the second task, a GaN based inverter for EV inverters was developed to demonstrate the suitability of that wide bandgap semiconductor device in this important application.

42 ENGINEERING↗

New Approaches to Low-Cost Scalable Doping of Interdigitated back Contact Silicon Solar Cells (Final Report)

The goal of this project was to develop novel approaches to patterning of dopants in the rear fingers of interdigitated back contact (IBC) Si solar cells to reduce the cost of manufacturing this high-efficiency-potential cell architecture. The work throughout this project can be divided into four categories: (a) development of dopant patterning technique using laser scribed Si contacts masks that are mechanically aligned with ~10 μm resolution to the underlying Si substrate; (b) measuring dopant spreading profiles in the isolation region between n- and p-type dopant fingers during plasma-enhanced chemical vapor deposition (PECVD) of doped hydrogenated amorphous silicon (a-Si:H) via shadow masks, and dopant desorption and re-adsorption during high-temperature annealing; (c) understanding the role of dopant compensation on the shunt resistance in contaminated isolation regions through analysis of defect-enhanced compensation; and (d) simulation and fabrication of passivated two-sided grid and back-contact solar cells to demonstrate the use of direct dopant patterning in cell fabrication. For the passivated two-sided grid solar cells, masked deposition was used to demonstrate an improvement in the blue response of the cell by creating a shallow front emitter. During development of the masked PECVD patterning process, we measured 3-D dopant profiles using secondary ion mass spectrometry. After deposition, in the masked region, the phosphorus dopant tail was >100 µm at concentrations >10 19 cm -3 while the boron dopant tail was shorter. During high-temperature crystallization of doped a-Si:H films to polycrystalline Si (poly-Si), phosphorus atoms spread by desorbing from the poly-Si surface and re-adsorbing onto intrinsic poly-Si on adjacent wafers that were separated by several millimeters. These contamination mechanisms resulted in a decrease in resistivity from ~10 5 Ω·cm for intrinsic poly-Si to ~10 -1 Ω·cm for contaminated poly-Si. Mitigation strategies for each contamination mechanism were developed to maintain a resistivity of ~10 5 Ω·cm between doped fingers. During fabrication of the 209 cells created during this project, it was found that despite contamination of the IBC gap through the abovementioned mechanisms, high shunt resistances and FF ~75% were still reached. Investigation into this led to the discovery of defect-enhanced compensation which exists within highly defective poly-Si when net doping concentrations reach the value of defect density (~10 18 cm -3 for many poly-Si films). Simulations guided us in the fabrication of IBCs and the cells fabricated were able to meet the year-end goals for BP 2 and 3 of 15% and 17% IBC cell efficiency, as well as the BP 4 goal of a 1% absolute increase in efficiency for PERC-like devices. However, the most efficient cell created during this project of 18.6% fell short of the 21% final project target. While the champion device fell short in V oc and J sc , many devices fabricated were able to reach the necessary goals of ~40 mA/cm 2 , ~700 mV, and ~75% FF required for a 21% device. The results generated from this project were disseminated through 11 conference presentations and proceedings. Presentations included oral talks at 2019 IEEE PVSC, 2019 MRS Fall Meeting, 2020 PVSEC-30 and 2021 IEEE PVSC, as well as poster presentations at 2020 IEEE PVSC and 2021 SiPV. The project resulted in 2 peer reviewed publications – one published in IEEE Journal of Photovoltaics and one in ACS Applied Energy Materials. The information gained in this project will aid in development of improved processes for fabrication of high-efficiency solar cells and other areas of the semiconductor device industry as well. The IBC cells will also pave the way for higher efficiency tandem devices. Through further manufacturing of high-efficiency solar cells, more of the world’s energy demands can be met through renewable sources, helping to stave off the worst effects that may come about from global climate change.

14 SOLAR ENERGY↗

On-Chip Power-Combining for High-Power Schottky Diode Based Frequency Multipliers

A novel MMIC on-chip power-combined frequency multiplier device and a method of fabricating the same, comprising two or more multiplying structures integrated on a single chip, wherein each of the integrated multiplying structures are electrically identical and each of the multiplying structures include one input antenna (E-probe) for receiving an input signal in the millimeter-wave, submillimeter-wave or terahertz frequency range inputted on the chip, a stripline based input matching network electrically connecting the input antennas to two or more Schottky diodes in a balanced configuration, two or more Schottky diodes that are used as nonlinear semiconductor devices to generate harmonics out of the input signal and produce the multiplied output signal, stripline based output matching networks for transmitting the output signal from the Schottky diodes to an output antenna, and an output antenna (E-probe) for transmitting the output signal off the chip into the output waveguide transmission line.

Siles Perez, Jose Vicente↗

Graphene-assisted spontaneous relaxation towards dislocation-free heteroepitaxy

While conventional homoepitaxy forms high-quality epitaxial layers, the limited set of material systems for commercially available wafers restricts the range of materials that can be grown homoepitaxially. At the same time, conventional heteroepitaxy of lattice-mismatched systems produces dislocations above a critical strain energy to release the accumulated strain energy as the film thickness increases. The formation of dislocations, which severely degrade electronic/photonic device performances, is fundamentally unavoidable in highly lattice-mismatched epitaxy. Herein, we introduce a unique mechanism of relaxing misfit strain in heteroepitaxial films that can enable effective lattice engineering. We have observed that heteroepitaxy on graphene-coated substrates allows for spontaneous relaxation of misfit strain owing to the slippery graphene surface while achieving single-crystalline films by reading the atomic potential from the substrate. This spontaneous relaxation technique could transform the monolithic integration of largely lattice-mismatched systems by covering a wide range of the misfit spectrum to enhance and broaden the functionality of semiconductor devices for advanced electronics and photonics.

77 NANOSCIENCE AND NANOTECHNOLOGY↗

Alternative Packaging for Back-Illuminated Imagers

An alternative scheme has been conceived for packaging of silicon-based back-illuminated, back-side-thinned complementary metal oxide/semiconductor (CMOS) and charge-coupled-device image-detector integrated circuits, including an associated fabrication process. This scheme and process are complementary to those described in "Making a Back-Illuminated Imager With Back-Side Connections" (NPO-42839), NASA Tech Briefs, Vol. 32, No. 7 (July 2008), page 38. To avoid misunderstanding, it should be noted that in the terminology of imaging integrated circuits, "front side" or "back side" does not necessarily refer to the side that, during operation, faces toward or away from a source of light or other object to be imaged. Instead, "front side" signifies that side of a semiconductor substrate upon which the pixel pattern and the associated semiconductor devices and metal conductor lines are initially formed during fabrication, and "back side" signifies the opposite side. If the imager is of the type called "back-illuminated," then the back side is the one that faces an object to be imaged. Initially, a back-illuminated, back-side-thinned image-detector is fabricated with its back side bonded to a silicon handle wafer. At a subsequent stage of fabrication, the front side is bonded to a glass wafer (for mechanical support) and the silicon handle wafer is etched away to expose the back side. The frontside integrated circuitry includes metal input/output contact pads, which are rendered inaccessible by the bonding of the front side to the glass wafer. Hence, one of the main problems is to make the input/output contact pads accessible from the back side, which is ultimately to be the side accessible to the external world. The present combination of an alternative packaging scheme and associated fabrication process constitute a solution of the problem.

Pain, Bedabrata↗

Applications of Silicon Carbide for High Temperature Electronics and Sensors

Silicon carbide (SiC) is a wide bandgap material that shows great promise in high-power and high temperature electronics applications because of its high thermal conductivity and high breakdown electrical field. The excellent physical and electronic properties of SiC allows the fabrication of devices that can operate at higher temperatures and power levels than devices produced from either silicon or GaAs. Although modern electronics depends primarily upon silicon based devices, this material is not capable of handling may special requirements. Devices which operate at high speeds, at high power levels and are to be used in extreme environments at high temperatures and high radiation levels need other materials with wider bandgaps than that of silicon. Many space and terrestrial applications also have a requirement for wide bandgap materials. SiC also has great potential for high power and frequency operation due to a high saturated drift velocity. The wide bandgap allows for unique optoelectronic applications, that include blue light emitting diodes and ultraviolet photodetectors. New areas involving gas sensing and telecommunications offer significant promise. Overall, the properties of SiC make it one of the best prospects for extending the capabilities and operational regimes of the current semiconductor device technology.

Silicon Carbide↗

Suppression of Random Dopant-Induced Threshold Voltage Fluctuations in Sub-0.1-(micron)meter MOSFET's with Epitaxial and (delta)-Doped Channels

A detailed three-dimensional (3-D) statistical 'atomistic' simulation study of fluctuation-resistant sub-0.1-(micron)meter MOSFET architectures with epitaxial channels and delta doping is presented. The need for enhancing the fluctuation resistance of the sub-0.1-(micron)meter generation transistors is highlighted by presenting summarized results from atomistic simulations of a wide range of conventional devices with uniformly doped channel. According to our atomistic results, the doping concentration dependence of the random dopant-induced threshold voltage fluctuations in conventional devices is stronger than the analytically predicted fourth-root dependence. As a result of this, the scaling of such devices will be restricted by the "intrinsic" random dopant-induced fluctuations earlier than anticipated. Our atomistic simulations confirm that the introduction of a thin epitaxial layer in the MOSFET's channel can efficiently suppress the random dopant-induced threshold voltage fluctuations in sub-0.1-(micron)meter devices. For the first time, we observe an "anomalous" reduction in the threshold voltage fluctuations with an increase in the doping concentration behind the epitaxial channel, which we attribute to screening effects. Also, for the first time we study the effect of a delta-doping, positioned behind the epitaxial layer, on the intrinsic threshold voltage fluctuations. Above a certain thickness of epitaxial layer, we observe a pronounced anomalous decrease in the threshold voltage fluctuation with the increase of the delta doping. This phenomenon, which is also associated with screening, enhances the importance of the delta doping in the design of properly scaled fluctuation-resistant sub-0.1-(micron)meter MOSFET's. Index Terms-Doping, fluctuations, MOSFET, semiconductor device simulation, silicon devices, threshold.

Asenov, Asen↗

Artificial Intelligence for Power Electronics in Electric Vehicles: Challenges and Opportunities

We report progress in the field of power electronics within electric vehicles has generally been driven by conventional engineering design principles and experiential learning. Power electronics is inherently a multidomain field where semiconductor physics and electrical, thermal, and mechanical design knowledge converge to achieve a practical realization of desired targets in the form of conversion efficiency, power density, and reliability. Due to the promising nature of artificial intelligence in delivering rapid results, engineers are starting to explore the ways in which it can contribute to making power electronics more compact and reliable. Here, we conduct a brief review of the foray of artificial intelligence in three distinct subtechnologies within a power electronics system in the context of electric vehicles: semiconductor devices, power electronics module design and prognostics, and thermal management design. The intent is not to report an exhaustive literature review, but to identify the state of the art and opportunities for artificial intelligence to play a meaningful role in power electronics design from a mechanical and thermal standpoint, as well as to discuss a few promising future research directions.

33 ADVANCED PROPULSION SYSTEMS↗