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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 343 records · Page 19
All sourcesNASA NTRSDOE OSTI
NASA NTRS1976

Development of a 30-cm ion thruster thermal-vacuum power processor

The 30-cm Hg electron-bombardment ion thruster presently under development has reached engineering model status and is generally accepted as the prime propulsion thruster module to be used on the earliest solar electric propulsion missions. This paper presents the results of a related program to develop a transistorized 3-kW Thermal-Vacuum Breadboard (TVBB) Power Processor for this thruster. Emphasized in the paper are the implemented electrical and mechanical designs as well as the resultant system performance achieved over a range of test conditions. In addition, design modifications affording improved performance are identified and discussed.

Herron, B. G.↗
NASA NTRS1988

Multiprocessor speed-up, Amdahl's Law, and the Activity Set Model of parallel program behavior

An important issue in the effective use of parallel processing is the estimation of the speed-up one may expect as a function of the number of processors used. Amdahl's Law has traditionally provided a guideline to this issue, although it appears excessively pessimistic in the light of recent experimental results. In this note, Amdahl's Law is amended by giving a greater importance to the capacity of a program to make effective use of parallel processing, but also recognizing the fact that imbalance of the workload of each processor is bound to occur. An activity set model of parallel program behavior is then introduced along with the corresponding parallelism index of a program, leading to upper and lower bounds to the speed-up.

Gelenbe, Erol↗
NASA NTRS1991

Compile-time estimation of communication costs in multicomputers

An important problem facing numerous research projects on parallelizing compilers for distributed memory machines is that of automatically determining a suitable data partitioning scheme for a program. Any strategy for automatic data partitioning needs a mechanism for estimating the performance of a program under a given partitioning scheme, the most crucial part of which involves determining the communication costs incurred by the program. A methodology is described for estimating the communication costs at compile-time as functions of the numbers of processors over which various arrays are distributed. A strategy is described along with its theoretical basis, for making program transformations that expose opportunities for combining of messages, leading to considerable savings in the communication costs. For certain loops with regular dependences, the compiler can detect the possibility of pipelining, and thus estimate communication costs more accurately than it could otherwise. These results are of great significance to any parallelization system supporting numeric applications on multicomputers. In particular, they lay down a framework for effective synthesis of communication on multicomputers from sequential program references.

Gupta, Manish↗
NASA NTRS1987

The PISCES 2 parallel programming environment

PISCES 2 is a programming environment for scientific and engineering computations on MIMD parallel computers. It is currently implemented on a flexible FLEX/32 at NASA Langley, a 20 processor machine with both shared and local memories. The environment provides an extended Fortran for applications programming, a configuration environment for setting up a run on the parallel machine, and a run-time environment for monitoring and controlling program execution. This paper describes the overall design of the system and its implementation on the FLEX/32. Emphasis is placed on several novel aspects of the design: the use of a carefully defined virtual machine, programmer control of the mapping of virtual machine to actual hardware, forces for medium-granularity parallelism, and windows for parallel distribution of data. Some preliminary measurements of storage use are included.

Pratt, Terrence W.↗
NASA NTRS2007

Control Code for Bearingless Switched-Reluctance Motor

A computer program has been devised for controlling a machine that is an integral combination of magnetic bearings and a switched-reluctance motor. The motor contains an eight-pole stator and a hybrid rotor, which has both (1) a circular lamination stack for levitation and (2) a six-pole lamination stack for rotation. The program computes drive and levitation currents for the stator windings with real-time feedback control. During normal operation, two of the four pairs of opposing stator poles (each pair at right angles to the other pair) levitate the rotor. The remaining two pairs of stator poles exert torque on the six-pole rotor lamination stack to produce rotation. This version is executable in a control-loop time of 40 s on a Pentium (or equivalent) processor that operates at a clock speed of 400 MHz. The program can be expanded, by addition of logic blocks, to enable control of position along additional axes. The code enables adjustment of operational parameters (e.g., motor speed and stiffness, and damping parameters of magnetic bearings) through computer keyboard key presses.

Morrison, Carlos R.↗
NASA NTRS1990

A personal computer-based, multitasking data acquisition system

A multitasking, data acquisition system was written to simultaneously collect meteorological radar and telemetry data from two sources. This system is based on the personal computer architecture. Data is collected via two asynchronous serial ports and is deposited to disk. The system is written in both the C programming language and assembler. It consists of three parts: a multitasking kernel for data collection, a shell with pull down windows as user interface, and a graphics processor for editing data and creating coded messages. An explanation of both system principles and program structure is presented.

Bailey, Steven A.↗
NASA NTRS1987

Command/response protocols and concurrent software

A version of the program to control the parallel jaw gripper is documented. The parallel jaw end-effector hardware and the Intel 8031 processor that is used to control the end-effector are briefly described. A general overview of the controller program is given and a complete description of the program's structure and design are contained. There are three appendices: a memory map of the on-chip RAM, a cross-reference listing of the self-scheduling routines, and a summary of the top-level and monitor commands.

Bynum, W. L.↗
NASA NTRS1995

The Performance of the NAS HSPs in 1st Half of 1994

During the first six months of 1994, the NAS (National Airspace System) 16-CPU Y-MP C90 Von Neumann (VN) delivered an average throughput of 4.045 GFLOPS while the ACSF (Aeronautics Consolidated Supercomputer Facility) 8-CPU Y-MP C90 Eagle averaged 1.658 GFLOPS. The VN rate represents a machine efficiency of 26.3% whereas the Eagle rate corresponds to a machine efficiency of 21.6%. VN displayed a greater efficiency than Eagle primarily because the stronger workload demand for its CPU cycles allowed it to devote more time to user programs and less time to idle. An additional factor increasing VN efficiency was the ability of the UNICOS 8.0 Operating System to deliver a larger fraction of CPU time to user programs. Although measurements indicate increasing vector length for both workloads, insufficient vector lengths continue to hinder HSP (High Speed Processor) performance. To improve HSP performance, NAS should continue to encourage the HSP users to modify their codes to increase program vector length.

Bergeron, Robert J.↗
NASA NTRS1992

Programming in Vienna Fortran

Exploiting the full performance potential of distributed memory machines requires a careful distribution of data across the processors. Vienna Fortran is a language extension of Fortran which provides the user with a wide range of facilities for such mapping of data structures. In contrast to current programming practice, programs in Vienna Fortran are written using global data references. Thus, the user has the advantages of a shared memory programming paradigm while explicitly controlling the data distribution. In this paper, we present the language features of Vienna Fortran for FORTRAN 77, together with examples illustrating the use of these features.

Chapman, Barbara↗
NASA NTRS1989

Parallel processors and nonlinear structural dynamics algorithms and software

The adaptation of a finite element program with explicit time integration to a massively parallel SIMD (single instruction multiple data) computer, the CONNECTION Machine is described. The adaptation required the development of a new algorithm, called the exchange algorithm, in which all nodal variables are allocated to the element with an exchange of nodal forces at each time step. The architectural and C* programming language features of the CONNECTION Machine are also summarized. Various alternate data structures and associated algorithms for nonlinear finite element analysis are discussed and compared. Results are presented which demonstrate that the CONNECTION Machine is capable of outperforming the CRAY XMP/14.

Belytschko, Ted↗
NASA NTRS1996

Aerodynamic Optimization of the High Speed Civil Transport

The aerodynamic optimization program used for wing and fuselage optimization of the High Speed Civil Transport was modified for utilization of multiple processors on parallel processor computers. The modified version uses multiple processors to simultaneously conduct three-dimensional flow solutions of different wing and fuselage geometries for calculations of the gradient functions and for directional searches to minimize an objective function. Demonstrations have shown the parallel program to be useful for coarse grid optimization, however memory problems for processors on the IBM SP2 were encountered when finer grid sizes were used.

Brawley, Stephen C.↗
NASA NTRS2006

User-Defined Data Distributions in High-Level Programming Languages

One of the characteristic features of today s high performance computing systems is a physically distributed memory. Efficient management of locality is essential for meeting key performance requirements for these architectures. The standard technique for dealing with this issue has involved the extension of traditional sequential programming languages with explicit message passing, in the context of a processor-centric view of parallel computation. This has resulted in complex and error-prone assembly-style codes in which algorithms and communication are inextricably interwoven. This paper presents a high-level approach to the design and implementation of data distributions. Our work is motivated by the need to improve the current parallel programming methodology by introducing a paradigm supporting the development of efficient and reusable parallel code. This approach is currently being implemented in the context of a new programming language called Chapel, which is designed in the HPCS project Cascade.

physically distributed memory↗
NASA NTRS1980

The RSZ BASIC programming language manual

The RSZ BASIC interactive language is described. The RSZ BASIC interpreter is resident in the Telemetry Data Processor, a system dedicated to the processing and displaying of PCM telemetry data. A series of working examples teaches the fundamentals of RSZ BASIC and shows how to construct, edit, and manage storage of programs.

Stattel, R. J.↗
NASA NTRS1982

A programmable power processor for high power space applications

A Programmable Power Processor (P3) has been developed for application in future large space power systems. The P3 is capable of operation over a wide range of input voltage (26 to 375 Vdc) and output voltage (24 to 180 Vdc). The peak output power capability is 18 kW (180 V at 100 A). The output characteristics of the P3 can be programmed to any voltage and/or current level within the limits of the processor and may be controlled as a function of internal or external parameters. Seven breadboard P3s and one 'flight-type' engineering model P3 have been built and tested both individually and in electrical power systems. The programmable feature allows the P3 to be used in a variety of applications by changing the output characteristics. Test results, including efficiency at various input/output combinations, transient response, and output impedance, are presented.

Lanier, J. R., Jr.↗
NASA NTRS1982

Beyond the supercomputer

A NASA-directed development of massively parallel processor (MPP) computers is outlined, noting intended applications for data processing for near term earth resource and environment mapping, radar, and television transmissions. The MPP is designed to perform 100 billion operations/sec to obtain satisfactory image processing, while separate processing units correct distortions, register images, calculate correlation functions, and classify multispectral characteristics. Arrays of 1s and 0s will be manipulated in analog-to-digital conversions generating separate planes corresponding to powers of binaries. Data wires are replaced by fiber-optic tubes or thousands of wires, and single logic gates are replaced by thousands of logic gates and every memory element by thousands of memory elements. Features of the interconnections and the images control processor units are detailed, along with implementation of sliders for program flexibility.

Schaefer, D. H.↗
NASA NTRS1985

Algorithms and programming tools for image processing on the MPP, introduction

The programming tools and parallel algorithms created for the Massively Parallel Processor (MPP) located at the NASA Goddard Space Center are discussed. A user-friendly environment for high level language parallel algorithm development was developed. The issues involved in implementing certain algorithms on the MPP were researched. The expected results were compared with the actual results.

Source record↗
NASA NTRS1989

A message passing kernel for the hypercluster parallel processing test bed

A Message-Passing Kernel (MPK) for the Hypercluster parallel-processing test bed is described. The Hypercluster is being developed at the NASA Lewis Research Center to support investigations of parallel algorithms and architectures for computational fluid and structural mechanics applications. The Hypercluster resembles the hypercube architecture except that each node consists of multiple processors communicating through shared memory. The MPK efficiently routes information through the Hypercluster, using a message-passing protocol when necessary and faster shared-memory communication whenever possible. The MPK also interfaces all of the processors with the Hypercluster operating system (HYCLOPS), which runs on a Front-End Processor (FEP). This approach distributes many of the I/O tasks to the Hypercluster processors and eliminates the need for a separate I/O support program on the FEP.

Blech, Richard A.↗