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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 343 records · Page 19
All sourcesNASA NTRSDOE OSTI
DOE OSTI2022

Low-power anisotropic molecular electronic memristors

A molecular electronic memristor, programmable resistive memory device, promises to revolutionize next-generation flexible data storage units, offering fast, dense and ultralow power solutions. Here we report anisotropic resistive switching in molecular κ-(BEDT-TTF) 2 Cu[N(CN) 2 ]Cl memristors, consisting of alternatively segregated bis(ethylenedithio)tetrathiafulvalene (BEDT-TTF) and Cu[N(CN) 2 ]Cl layers. Electron resistance switching behavior controlled by charge tunneling in molecular memristors show a low set voltage of 0.5 V (10 V/cm) with the ON/OFF ratio of 2.3×10 3 along a-axis and a high-level endurance of 1.25×10 4 cycles along all axes. Finally, the findings of such molecular electronic crystals promise for low-power data storage memristors.

36 MATERIALS SCIENCE↗
DOE OSTI2014

Investigation of thermal resistance and power consumption in Ga-doped indium oxide (In{sub 2}O{sub 3}) nanowire phase change random access memory

The resistance stability and thermal resistance of phase change memory devices using ∼40 nm diameter Ga-doped In{sub 2}O{sub 3} nanowires (Ga:In{sub 2}O{sub 3} NW) with different Ga-doping concentrations have been investigated. The estimated resistance stability (R(t)/R{sub 0} ratio) improves with higher Ga concentration and is dependent on annealing temperature. The extracted thermal resistance (R{sub th}) increases with higher Ga-concentration and thus the power consumption can be reduced by ∼90% for the 11.5% Ga:In{sub 2}O{sub 3} NW, compared to the 2.1% Ga:In{sub 2}O{sub 3} NW. The excellent characteristics of Ga-doped In{sub 2}O{sub 3} nanowire devices offer an avenue to develop low power and reliable phase change random access memory applications.

77 NANOSCIENCE AND NANOTECHNOLOGY↗
DOE OSTI2016

A fast, memory efficient and robust sparse preconditioner based on a multifrontal approach with applications to finite‐element matrices

Summary In this article, we introduce a fast, memory efficient and robust sparse preconditioner that is based on a direct factorization scheme for sparse matrices arising from the finite‐element discretization of elliptic partial differential equations. We use a fast (but approximate) multifrontal approach as a preconditioner and use an iterative scheme to achieve a desired accuracy. This approach combines the advantages of direct and iterative schemes to arrive at a fast, robust, and accurate preconditioner. We will show that this approach is faster (∼2×) and more memory efficient (∼2–3×) than a conventional direct multifrontal approach. Furthermore, we will demonstrate that this preconditioner is both faster and more effective than other preconditioners such as the incomplete LU preconditioner. Specific speedups depend on the matrix size and improve as the size of the matrix increases. The preconditioner can be applied to both structured and unstructured meshes in a similar manner. We build on our previous work and utilize the fact that dense frontal and update matrices, in the multifrontal algorithm, can be represented as hierarchically off‐diagonal low‐rank matrices. Using this idea, we replace all large dense matrix operations in the multifrontal elimination process with O ( N ) hierarchically off‐diagonal low‐rank operations to arrive at a faster and more memory efficient factorization scheme. We then use this direct factorization method at low accuracies as a preconditioner and apply it to various real‐life engineering test cases. Copyright © 2016 John Wiley & Sons, Ltd.

Aminfar, AmirHossein↗
DOE OSTI2019

Volatile Memory Extraction- Based Approach for Level 0-1 CPS Forensics

Most security analyzers operate on system state that is far removed from end-point components in cyber-physical systems (CPS) identified as level 0-1 in the Purdue Architecture Reference Architecture (PERA) [1]. For example, many operate on system logs and other data dumps to disks. Tremendous value that can be gained in cyber security forensics if low level details such as dynamic changes to volatile memory can be extracted and provided to more sophisticated analysis tools. However, obtaining detailed and dynamic system state at the level of volatile memory is extremely challenging [2]. Here, we attempt to apply IT memory forensic mechanisms to CPS end-point devices and statistically evaluate them. Our focus is to extract volatile and dynamically changing internal information form CPS 0-1 level devices, and design preliminary schemes to exploit that extracted information. This new capability of generating a sequence of volatile memory snapshots for offline, detailed and sophisticated analysis opens a new class of cyber security schemes for CPS forensic analysis. As a case study for our ongoing research, we apply the proposed methodology to Modicon PLC using Modbus protocol. We extract the memory layout and subject the device to read operations at the most critical regions of memory. Similarly, write operations are initiated to carefully determine memory locations (for example, bytes that hold the firmware version number). This capability of generating a sequence of volatile memory snapshots for offline, detailed and sophisticated analysis opens a new class of cyber security schemes for CPS forensic analysis. Also, the ability to dynamically make controlled modifications to specific memory locations opens the potential for new mechanisms such as taint analysis and watermarking.

Asmar Awad, Rima↗
DOE OSTI2014

EqualChance: Addressing Intra-set Write Variation to Increase Lifetime of Non-volatile Caches

To address the limitations of SRAM such as high-leakage and low-density, researchers have explored use of non-volatile memory (NVM) devices, such as ReRAM (resistive RAM) and STT-RAM (spin transfer torque RAM) for designing on-chip caches. A crucial limitation of NVMs, however, is that their write endurance is low and the large intra-set write variation introduced by existing cache management policies may further exacerbate this problem, thereby reducing the cache lifetime significantly. We present EqualChance, a technique to increase cache lifetime by reducing intra-set write variation. EqualChance works by periodically changing the physical cache-block location of a write-intensive data item within a set to achieve wear-leveling. Simulations using workloads from SPEC CPU2006 suite and HPC (high-performance computing) field show that EqualChance improves the cache lifetime by 4.29X. Also, its implementation overhead is small, and it incurs very small performance and energy loss.

cache lifetime↗
NASA NTRS1975

Processor architectures utilizing magnetic bubble and semi-conductor memories

To aid work being conducted on the feasibility of a low cost Omega navigational receiver, a control panel was designed and constructed according to supplied specifications. Since the proposed Omega receiver is designed around a microprocessor, software engineering necessary for control panel operation is included in the design. The control panel is to be used as an operational model for use in the design of a prototype receiver. A detailed description of the hardware design is presented along with a description of the software needed to operate the panel. A complete description of the operating procedures for the panel are also included.

Parrish, E. A., Jr.↗
DOE OSTI2018

Parallel Nonnegative CP Decomposition of Dense Tensors

The CP tensor decomposition is a low-rank approximation of a tensor. We present a distributed-memory parallel algorithm and implementation of an alternating optimization method for computing a CP decomposition of dense tensors that can enforce nonnegativity of the computed low-rank factors. The principal task is to parallelize the Matricized-Tensor Times Khatri-Rao Product (MTTKRP) bottleneck subcomputation. The algorithm is computation efficient, using dimension trees to avoid redundant computation across MTTKRPs within the alternating method. Our approach is also communication efficient, using a data distribution and parallel algorithm across a multidimensional processor grid that can be tuned to minimize communication. We benchmark our software on synthetic as well as hyperspectral image and neuroscience dynamic functional connectivity data, demonstrating that our algorithm scales well to 100s of nodes (up to 4096 cores) and is faster and more general than the currently available parallel software.

Ballard, Grey↗
DOE OSTI2014

Macrospin modeling of sub-ns pulse switching of perpendicularly magnetized free layer via spin-orbit torques for cryogenic memory applications

We model, using the macrospin approximation, the magnetic reversal of a perpendicularly magnetized nanostructured free layer formed on a normal, heavy-metal nanostrip, subjected to spin-orbit torques (SOTs) generated by short (≤0.5 ns) current pulses applied to the nanostrip, to examine the potential for SOT-based fast, efficient cryogenic memory. Due to thermal fluctuations, if solely an anti-damping torque is applied, then, for a device with sufficiently low anisotropy (H{sub anis}{sup 0} ∼ 1 kOe) suitable for application in cryogenic memory, a high magnetic damping parameter (α∼0.1−0.2) is required for reliable switching over a significant variation of pulse current. The additional presence of a substantial field-like torque improves switching reliability even for low damping (α≤0.03).

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
DOE OSTI2022

Optically connected memory for disaggregated data centers

Recent advances in integrated photonics enable the implementation of reconfigurable, high-bandwidth, and low energy-per-bit interconnects in next-generation data centers. We propose and evaluate an Optically Connected Memory (OCM) architecture that disaggregates the main memory from the computation nodes in data centers. OCM is based on micro-ring resonators (MRRs), and it does not require any modification to the DRAM memory modules. We calculate energy consumption from real photonic devices and integrate them into a system simulator to evaluate performance. Here, our results show that (1) OCM is capable of interconnecting four DDR4 memory channels to a computing node using two fibers with 1.02 pJ energy-per-bit consumption and (2) OCM performs up to 5.5× faster than a disaggregated memory with 40G PCIe NIC connectors to computing nodes.

97 MATHEMATICS AND COMPUTING↗
NASA NTRS1999

Thin Film Li Ion Microbatteries for NASA Applications

Rechargeable thin film microbatteries have recently become the topic of widespread research for use in low power applications such as battery-backed CMOS memory, miniaturized implantable medical devices and smart cards. In particular, the Center for Integrated Space Microsystems (CISM) at NASA's Jet Propulsion Laboratory has interest in applying this technology for secondary power systems in miniaturized satellites, microsensors, microactuators and other remote MEMS applications. The general requirements of the microbatteries for these applications are high specific energy, wide range of temperature stability. low self-discharge rate, and flexibility of cell design. The thin film Li ion materials system using LiCoO2(LiPO(x)N(1-x))SnO is expected to fulfill these requirements.

West, W. C.↗
NASA NTRS1978

A wide bandwidth CCD buffer memory system

A prototype system was implemented to demonstrate that CCD's can be applied advantageously to the problem of low power digital storage and particularly to the problem of interfacing widely varying data rates. CCD shift register memories (8K bit) were used to construct a feasibility model 128 K-bit buffer memory system. Serial data that can have rates between 150 kHz and 4.0 MHz can be stored in 4K-bit, randomly-accessible memory blocks. Peak power dissipation during a data transfer is less than 7 W, while idle power is approximately 5.4 W. The system features automatic data input synchronization with the recirculating CCD memory block start address. System expansion to accommodate parallel inputs or a greater number of memory blocks can be performed in a modular fashion. Since the control logic does not increase proportionally to increase in memory capacity, the power requirements per bit of storage can be reduced significantly in a larger system.

Siemens, K.↗
NASA NTRS1997

Performance Analysis of the NAS Y-MP Workload

This paper describes the performance characteristics of the computational workloads on the NAS Cray Y-MP machines, a Y-MP 832 and later a Y-MP 8128. Hardware measurements indicated that the Y-MP workload performance matured over time, ultimately sustaining an average throughput of 0.8 GFLOPS and a vector operation fraction of 87%. The measurements also revealed an operation rate exceeding 1 per clock period, a well-balanced architecture featuring a strong utilization of vector functional units, and an efficient memory organization. Introduction of the larger memory 8128 increased throughput by allowing a more efficient utilization of CPUs. Throughput also depended on the metering of the batch queues; low-idle Saturday workloads required a buffer of small jobs to prevent memory starvation of the CPU. UNICOS required about 7% of total CPU time to service the 832 workloads; this overhead decreased to 5% for the 8128 workloads. While most of the system time went to service I/O requests, efficient scheduling prevented excessive idle due to I/O wait. System measurements disclosed no obvious bottlenecks in the response of the machine and UNICOS to the workloads. In most cases, Cray-provided software tools were- quite sufficient for measuring the performance of both the machine and operating, system.

Bergeron, Robert J.↗
DOE OSTI2016

Sub-10 nm low current resistive switching behavior in hafnium oxide stack

In this letter, a tip-induced cell relying on the conductive atomic force microscope is proposed. It is verified as a referable replica of an integrated resistive random access memory (RRAM) device. On the basis of this cell, the functionality of sub-10 nm resistive switching is confirmed in hafnium oxide stack. Moreover, the low current switching behavior in the sub-10 nm dimension is found to be more pronounced than that of a 50 × 50 nm{sup 2} device. It shows better ON/OFF ratio and low leakage current. The enhanced memory performance is ascribed to a change in the shape of the conductive filament as the device dimensions are reduced to sub-10 nm. Therefore, device downscaling provides a promising approach for the resistance optimization that benefits the RRAM array design.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
NASA NTRS2021

Meta-aerogels: Auxetic Shape-memory Polyurethane Aerogels

Shape-memory poly(isocyanurate-urethane) (PIR-PUR) aerogels are low-density monolithic nanoporous solids that remember and return to their permanent shape through a heating actuation step. Herein, through structural design at the macro scale, the shape-memory response is augmented with an auxetic effect manifested by a negative Poisson’s ratio of approximately -0.8 at 15% compressive strain. Thus, auxetic shape-memory PIR-PUR monoliths experience volume contraction upon compression at a temperature above the glass transition temperature of the base polymer (Tg ~ 30 °C), and they can be stowed indefinitely in that temporary shape by cooling below Tg. By heating back above Tg, the compressed/shrunk form expands back to their original shape/size. This technology is relevant to a broad range of industries spanning the commercial, aeronautical, and aerospace sectors. The materials are referred to as meta-aerogels and their potential applications include minimally invasive medical devices, soft robotics, and in situations where volume is at a premium, as for example for storage of deployable space structures and planetary habitats during transport to the point of service.

Sadeq Malakooti↗
DOE OSTI2020

Effect of Ion Irradiation on Amorphous and Crystalline Ge–Se and Their Application as Phase Change Temperature Sensor

Research on phase change materials is predominantly focused on their application as memory devices or for temperature control which requires low phase change temperature. The Ge–Se binary chalcogenide glass system with its wide glass-forming region is a potential candidate for high-temperature and high-radiation phase change applications. In this study, the concept of employing Ge x Se 100– x glasses to monitor high temperature (450–528 °C) using the phase change effect, is reported. Materials selection, device structure, and performance of prototype sensors are analyzed. In addition, the effect of heavy ion irradiation by Xe ions with energies of 200, 600, and 1000 keV (fluence ≈10 14 cm –2 ) on the Ge x Se 100– x ( x = 30, 33, 40) thin films and phase change devices is studied. The irradiation effect on the amorphous and crystalline structure of the thin films is evaluated by Raman spectroscopy and X-ray diffraction (XRD). Although the changes in the structural units of amorphous films are negligible, in crystalline films orthorhombic-GeSe 2 crystals are found to be most affected by irradiation and a new phase, orthorhombic GeSe is found in the thin films after irradiation. The performance of a sensor with an active film of Ge 40 Se 60 is also shown as an example.

11 NUCLEAR FUEL CYCLE AND FUEL MATERIALS↗
DOE OSTI2023

Single-shot switching in Tb/Co-multilayer based nanoscale magnetic tunnel junctions

Magnetic tunnel junctions (MTJs) are elementary units of magnetic memory devices. For high-speed and low-power data storage and processing applications, fast reversal of the magnetization by an ultrashort laser pulse is extremely important. Here we demonstrate single-shot switching of Tb/Co-multilayer based nanoscale MTJs by combining the optical writing and the electrical read-out methods. A 90-fs-long laser pulse switches the magnetization of the storage layer (SL). The change in the tunneling magnetoresistance (TMR) between the SL and a reference layer (RL) is probed electrically across the oxide barrier. Single-shot switching is demonstrated by varying the cell diameter from 300 nm to 20 nm. The anisotropy, magnetostatic coupling, and switching probability exhibit cell-size dependence. By suitable association of laser fluence and magnetic field, successive commutation between high-resistance and low-resistance states is achieved. The nature of the magnetization reversal of both SL and RL in a continuous film is probed with a depth-resolved magneto-optical Kerr effect (MOKE) magnetometry. The ultrafast dynamics in the continuous full-MTJ stack is investigated with the time-resolved pump–probe technique. Our experimental findings provide strong support for the growing interest in ultrafast spintronic devices.

36 MATERIALS SCIENCE↗