Engineering Papers⌕ Search

SEARCH · Engineering Papers

Results for “Transistors”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 343 records · Page 19
All sourcesNASA NTRSDOE OSTI
DOE OSTI2015

Transport of charge carriers through the thin base of a heterobipolar transistor under the impact of radiation

The transport of electrons in heterobipolar transistors with radiation defects is studied under conditions where the characteristic sizes of defect clusters and the distances between them can be comparable or can even exceed the sizes of the device base. It is shown that, under some levels of irradiation, neutron radiation can bring about a decrease in the time of flight of hot electrons through the base, which retards the degradation of the transistor parameters.

36 MATERIALS SCIENCE↗
DOE OSTI2016

Radiation-stimulated processes in transistor temperature sensors

The features of the radiation-stimulated changes in the I–V and C–V characteristics of the emitter–base junction in KT3117 transistors are considered. It is shown that an increase in the current through the emitter junction is observed at the initial stage of irradiation (at doses of D < 4000 Gy for the “passive” irradiation mode and D < 5200 Gy for the “active” mode), which is caused by the effect of radiation-stimulated ordering of the defect-containing structure of the p–n junction. It is also shown that the X-ray irradiation (D < 14000 Gy), the subsequent relaxation (96 h), and thermal annealing (2 h at 400 K) of the transistor temperature sensors under investigation result in an increase in their radiation resistance.

36 MATERIALS SCIENCE↗
DOE OSTI2016

Biosensor properties of SOI nanowire transistors with a PEALD Al{sub 2}O{sub 3} dielectric protective layer

The properties of protective dielectric layers of aluminum oxide Al{sub 2}O{sub 3} applied to prefabricated silicon-nanowire transistor biochips by the plasma enhanced atomic layer deposition (PEALD) method before being housed are studied depending on the deposition and annealing modes. Coating the natural silicon oxide with a nanometer Al{sub 2}O{sub 3} layer insignificantly decreases the femtomole sensitivity of biosensors, but provides their stability in bioliquids. In deionized water, transistors with annealed aluminum oxide are closed due to the trapping of negative charges of <(1–10) × 10{sup 11} cm{sup −2} at surface states. The application of a positive potential to the substrate (V{sub sub} > 25 V) makes it possible to eliminate the negative charge and to perform multiple measurements in liquid at least for half a year.

36 MATERIALS SCIENCE↗
DOE OSTI2016

Effect of random inhomogeneities in the spatial distribution of radiation-induced defect clusters on carrier transport through the thin base of a heterojunction bipolar transistor upon neutron irradiation

We analyze the electron transport through the thin base of a GaAs heterojunction bipolar transistor with regard to fluctuations in the spatial distribution of defect clusters induced by irradiation with a fissionspectrum fast neutron flux. We theoretically demonstrate that the homogeneous filling of the working region with radiation-induced defect clusters causes minimum degradation of the dc gain of the heterojunction bipolar transistor.

36 MATERIALS SCIENCE↗
DOE OSTI2018

Physical Principles of Self-Consistent Simulation of the Generation of Interface States and the Transport of Hot Charge Carriers in Field-Effect Transistors Based on Metal–Oxide–Semiconductor Structures

A detailed simulation of degradation (caused by hot charge carriers) based on self-consistent consideration of the transport of charge carriers and the generation of defects at the SiO{sub 2}/Si interface is carried out for the first time. The model is tested using degradation data obtained with decananometer n-type-channel field-effect transistors. It is shown that the mutual influence of the above aspects is significant and their independent simulation gives rise to considerable quantitative errors. In calculations of the energy distribution for charge carriers, the actual band structure of silicon and such mechanisms as impact ionization, scattering at an ionized impurity, and also electron–phonon and electron–electron interactions are taken into account. At the microscopic level, the generation of defects is considered as the superposition of single-particle and multiparticle mechanisms of breakage of the Si–H bond. A very important applied aspect of this study is the fact that our model makes it possible to reliably assess the operating lifetime of a transistor subjected to the effects of “hot” charge carriers.

36 MATERIALS SCIENCE↗
DOE OSTI2018

Analysis of the Behavior of Nonequilibrium Semiconductor Structures and Microwave Transistors During and After Pulsed γ- and γ-Neutron Irradiation

The influence of nonequilibrium processes in semiconductor structures under the effect of radiation on the characteristics of structures and microwave transistors based on them is analyzed. Special attention is paid to the comparison of pilot (experimental) and series-produced structures and transistors based on them before and after γ-neutron irradiation.

36 MATERIALS SCIENCE↗
DOE OSTI2019

Effect of the Electric Mode and γ Irradiation on Surface-Defect Formation at the Si–SiO{sub 2} Interface in a MOS Transistor

The results of experimental investigation into surface-defect formation under the effect of gamma-radiation with a dose rate P = 0.1 rad(Si)/s on MOS (metal-oxide-semiconductor) transistors with the n-type channel in the passive and active modes are presented. Two stages of surface-defect formation are observed. A qualitative model is proposed to explain the effect of the the drain transistor voltage on the defect formation process.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
DOE OSTI2019

Comparative Studies of AlGaAs/InGaAs Enhancement/Depletion-Mode High Electron Mobility Transistors with Virtual Channel Layers by Hybrid Gate Recesses Approaches

Unlike the conventional GaAs- and InP-based enhancement/depletion-mode (E/D-mode) transistors, the improved gate characteristics of the AlGaAs/InGaAs E-mode high electron mobility transistors (HEMTs) by way of hybrid gate recesses to remove the n-AlAs/i-GaAs/n-AlGaAs virtual channel layers upon 2DEG channels are demonstrated. As compared to the D-mode device (sample A), the gate reverse currents are effectively reduced by 45 and 102 times for the E-mode devices with additional gate recess time of 24 s (sample B) and 30 s (sample C) to remove part of the virtual channel layers, respectively. Under gate forward bias, the hybrid gate recesses also enable the gate turn-on voltages to increase. Furthermore, the threshold voltages of –1.25, 0.09, and 0.22 V are observed in the samples A, B, and C, respectively. The maximum transconductances of 187.3, 209.2, and 243.4 mS/mm and saturation current density of 482.8, 410.6, and 347.4 mA/mm are obtained in the samples A, B, and C, respectively.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
DOE OSTI2019

Redox transistors for neuromorphic computing

Efficiency bottlenecks inherent to conventional computing in executing neural algorithms have spurred the development of novel devices capable of “in-memory” computing. Commonly known as “memristors,” a variety of device concepts including conducting bridge, vacancy filament, phase change, and other types have been proposed as promising elements in artificial neural networks for executing inference and learning algorithms. In this article, we review the recent advances in memristor technology for neuromorphic computing and discuss strategies for addressing the most significant performance challenges, including nonlinearity, high read/write currents, and endurance. As an alternative to two-terminal memristors, we introduce the three-terminal electrochemical memory based on the redox transistor (RT), which uses a gate to tune the redox state of the channel. Decoupling the “read” and “write” operations using a third terminal and storage of information as a charge-compensated redox reaction in the bulk of the transistor enables high-density information storage. These properties enable low-energy operation without compromising analog performance and nonvolatility. Finally, we discuss the RT operating mechanisms using organic and inorganic materials, approaches for array integration, and prospects for achieving the device density and switching speeds necessary to make electrochemical memory competitive with established digital technology.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2017

High Temperature Operation of Al 0.45 Ga 0.55 N/Al 0.30 Ga 0.70 N High Electron Mobility Transistors

AlGaN-channel high electron mobility transistors (HEMTs) are among a class of ultra wide-bandgap transistors that have a bandgap greater than ~3.4 eV, beyond that of GaN and SiC, and are promising candidates for RF and power applications. Long-channel Al x Ga 1-x N HEMTs with x = 0.3 in the channel have been built and evaluated across the -50°C to +200°C temperature range. Room temperature drain current of 70 mA/mm, absent of gate leakage, and with a modest -1.3 V threshold voltage was measured. A very large I on /I off current ratio, greater than 10 8 was demonstrated over the entire temperature range, indicating that off-state leakage is below the measurement limit even at 200°C. Finally, combined with near ideal subthreshold slope factor that is just 1.3× higher than the theoretical limit across the temperature range, the excellent leakage properties are an attractive characteristic for high temperature operation.

36 MATERIALS SCIENCE↗
DOE OSTI2017

Al 0.85 Ga 0.15 N/Al 0.70 Ga 0.30 N High Electron Mobility Transistors with Schottky Gates and Large On/Off Current Ratio over Temperature

AlGaN-channel high electron mobility transistors (HEMTs) are among a class of ultra wide-bandgap transistors that are promising candidates for RF and power applications. Long-channel Al x Ga 1-x N HEMTs with x = 0.7 in the channel have been built and evaluated across the -50°C to +200°C temperature range. These devices achieved room temperature drain current as high as 46 mA/mm and were absent of gate leakage until the gate diode forward bias turn-on at ~2.8 V, with a modest -2.2 V threshold voltage. A very large I on /I off current ratio, of 8 × 10 9 was demonstrated. A near ideal subthreshold slope that is just 35% higher than the theoretical limit across the temperature range was characterized. The ohmic contact characteristics were rectifying from -50°C to +50°C and became nearly linear at temperatures above 100°C. An activation energy of 0.55 eV dictates the temperature dependence of off-state leakage.

36 MATERIALS SCIENCE↗
NASA NTRS2002

Rapid evolution of analog circuits configured on a field programmable transistor array

The purpose of this paper is to illustrate evolution of analog circuits on a stand-alone board-level evolvable system (SABLES). SABLES is part of an effort to achieve integrated evolvable systems. SABLES provides autonomous, fast (tens to hundreds of seconds), on-chip circuit evolution involving about 100,000 circuit evaluations. Its main components are a JPL Field Programmable Transistor Array (FPTA) chip used as transistor-level reconfigurable hardware, and a TI DSP that implements the evolutionary algorithm controlling the FPTA reconfiguration. The paper details an example of evolution on SABLES and points out to certain transient and memory effects that affect the stability of solutions obtained reusing the same piece of hardware for rapid testing of individuals during evolution.

SABLES analog circuits field programmable transist↗
NASA NTRS2016

Fabrication of a Silicon Nanowire on a Bulk Substrate by Use of a Plasma Etching and Total Ionizing Dose Effects on a Gate-All-Around Field-Effect Transistor

The gate all around transistor is investigated through experiment. The suspended silicon nanowire for the next generation is fabricated on bulk substrate by plasma etching method. The scallop pattern generated by Bosch process is utilized to form a floating silicon nanowire. By combining anisotropic and istropic silicon etch process, the shape of nanowire is accurately controlled. From the suspended nanowire, the gate all around transistor is demonstrated. As the silicon nanowire is fully surrounded by the gate, the device shows excellent electrostatic characteristics.

Transistor↗
NASA NTRS2018

One Time Programmable Antifuse Memory Based on Bulk Junctionless Transistor

One time programmable (OTP) antifuse base memory is demonstrated based on a bulk junctionless gate-all-around (GAA) nanowire transistor technology. The presented memory consists of a single transistor (1T) footprint without any process modification. The source/drain (S/D) and gate respectively become bit line and word line where the antifuse is formed by oxide breakdown across the gate and the channel. The channel is connected directly to the bit line due to junctionless S/D and inherently isolated from the neighboring cell by the GAA channel. Therefore, an array of 1T antifuse OTP can be a candidate for the sub-5-nanometer technology node.

Antifuse↗
NASA NTRS2024

Development of a High Frequency Class-A Amplifier for High Temperature Wireless Microsystems based on a Silicon Carbide Static Induction Transistor

Next generation gas turbine engine health monitoring for high performance jet engine-powered aircraft will incorporate integrated microelectronic sensors specifically designed to enhance aircraft functionality, engine efficiency, and safety. Temperature, air flow and pressure associated with the gas path as well as emissions from the engine correlate to the state of the combustor and other engine health conditions. Monitoring these parameters accurately requires positioning electronic sensors in the hot zone of the gas turbine engine, which exposes them to temperatures in excess of 400ºC. At these temperatures, signal amplification is needed at the transducer level to distinguish the desired measured signal from the significant electronic noise generated by the harsh environment. In this presentation, we report on the simulation, development, fabrication, and testing on a high temperature Class-A amplifier which utilizes a 4H-SiC Static Induction Transistor (SIT) as the active device and input/output matching and DC bias networks comprised of thin-film spiral inductors, metal-insulator-metal capacitors, and thick film chip resistors. A small signal model that emulates the operation of the 4H-SiC SIT from 25 to 400ºC, with an emphasis on operation at 400οC, was utilized. Measurements were performed from 25 to 400ºC to generate current-voltage curves, capacitive transistor characteristics and high frequency scattering parameters (S-parameters). The measured data was used to extrapolate the transconductance, gm, as a function of temperature for model development. Circuit simulation tools were used to generate S-parameters, which were compared to the measured values. At 400οC, a maximum difference between measured and simulated S-parameters for frequencies from 20 to 100 MHz were 3.84%, 0.68%, 10.61%, and 3.26% for S21, S12, S11, and S22, respectively. The average transit frequency, ft, was calculated from measured values to be 197.8 MHz, while the simulated value from the model was found to be 200 MHz. The Amplifier’s S-parameters were recorded at 20-100 MHz over a temperature range of 25-400ºC and show a gain of approximately 15.8 and 5.80 dBm at 25 and 400ºC, respectively. The input and output reflection coefficients at 50 MHz and 400ºC were -18.5 and -15.2 dB, respectively. The noise figure and phase noise were measured over the temperature range of 25-400ºC and recorded. The noise figure increased 21% at 50 MHz over the temperature range, while the 1 kHz offset of the phase noise remained below -110 dB. The stability factor, K, calculated with measured and simulated data demonstrates unconditional stability over the frequency range at 400ºC. Lastly, the 1-dB compression point was measured at 50 MHz and 400ºC with an approximated output of 9.5 dBm.

SiC↗