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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 343 records · Page 19
All sourcesNASA NTRSDOE OSTI
NASA NTRS1992

The locator system for wandering individuals

Configurations and operation strategies are described for a wanderer locator system based on wireless radio frequency communication designed to monitor elderly patients who may wander beyond safe perimeters in the home or in an institutional setting. The modular components of this wandering notification system are (1) portable transmitter/receivers to be worn or carried by the patient and the caretaker, (2) detectors to be mounted in doorways or other perimeters of a safe area, (3) programmable central processing units to control, communicate with, and/or trace the portable and remote devices, and (4) a cathode ray tube that can display information on patient location or system status. Photographs of all system components and illustrations of operations concepts are included.

Davidson, Shayla↗
NASA NTRS2011

NASA Tech Briefs, October 2011

Topics covered include: Laser Truss Sensor for Segmented Telescope Phasing; Qualifications of Bonding Process of Temperature Sensors to Deep-Space Missions; Optical Sensors for Monitoring Gamma and Neutron Radiation; Compliant Tactile Sensors; Cytometer on a Chip; Measuring Input Thresholds on an Existing Board; Scanning and Defocusing Properties of Microstrip Reflectarray Antennas; Cable Tester Box; Programmable Oscillator; Fault-Tolerant, Radiation-Hard DSP; Sub-Shot Noise Power Source for Microelectronics; Asynchronous Message Service Reference Implementation; Zero-Copy Objects System; Delay and Disruption Tolerant Networking MACHETE Model; Contact Graph Routing; Parallel Eclipse Project Checkout; Technique for Configuring an Actively Cooled Thermal Shield in a Flight System; Use of Additives to Improve Performance of Methyl Butyrate-Based Lithium-Ion Electrolytes; Li-Ion Cells Employing Electrolytes with Methyl Propionate and Ethyl Butyrate Co-Solvents; Improved Devices for Collecting Sweat for Chemical Analysis; Tissue Photolithography; Method for Impeding Degradation of Porous Silicon Structures; External Cooling Coupled to Reduced Extremity Pressure Device; A Zero-Gravity Cup for Drinking Beverages in Microgravity; Co-Flow Hollow Cathode Technology; Programmable Aperture with MEMS Microshutter Arrays; Polished Panel Optical Receiver for Simultaneous RF/Optical Telemetry with Large DSN Antennas; Adaptive System Modeling for Spacecraft Simulation; Lidar-Based Navigation Algorithm for Safe Lunar Landing; Tracking Object Existence From an Autonomous Patrol Vehicle; Rad-Hard, Miniaturized, Scalable, High-Voltage Switching Module for Power Applications; and Architecture for a 1-GHz Digital RADAR.

Source record↗
NASA NTRS2006

Single Event Effects Test Results for the Actel ProASIC Plus and Altera Stratix-II Field Programmable Gate Arrays

This work describes radiation testing of Actel's ProASIC Plus and Altera's Stratix-II FPGAs. The Actel Device Under Test (DUT) was a ProASIC Plus APA300-PQ208 nonvolatile, field reprogrammable device which is based on a 0.22micron flash-based LVCMOS technology. Limited investigation has taken place into flash based FPGA technologies, therefore this test served as a preliminary reference point for various SEE behaviors. The Altera DUT was a Stratix-II EP2S60F1020C4. Single Event Upset (SEU) and Single Event Latchup (SEL) were the focus of these studies. For the Actel, a latchup test was done at an effective LET of 75.0 MeV-sq cm/mg at room temperature, and no latchup was detected when irradiated to a total fluence of 1 x 10(exp 7) particles/sq cm. The Altera part was shown to latchup at room temperature.

heavy ions↗
DOE OSTI2024

New Insertion Device Control System for the APS Upgrade

New Hybrid Permanent Magnet Undulators (HPMUs) have been designed and manufactured using servo motors for precise and reliable gap motion control for the Advanced Photon Source Upgrade (APS-U) project. Meanwhile, existing HPMUs equipped with legacy stepper motors are systematically replaced with servo motors. In parallel with mechanical modifications of the undulators, a comprehensive upgrade has been implemented for the control of the devices. This upgrade includes integration of standardized industrial components for replacement of motor controllers and motor drives using the Kollmorgen Programmable Controller Multi-axis Master (PCMM) controllers and the AKD2G series servo drives. Soft Input Output Controllers (IOCs) are developed and deployed to replace the legacy VME-based IOCs for both single-period undulators and Revolver undulators. In this paper, we will present the architecture of the new insertion device control system, including control mechanisms, interlock protocols, and tools for diagnostics and troubleshooting.

Li, W.↗
DOE OSTI2015

Electrochemical model of polyaniline-based memristor with mass transfer step

The electrochemical organic memristor with polyaniline active layer is a stand-alone device designed and realized for reproduction of some synapse properties in the innovative electronic circuits, such as the new field-programmable gate arrays or the neuromorphic networks capable for learning. In this work a new theoretical model of the polyaniline memristor is presented. The developed model of organic memristor functioning was based on the detailed consideration of possible electrochemical processes occuring in the active zone of this device including the mass transfer step of ionic reactants. Results of the calculation have demonstrated not only the qualitative explanation of the characteristics observed in the experiment, but also quantitative similarities of the resultant current values. This model can establish a basis for the design and prediction of properties of more complicated circuits and systems (including stochastic ones) based on the organic memristive devices.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2022

Conductive Ink with Circular Life Cycle for Printed Electronics

Electronic waste carries energetic costs and an environmental burden rivaling that of plastic waste due to the rarity and toxicity of the heavy-metal components. Recyclable conductive composites are introduced for printed circuits formulated with polycaprolactone (PCL), conductive fillers, and enzyme/protectant nanoclusters. Circuits can be printed with flexibility (breaking strain ≈80%) and conductivity (≈2.1 × 10 4 S m -1 ). These composites are degraded at the end of life by immersion in warm water with programmable latency. Approximately 94% of the functional fillers can be recycled and reused with similar device performance. The printed circuits remain functional and degradable after shelf storage for at least 7 months at room temperature and one month of continuous operation under electrical voltage. Here, the present studies provide composite design toward recyclable and easily disposable printed electronics for applications such as wearable electronics, biosensors, and soft robotics.

36 MATERIALS SCIENCE↗
DOE OSTI2014

1 ns time to digital converters for the KM3NeT data readout system

The KM3NeT collaboration aims at the construction of a multi-km3 high-energy neutrino telescope in the Mediterranean Sea consisting of thousands of glass spheres (nodes), each of them containing 31 photomultiplier (PMT) of small photocathode area. The readout and data acquisition system of KM3NeT has to collect, treat and send to shore, in an economic way, the enormous amount of data produced by the photomultipliers. For this purpose, 31 high-resolution time-interval measuring channels are implemented on the Field-Programmable Gate Arrays (FPGA) based on Time to Digital Converter (TDC). TDC are very common devices in particles physics experiments. Architectures with low resources occupancy are desirable allowing the implementation of other instrumentation, communication and synchronization systems on the same device. The required resolution to measure both, time of flight and timestamp must be 1 ns. A 4-Oversampling technique with two high frequency clocks is used to achieve this resolution. The proposed TDC firmware is developed using very few resources in Xilinx Kintex-7.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2020

Optimized Quantum Compilation for Near-Term Algorithms with OpenPulse

Quantum computers are traditionally operated by programmers at the granularity of a gate-based instruction set. However, the actual device-level control of a quantum computer is performed via analog pulses. Here, we introduce a compiler that exploits direct control at this microarchitectural level to achieve significant improvements for quantum programs. Unlike quantum optimal control, our approach is bootstrapped from existing gate calibrations and the resulting pulses are simple. Our techniques are applicable to any quantum computer and realizable on current devices. We validate our techniques with millions of experimental shots on IBM quantum computers, controlled via the OpenPulse control interface. For representative benchmarks, our pulse control techniques achieve both 1.6x lower error rates and 2x faster execution time, relative to standard gate-based compilation. These improvements are critical in the near-term era of quantum computing, which is bottlenecked by error rates and qubit lifetimes.

Gokhale, Pranav↗
NASA NTRS1987

CCD Memory

CCD memory device yields over 6.4 x 10 to the eighth power levels of information on single chip. Charge-coupled device (CCD) demonstrated to operate as either read-only-memory (ROM) or photon-programmable memory with capacity of 640,000 bits, with each bit capable of being weighted to more than 1,000 discrete analog levels. Larger memory capacities now possible using proposed approach in conjunction with CCD's now being fabricated, which yield over 4 x 10 to the ninth power discrete levels of information on single chip.

Janesick, James R.↗
NASA NTRS2007

Using G4FETs as a Data Router for In-Plane Crossing of Signal Paths

Theoretical analysis and some experiments have demonstrated that siliconon- insulator (SOI) 4-gate transistors the type known as G(exp 4)FETs could be efficiently used for in-plane crossing of signal paths. Much of the effort of designing very-large-scale integrated (VLSI) circuits is focused on area-efficient routing of signals. The main source of difficulty in VLSI signal routing is the requirement to prevent crossing, in the same plane, of wires that are meant to be kept electrically insulated from each other. Consequently, it often becomes necessary to design and build VLSI circuits in multiple layers with vias (connections between conductors in different layers at selected locations). Suitable devices that would prevent, or at least sufficiently suppress, undesired electrical coupling (cross-talk) between wires crossing in the same plane would enable compact, simpler implementation complex interconnection networks with in-plane crossings that, heretofore, have not been possible in VLSI circuitry. The use of G4FETs as in-plane signal-crossing devices or routers, in combination with the use of G(exp 4)FETs as universal programmable logic gates, would create opportunities for reducing complexity in VLSI design.

Fijany, Amir↗
DOE OSTI2017

Secure environment establishment for FPGA-based safety-critical systems: quality management system context - 159

The paper discusses importance of secure development and operational environment establishment process, its particular stages, including security-oriented analysis and assessment of safety-critical instrumentation and control (I and C) systems. Two particular aspects are covered - security assessment and security assurance related to processes established by Quality Management System (QMS). One of the underlying ideas for the security assessment approach is in performance of gap analysis. Such analysis considers influence of all different factors within I and C system development process, and further application of Intrusion Modes and Effect Criticality Analysis (IMECA) technique. It makes the approach applicable to various safety-critical systems, considering underlying technologies (for example, Field-Programmable Gate Arrays (FPGA). Nowadays FPGA technology is often used in wide spectrum of hardware devices - from personal devices to complex I and C systems for Nuclear Power Plants (NPPs). The problem of cyber security assessment and assurance for FPGA technology in general and its application in safety-critical I and C systems in particular is not completely solved due to several reasons that cover regulations, QMS processes, implementation of development and verification activities, etc. The paper overviews existing regulations, which cover various aspects of NPP I and C systems development and operation, FPGA technology implementation, and secure development and operational environment establishment and assurance. The paper also emphasizes that complex approach should be used to identify and mitigate all specific vulnerabilities thorough the whole life cycle on the basis on Intrusion Modes, Effect and Criticality Analysis technique. The paper also proposes approach to the development of safety-critical I and C systems in the scope of cyber security assurance process at developer site. Secure development environment is described as a key factor during the development process and the paper also discusses establishment and maintenance of such environment as a part of company's Nuclear Quality Assurance's QMS. (authors)

22 GENERAL STUDIES OF NUCLEAR REACTORS↗
NASA NTRS2004

A Re-programmable Platform for Dynamic Burn-in Test of Xilinx Virtexll 3000 FPGA for Military and Aerospace Applications

Field Programmable Gate Arrays (FPGA) have played increasingly important roles in military and aerospace applications. Xilinx SRAM-based FPGAs have been extensively used in commercial applications. They have been used less frequently in space flight applications due to their susceptibility to single-event upsets. Reliability of these devices in space applications is a concern that has not been addressed. The objective of this project is to design a fully programmable hardware/software platform that allows (but is not limited to) comprehensive static/dynamic burn-in test of Virtex-II 3000 FPGAs, at speed test and SEU test. Conventional methods test very few discrete AC parameters (primarily switching) of a given integrated circuit. This approach will test any possible configuration of the FPGA and any associated performance parameters. It allows complete or partial re-programming of the FPGA and verification of the program by using read back followed by dynamic test. Designers have full control over which functional elements of the FPGA to stress. They can completely simulate all possible types of configurations/functions. Another benefit of this platform is that it allows collecting information on elevation of the junction temperature as a function of gate utilization, operating frequency and functionality. A software tool has been implemented to demonstrate the various features of the system. The software consists of three major parts: the parallel interface driver, main system procedure and a graphical user interface (GUI).

Field Programmable Gate Arrays (FPGA)↗
NASA NTRS2007

NASA Tech Briefs, July 2007

Topics covered include: Miniature Intelligent Sensor Module; "Smart" Sensor Module; Portable Apparatus for Electrochemical Sensing of Ethylene; Increasing Linear Dynamic Range of a CMOS Image Sensor; Flight Qualified Micro Sun Sensor; Norbornene-Based Polymer Electrolytes for Lithium Cells; Making Single-Source Precursors of Ternary Semiconductors; Water-Free Proton-Conducting Membranes for Fuel Cells; Mo/Ti Diffusion Bonding for Making Thermoelectric Devices; Photodetectors on Coronagraph Mask for Pointing Control; High-Energy-Density, Low-Temperature Li/CFx Primary Cells; G4-FETs as Universal and Programmable Logic Gates; Fabrication of Buried Nanochannels From Nanowire Patterns; Diamond Smoothing Tools; Infrared Imaging System for Studying Brain Function; Rarefying Spectra of Whispering-Gallery-Mode Resonators; Large-Area Permanent-Magnet ECR Plasma Source; Slot-Antenna/Permanent-Magnet Device for Generating Plasma; Fiber-Optic Strain Gauge With High Resolution And Update Rate; Broadband Achromatic Telecentric Lens; Temperature-Corrected Model of Turbulence in Hot Jet Flows; Enhanced Elliptic Grid Generation; Automated Knowledge Discovery From Simulators; Electro-Optical Modulator Bias Control Using Bipolar Pulses; Generative Representations for Automated Design of Robots; Mars-Approach Navigation Using In Situ Orbiters; Efficient Optimization of Low-Thrust Spacecraft Trajectories; Cylindrical Asymmetrical Capacitors for Use in Outer Space; Protecting Against Faults in JPL Spacecraft; Algorithm Optimally Allocates Actuation of a Spacecraft; and Radar Interferometer for Topographic Mapping of Glaciers and Ice Sheets.

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DOE OSTI2021

A next generation ultra short pulse reflectometry (USPR) diagnostic

Ultrashort Pulse Reflectometry (USPR) is a plasma diagnostic technique involving the propagation and reflection of ultrashort duration (~few ns) chirps. The reflected packets pass through a multichannel filter with time-of-flight measurements performed on each of the filtered packets. A next generation USPR system is under development, spanning 28–75 GHz, for use on compact, short duration, magnetically confined fusion devices. This system presents a dramatic increase in performance compared with an earlier USPR system employed on the LLNL Sustained Spheromak Physics Experiment device more than a decade ago. The new system replaces upconverting mixers with higher power active multiplier chains to generate mm-wave transmitter chirps, with custom time-of-flight electronics reducing the time per measurement by a factor of 3X. Finally, the system is equipped with a field programmable gate array for data acquisition and analysis.

47 OTHER INSTRUMENTATION↗
DOE OSTI2025

Supramolecular Control of Ionic Retention in Electrolyte-Gated Synaptic Transistors

Electrolyte-gated transistors with ion-trapping layers offer a promising platform for artificial synapses in neuromorphic computing, yet molecular mechanisms governing ionic retention remain poorly understood. Here, in this study, we present a supramolecular approach to modulate ion retention by incorporating a crown ether derivative-based polymer network as an ion-trapping layer on top of a semiconducting monolayer. We show that the balance between ion–host binding and ion–solvent interactions dictates the kinetics of ion capture and release, which in turn controls the memory characteristics of the device. By varying the solvent dielectric constant, we tune the ionic retention time from nearly permanent trapping to rapid relaxation. Intermediate solvent polarity enables programmable short- and long-term synaptic behaviors, including excitatory postsynaptic current, paired-pulse facilitation, and long-term potentiation and depression. These findings establish a direct link between supramolecular ion recognition and synaptic plasticity and provide a generalizable design strategy for ionic–electronic neuromorphic devices.

36 MATERIALS SCIENCE↗
NASA NTRS2001

Microarthroscopy System With Image Processing Technology Developed for Minimally Invasive Surgery

In a joint effort, NASA, Micro Medical Devices, and the Cleveland Clinic have developed a microarthroscopy system with digital image processing. This system consists of a disposable endoscope the size of a needle that is aimed at expanding the use of minimally invasive surgery on the knee, ankle, and other small joints. This device not only allows surgeons to make smaller incisions (by improving the clarity and brightness of images), but it gives them a better view of the injured area to make more accurate diagnoses. Because of its small size, the endoscope helps reduce physical trauma and speeds patient recovery. The faster recovery rate also makes the system cost effective for patients. The digital image processing software used with the device was originally developed by the NASA Glenn Research Center to conduct computer simulations of satellite positioning in space. It was later modified to reflect lessons learned in enhancing photographic images in support of the Center's microgravity program. Glenn's Photovoltaic Branch and Graphics and Visualization Lab (G-VIS) computer programmers and software developers enhanced and speed up graphic imaging for this application. Mary Vickerman at Glenn developed algorithms that enabled Micro Medical Devices to eliminate interference and improve the images.

Steele, Gynelle C.↗
NASA NTRS2018

Xilinx Kintex-UltraScale Field Programmable Gate Array Single Event Effects (SEE) Heavy-Ion Test Report

This is an independent investigation that evaluates the single event destructive and transient susceptibility of the Xilinx Kintex-UltraScale device. Design/Device susceptibility is determined by monitoring the device under test (DUT) for Single Event Transient (SET) and Single Event Upset (SEU) induced faults by exposing the DUT to a heavy ion beam. Potential Single Event Latch-up (SEL) is monitored throughout heavy-ion testing by examining device current. This device does not have embedded mitigation. Hence, user implemented mitigation is investigated using Synopsys mitigation tools.

Single Event Transient (SET)↗