Engineering Papers⌕ Search

SEARCH · Engineering Papers

Results for “FET”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 343 records · Page 19
All sourcesNASA NTRSDOE OSTI
NASA NTRS1989

Effects of space radiation on electronic microcircuits

The single event effects or phenomena (SEP), which so far have been observed as events falling on one or another of the SE classes: Single Event Upset (SEU), Single Event Latchup (SEL) and Single Event Burnout (SEB), are examined. Single event upset is defined as a lasting, reversible change in the state of a multistable (usually bistable) electronic circuit such as a flip-flop or latch. In a computer memory, SEUs manifest themselves as unexplained bit flips. Since latchup is in general caused by a single event of short duration, the single event part of the SEL term is superfluous. Nevertheless, it is used customarily to differentiate latchup due to a single heavy charged particle striking a sensitive cell from more ordinary kinds of latchup. Single event burnout (SEB) refers usually to total instantaneous failure of a power FET when struck by a single particle, with the device shorting out the power supply. An unforeseen failure of these kinds can be catastrophic to a space mission, and the possibilities are discussed.

Kolasinski, W. A.↗
NASA NTRS1988

Advanced altimetry

The radar altimeter being developed for the Ocean Topography Experiment (TOPEX) will have an inherent instrument precision of 2 to 3 cm. While some minor refinements may be possible in the future, major geophysical advances could be made if altimetric measurements over a wide swath of the Earth's surface were possible. The NASA Headquarters Oceanic Processes Branch is supporting a 3-year investigation of the technological issues inherent in the precision measurement of topography from spaceborne platforms at angles off-nadir. To explore the off-nadir measurement of topography, a flexible, airborne radar instrument system is being developed. Its hardware design is now complete, and it is made up of several subsystems. The antenna selected is a dielectric lens of .894 m diameter. The RF subsystem uses phase-locked oscillators, FET solid-state amplifiers, and times four frequency multipliers to develop a transmit signal at a frequency of 36.0 GHz and a local oscillator signal at a frequency of 35.4 GHz. Lecroy 6880 digitizers under computer control digitize the five receiver outputs. The digital subsystem consists of six single-board Heurikon processors. At this time, the instrument construction continues with final system integration planned for November 1988.

Parsons, C. L.↗
NASA NTRS1988

Short wavelength 128 by 128 focal plane arrays for remote sensing applications

Short-wavelength (1-2.5-micron) 128x128 focal plane arrays have been fabricated and demonstrated with high pixel yields and dark-current-limited performance. The detector material is HgCdTe grown by LPE on a sapphire substrate which yields high-performance uniform detectors. The detector arrays were characterized at temperatures of 80-150 K; the peak quantum efficiency at 2.4 microns is 80 percent. The multiplexer is a Reticon FET switch with output amplifiers. It is noted that the long-term goal of this project is to develop a 150x1000 mosaicked focal plane for use in the HIRIS instrument on the Earth Observing System.

Bothwell, Mary↗
NASA NTRS1988

GaAs circuits for monolithic optical controller

GaAs circuits for use in a fully monolithic 1 Gb/s optical controller have been developed and tested. The circuits include photodetectors, transimpedance amplifiers and 1:16 demultiplexers that can directly control the phase of MMIC phase shifters. The entire chip contains approximately 300 self-aligned gate E/D-mode MESFETs. The MESFETs have one micron-wide gate and the E-mode FETs typically have transconductance of 200 ms/mm. Results of simulations and tests are reported. Also, the design and layout of the fully monolithic chip is discussed.

Gustafson, G.↗
NASA NTRS1988

Programmable synaptic chip for electronic neural networks

A binary synaptic matrix chip has been developed for electronic neural networks. The matrix chip contains a programmable 32X32 array of 'long channel' NMOSFET binary connection elements implemented in a 3-micron bulk CMOS process. Since the neurons are kept off-chip, the synaptic chip serves as a 'cascadable' building block for a multi-chip synaptic network as large as 512X512 in size. As an alternative to the programmable NMOSFET (long channel) connection elements, tailored thin film resistors are deposited, in series with FET switches, on some CMOS test chips, to obtain the weak synaptic connections. Although deposition and patterning of the resistors require additional processing steps, they promise substantial savings in silicon area. The performance of synaptic chip in a 32-neuron breadboard system in an associative memory test application is discussed.

Moopenn, A.↗
NASA NTRS1990

Gallium Arsenide Domino Circuit

Advantages include reduced power and high speed. Experimental gallium arsenide field-effect-transistor (FET) domino circuit replicated in large numbers for use in dynamic-logic systems. Name of circuit denotes mode of operation, which logic signals propagate from each stage to next when successive stages operated at slightly staggered clock cycles, in manner reminiscent of dominoes falling in a row. Building block of domino circuit includes input, inverter, and level-shifting substages. Combinational logic executed in input substage. During low half of clock cycle, result of logic operation transmitted to following stage.

Yang, Long↗
NASA NTRS1990

GTO/FET Cascode Three-Terminal Switch

Neither external bias nor energy-storage components required. Three-terminal semiconductor switching circuit features high switching speed, extremely high turnoff safe operating area (area in current-vs-voltage plane), moderately low forward ("on"-state) voltage drop, and efficient utilization of silicon in design of components. Includes gate-turn-off thyristor (GTO) and low-voltage (low-on-resistance) field-effect transistor (FET-1) connected in series to form cascode pair. Made of commercially available, discrete components, as hybrid circuit package or as monolithic integrated circuit.

Rippel, Wally E.↗
NASA NTRS1989

HgCdTe 256x256 NWIR FPA

Researchers developed a HgCdTe 256x256 focal plane array (FPA) which operates in the 1 to 5 micron band. This is presently the largest demonstrated HgCdTe FPA. The detector material is HgCdTe on sapphire (PACE-1 technology) which has a low thermal expansion mismatch with silicon. The multiplexer is a CMOS FET-switch device processed through a commercial silicon foundry. The multiplexer input is direct injection and the charge capacity is about 2 times 10 to the 7th power electrons. The kTC limited read noise is 400 electrons. Researchers demonstrated high background imaging using the device. The broadband quantum efficiency is measured to be 59 percent. Dark currents less than 0.1 pA were measured at 77 K for detectors processed on PACE-1 material with 4.9 microns cutoff. The dark currents decrease as the temperature is lowered, and researchers are presently studying the T less than 77 K characteristics. The interconnect yield is greater than 95 percent. The devices are available for astronomical applications.

Vural, Kadri↗
NASA NTRS1989

Improved Si:As BIBIB (Back-Illuminated Blocked-Impurity-Band) hybrid arrays

Results of a program to increase the short wavelength (less than 10 microns) detective quantum efficiency, eta/beta, of Si:As Impurity Band Conduction arrays are presented. The arrays are epitaxially grown Back-Illuminated Blocked (BIB) Impurity-Band (BIBIB) 10x50 detectors bonded to switched-FET multiplexers. It is shown that the 4.7 microns detective quantum efficiency increases proportionately with the thickness of the infrared active layer. A BIB array with a thick active layer, designed for low dark current, exhibits eta/beta = 7 to 9 percent at 4.7 microns for applied bias voltages between 3 and 5 V. The product of quantum efficiency and photoelectric gain, etaG, increases from 0.3 to 2.5 as the voltage increases from 3 to 5 V. Over this voltage range, the dark current increases from 8 to 120 e(-)s(-1) at a device temperature of 4.2 K and is under 70 e(-)s(-1) for all voltages at 2 K. Because of device gain, the effective dark current (equivalent photon rate) is less than 3 e(-)s(-1) under all operating conditions. The effective read noise (equivalent photon noise) is found to be less than 12 electrons under all operating conditions and for integration times between 0.05 and 100 seconds.

Herter, T.↗
NASA NTRS1989

Tests of the Rockwell Si:As Back-Illuminated Blocked-Impurity Band (BIBIB) detectors

Two arrays of Rockwell's Si:As back-illuminated blocked-impurity-band detectors were tested at the Max-Planck-Institute for Astronomy (MPIA) at low background and low temperature for possible use in the astronomical space experiment ISOPHOT. For these measurements special test equipment was put together. A cryostat was mechanically modified to accommodate the arrays and special peripheral electronics was added to a microprocessor system to drive the cold multiplexer and to acquire the output data. The first device, a 16x50 element array on a fan-out board was used to test individual pixels with a trans-impedance-amplifier at a photon background of 10(exp 8) Ph s(-1)cm(-2) and at temperatures of 2.7 to 4.4 K. The noise-equivalent-power NEP is in the range 5 - 7 x 10(exp -18) WHz(exp -1/2), the responsivity is less than or equal to 100 AW(exp -1)(f = 10 Hz). The second device was a 10x50 array including a cold readout electronics of switched FETs (SWIFET). Measurements of this array were done in a background range of 5 x 10(exp 5) to 5 x 10(exp 11) Ph s(exp-1)cm(exp-2) and at operating temperatures between 3.0 and 4.8 K. The NEP ranges from less than 10(exp -18) at the lowest background to 2 x 10(exp -16) WHz(exp -1/2) at the highest flux.

Wolf, J.↗
NASA NTRS1988

The 30-GHz monolithic receive module

The fourth year progress is described on a program to develop a 27.5 to 30 GHz GaAs monolithic receive module for spaceborne-communication antenna feed array applications, and to deliver submodules for experimental evaluation. Program goals include an overall receive module noise figure of 5 dB, a 30 dB RF to IF gain with six levels of intermediate gain control, a five bit phase shifter, and a maximum power consumption of 250 mW. Submicron gate length single and dual gate FETs are described and applied in the development of monolithic gain control amplifiers and low noise amplifiers. A two-stage monolithic gain control amplifier based on ion implanted dual gate MESFETs was designed and fabricated. The gain control amplifier has a gain of 12 dB at 29 GHz with a gain control range of over 13 dB. A two-stage monolithic low noise amplifier based on ion implanted MESFETs which provides 7 dB gain with 6.2 dB noise figure at 29 GHz was also developed. An interconnected receive module containing LNA, gain control, and phase shifter submodules was built using the LNA and gain control ICs as well as a monolithic phase shifter developed previously under this program. The design, fabrication, and evaluation of this interconnected receiver is presented. Progress in the development of an RF/IF submodule containing a unique ion implanted diode mixer diode and a broadband balanced mixer monolithic IC with on-chip IF amplifier and the initial design of circuits for the RF portion of a two submodule receiver are also discussed.

Bauhahn, P.↗
NASA NTRS1988

A 256 by 256 HgCdTe hybrid focal plane for low-background earth resources and astronomy applications

This paper describes a 256 x 256 HgCdTe hybrid focal plane with a 0.9- to 2.6-micron spectral range. The silicon FET switch multiplexer (mux) is based on previous hybrid work with a 128 x 128 Reticon mux. The high-density device described has a 40-micron pixel pitch vs 60-micron pixel pitch for the 128 x 128 devices. A read noise of about 1,000 e(-) has been obtained on developmental hybrid structures, along with full well capacities of about 1 x 10 to the 6th e(-). Preliminary device characterization for the 256 x 256 device, along with the first low-background astronomy test results for the 128 x 128 devices, will be presented.

Bailey, Gary C.↗
NASA NTRS1989

Practical application of HgI2 detectors to a space-flight scanning electron microscope

Mercuric iodide X-ray detectors have been undergoing tests in a prototype scanning electron microscope system being developed for unmanned space flight. The detector program addresses the issues of geometric configuration in the SEM, compact packaging that includes separate thermoelectric coolers for the detector and FET, X-ray transparent hermetic encapsulation and electrical contacts, and a clean vacuum environment.

Bradley, J. G.↗
NASA NTRS1990

Chemical nature of silicon nitride-indium phosphide interface and rapid thermal annealing for InP MISFETs

A rapid thermal annealing (RTA) process in pure N2 or pure H2 was developed for ion-implanted and encapsulated indium phosphide compound semiconductors, and the chemical nature at the silicon nitride-InP interface before and after RTA was examined using XPS. Results obtained from SIMS on the atomic concentration profiles of the implanted silicon in InP before and after RTA are presented, together with electrical characteristics of the annealed implants. Using the RTA process developed, InP metal-insulator semiconductor FETs (MISFETS) were fabricated. The MISFETS prepared had threshold voltages of +1 V, transconductance of 27 mS/mm, peak channel mobility of 1200 sq cm/V per sec, and drain current drift of only 7 percent.

Biedenbender, M. D.↗
NASA NTRS1989

MCTs and IGBTs - A comparison of performance in power electronic circuits

There is a continuous demand for improvements in the quality of switching power devices, such as higher switching frequency, higher withstand voltage capability, larger current-handling capability, and lower conduction losses. However, for single-conduction-mechanism devices (SCRs, GTOs, BJTs, FETs), possessing all these features is probably unrealizable for physical reasons. An attractive solution appears to be double-mechanism devices, in which the features of both a minority carrier device (BJT or SCR) and a majority carrier device (MOSFET) are embedded. Both IGBTs (insulated-gate bipolar transistors) and MCTs (MOS-controlled thyristors) belong to this family of double-mechanism devices and promise to have a major impact on converter circuit signs. The authors deal with the major features of these two devices, pointing out those that are most critical to the design of converter topologies. In particular, the two devices have been tested both in a chopper and in two resonant link converter topologies, and the experimental results are reported.

Sul, S. K.↗
NASA NTRS1990

Optical synchronization of millimeter-wave oscillators for distributed architecture

A review of various methods of phase and frequency synchronization of active MMIC based transmit/receive modules is presented, and particular emphasis is placed on the synchronization of oscillators through the use of an indirect subharmonic optical injection locking technique. In this approach, the nonlinear behavior of large-signal modulated laser diodes and solid-state oscillators is exploited to extend the bandwidth of the synchronizing link to the millimeter-wave frequency range. Experimental results of the phase and frequency coherency of two 21.5 GHz FET oscillators are reported. Optimum performance is achieved at a subharmonic factor of 1/4, with a locking range of 84 MHz and a phase noise degradation of only 14 dB. The phase coherency measurement of two injection-locked oscillators points to a phase shift, which is introduced as a result of the frequency detuning between the slave and master oscillator signals. A scheme to correct for this phase error is presented.

Daryoush, Afshin S.↗
NASA NTRS1991

A double-stage injection-locked oscillator for optically fed phased array antennas

In an optically fed phased array antenna system, the microwave carrier signal is transmitted via a modulated lightwave to each active T/R (transmit/receive) module, where it must be converted back to the microwave domain. Currently, efficient optical-to-microwave conversion is extremely difficult, as the detected microwave signal is weak and noisy. A novel circuit, containing a high-gain/low-noise microwave injection-locked oscillator, has been developed to improve the interface between the optical and microwave components. The circuit utilizes two FETs and a dielectric resonator, which serves as a frequency-dependent feedback element. The circuit, designed to operate at about 8 GHz, provides significant amplitude and phase noise suppression. In addition, the circuit realization is compatible with MMIC technology.

Berceli, Tibor↗
NASA NTRS1991

Plasma-deposited germanium nitride gate insulators for indium phosphide metal-insulator-semiconductor field-effect transistors

Plasma-deposited germanium nitride was investigated for the first time as a possible gate insulator for InP compound semiconductor metal-insulator-semiconductor FET (MISFET) technology. The germanium nitride films were successfully deposited in a capacitively coupled parallel plate reactor at 13.56 MHz operation using GeH4/N2/NH3 and GeH4/N2 mixtures as reactant gases. The former process produced better quality films with enhanced uniformity, increased deposition rates, and increased resistivity. The breakdown field strength of the films was greater than 10 to the 6th V/cm. Auger electron spectroscopy did not indicate significant chemical composition differences between the two processes. For MISFETs with 2-micron channel lengths fabricated on InP, the device transconductance and threshold voltage for the GeH4/N2/NH3 process were 17 mS/mm and -3.6 V, respectively. The drain-source breakdown voltages were greater than 10 V.

Johnson, Gregory A.↗