An error detection and correction approach to the time decoding problem
Error detection and correction system for decoding and evaluating redundant information contained in decimal time codes
DATA PROCESSING↗
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Minimax decoding of cyclic block codes
A minimax decoding algorithm utilizing soft bit detection of an (n,k) cyclic block code is described which will permit the correction of up to n-k bit errors interspersed at random locations throughout the block. The decoding solution consists of: (1) identifying the ordered soft bit set and, (2) finding the minimum order solution to the resulting syndrome equations where the nonzero error vector components are constrained to be a subset of the soft bit set. An efficient implementation of the decoding operation is described. In essence, this algorithm focuses the correction capability of the code on those bit positions which have the lowest a posteriori probabilities of correct detection.
Greene, E. P.↗
Logical Shadow Tomography: Efficient Estimation of Error-mitigated Observables
In near-term quantum applications, reducing errors and improving device reliability is an essential task. Towards these ends, various techniques have been introduced in recent literature, collectively referred to as quantum error mitigation techniques, for reducing errors in pre-fault-tolerant devices. Here, we introduce logical shadow tomography as a versatile error mitigation method. Our technique uses a stabilizer code to encode information in a logical state. Instead of doing active error correction, quantum states will be measured at the end of computation via shadow tomography and non-logical errors are projected out in the classical post-processing. Relative to quantum subspace expansion which requires O(2(M-1)L) experiments to estimate an logical Pauli observable encoded by an [[M, L, d]] code, our technique only requires 2L experiments, an important practical reduction in resources.
Hong-Ye Hu↗
Performance analysis of a hybrid ARQ error control scheme for near earth satellite communications
A robust error control coding scheme is presented. The scheme is a cascaded forward error correction (FEC) scheme supported by parity retransmissions for further error correction in the erroneous data words. The error performance and throughput efficiency of the scheme are analyzed. Two specific schemes are proposed for NASA near earth satellite communications. It is shown that both schemes provide high reliability and throughput efficiency even for high channel bit error rates in the range of .002. The schemes are suitable for high data rate file transfer.
Lin, Shu↗
Orbital maneuvering vehicle teleoperation and video data compression
The Orbital Maneuvering Vehicle (OMV) and concepts of teleoperation and video data compression as applied to OMV design and operation are described. The OMV provides spacecraft delivery, retrieval, reboost, deboost and viewing services, with ground-control or Space Station operation, through autonomous navigation and pilot controlled maneuvers. Communications systems are comprised of S-band RF command, telemetry, and compressed video data links through the TDRSS and GSTDN networks. The control console video monitors display a monochrome image at an update rate of five frames per second. Depending upon the mode of operation selected by the pilot, the video resolution is either 255 x 244 pixels, or 510 x 244 pixels. Since practically all video image redundancy is removed by the compression process, the video reconstruction is particularly sensitive to data transmission bit errors. Concatenated Reed-Solomon and convolution coding are used with helical data interleaving for error detection and correction, and an error-containment process minimizes the propagation of error effects throughout the video image. Video sub-frame replacement is used, in the case of a non-correctable error or error burst, to minimize the visual impact to the pilot.
Jones, Steve↗
A robust CELP coder with source-dependent channel coding
A CELP coder using Source Dependent Channel Encoding (SDCE) for optimal channel error protection is introduced. With SDCE, each of the CELP parameters are encoded by minimizing a perceptually meaningful error criterion under prevalent channel conditions. Unlike conventional channel coding schemes, SDCE allows for optimal balance between error detection and correction. The experimental results show that the CELP system is robust under various channel bit error rates and displays a graceful degradation in SSNR as the channel error rate increases. This is a desirable property to have in a coder since the exact channel conditions cannot usually be specified a priori.
Sukkar, Rafid A.↗
Non Radiation Hardened Microprocessors in Spaced Based Remote Sensing Systems
The CALIPSO (Cloud-Aerosol Lidar and Infrared Pathfinder Satellite Observations) mission is a comprehensive suite of active and passive sensors including a 20Hz 230mj Nd:YAG lidar, a visible wavelength Earth-looking camera and an imaging infrared radiometer. CALIPSO flies in formation with the Earth Observing System Post-Meridian (EOS PM) train, provides continuous, near-simultaneous measurements and is a planned 3 year mission. CALIPSO was launched into a 98 degree sun synchronous Earth orbit in April of 2006 to study clouds and aerosols and acquires over 5 gigabytes of data every 24 hours. The ground track of one CALIPSO orbit as well as high and low intensity South Atlantic Anomaly outlines is shown. CALIPSO passes through the SAA several times each day. Spaced based remote sensing systems that include multiple instruments and/or instruments such as lidar generate large volumes of data and require robust real-time hardware and software mechanisms and high throughput processors. Due to onboard storage restrictions and telemetry downlink limitations these systems must pre-process and reduce the data before sending it to the ground. This onboard processing and realtime requirement load may mean that newer more powerful processors are needed even though acceptable radiation-hardened versions have not yet been released. CALIPSO's single board computer payload controller processor is actually a set of four (4) voting non-radiation hardened COTS Power PC 603r's built on a single width VME card by General Dynamics Advanced Information Systems (GDAIS). Significant radiation concerns for CALIPSO and other Low Earth Orbit (LEO) satellites include the South Atlantic Anomaly (SAA), the north and south poles and strong solar events. Over much of South America and extending into the South Atlantic Ocean the Van Allen radiation belts dip to just 200-800km and spacecraft entering this area are subjected to high energy protons and experience higher than normal Single Event Upset (SEU) and Single Event Latch-up (SEL) rates. Although less significant, spacecraft flying in the area around the poles experience similar upsets. Finally, powerful solar proton events in the range of 10MeV/10pfu to 100MeV/1pfu as are forecasted and tracked by NOAA's Space Environment Center in Colorado can result in Single Event Upset (SEU), Single Event Latch-up (SEL) and permanent failures such as Single Event Gate Rupture (SEGR) in some technologies. (Galactic Cosmic Rays (GCRs) are another source, especially for gate rupture) CALIPSO mitigates common radiation concerns in its data handling through the use of redundant processors, radiation-hardened Application Specific Integrated Circuits (ASIC), hardware-based Error Detection and Correction (EDAC), processor and memory scrubbing, redundant boot code and mirrored files. After presenting a system overview this paper will expand on each of these strategies. Where applicable, related on-orbit data collected since the CALIPSO initial boot on May 4, 2006 will be noted.
Decoursey, Robert J.↗
Dynamical Logical Qubits in the Bacon-Shor Code
Explore the source record for details and available documents.
quantum error correction↗
Dynamical Logical Qubits in the Bacon-Shor Code
Explore the source record for details and available documents.
quantum error correction↗
A quick-look decoder with isolated error correction and node synchronization
It is noted that in a low-noise environment, a simple inversion circuit can be used for quick-look decoding of a convolutional code. An improvement in the bit error performance of the raw inversion circuit is effected by a simple pattern-recognition technique operating on the syndrome stream, which is also used to acquire node sync.
Greenhall, C. A.↗
A two dimensional interface element for coupling of independently modeled three dimensional finite element meshes and extensions to dynamic and non-linear regimes
The work reported here pertains only to the first year of research for a three year proposal period. As a prelude to this two dimensional interface element, the one dimensional element was tested and errors were discovered in the code for built-up structures and curved interfaces. These errors were corrected and the benchmark Boeing composite crown panel was analyzed successfully. A study of various splines led to the conclusion that cubic B-splines best suit this interface element application. A least squares approach combined with cubic B-splines was constructed to make a smooth function from the noisy data obtained with random error in the coordinate data points of the Boeing crown panel analysis. Preliminary investigations for the formulation of discontinuous 2-D shell and 3-D solid elements were conducted.
Aminpour, Mohammad↗
Statistical inference of static analysis rules
Various apparatus and methods are disclosed for identifying errors in program code. Respective numbers of observances of at least one correctness rule by different code instances that relate to the at least one correctness rule are counted in the program code. Each code instance has an associated counted number of observances of the correctness rule by the code instance. Also counted are respective numbers of violations of the correctness rule by different code instances that relate to the correctness rule. Each code instance has an associated counted number of violations of the correctness rule by the code instance. A respective likelihood of the validity is determined for each code instance as a function of the counted number of observances and counted number of violations. The likelihood of validity indicates a relative likelihood that a related code instance is required to observe the correctness rule. The violations may be output in order of the likelihood of validity of a violated correctness rule.
Engler, Dawson Richards↗
Implementation of an experimental fault-tolerant memory system
The experimental fault-tolerant memory system described in this paper has been designed to enable the modular addition of spares, to validate the theoretical fault-secure and self-testing properties of the translator/corrector, to provide a basis for experiments using the new testing and correction processes for recovery, and to determine the practicality of such systems. The hardware design and implementation are described, together with methods of fault insertion. The hardware/software interface, including a restricted single error correction/double error detection (SEC/DED) code, is specified. Procedures are carefully described which, (1) test for specified physical faults, (2) ensure that single error corrections are not miscorrections due to triple faults, and (3) enable recovery from double errors.
Carter, W. C.↗
Software Validation via Model Animation
This paper explores a new approach to validating software implementations that have been produced from formally-verified algorithms. Although visual inspection gives some confidence that the implementations faithfully reflect the formal models, it does not provide complete assurance that the software is correct. The proposed approach, which is based on animation of formal specifications, compares the outputs computed by the software implementations on a given suite of input values to the outputs computed by the formal models on the same inputs, and determines if they are equal up to a given tolerance. The approach is illustrated on a prototype air traffic management system that computes simple kinematic trajectories for aircraft. Proofs for the mathematical models of the system's algorithms are carried out in the Prototype Verification System (PVS). The animation tool PVSio is used to evaluate the formal models on a set of randomly generated test cases. Output values computed by PVSio are compared against output values computed by the actual software. This comparison improves the assurance that the translation from formal models to code is faithful and that, for example, floating point errors do not greatly affect correctness and safety properties.
Dutle, Aaron M.↗
Program Instrumentation and Trace Analysis
Several attempts have been made recently to apply techniques such as model checking and theorem proving to the analysis of programs. This shall be seen as a current trend to analyze real software systems instead of just their designs. This includes our own effort to develop a model checker for Java, the Java PathFinder 1, one of the very first of its kind in 1998. However, model checking cannot handle very large programs without some kind of abstraction of the program. This paper describes a complementary scalable technique to handle such large programs. Our interest is turned on the observation part of the equation: How much information can be extracted about a program from observing a single execution trace? It is our intention to develop a technology that can be applied automatically and to large full-size applications, with minimal modification to the code. We present a tool, Java PathExplorer (JPaX), for exploring execution traces of Java programs. The tool prioritizes scalability for completeness, and is directed towards detecting errors in programs, not to prove correctness. One core element in JPaX is an instrumentation package that allows to instrument Java byte code files to log various events when executed. The instrumentation is driven by a user provided script that specifies what information to log. Examples of instructions that such a script can contain are: 'report name and arguments of all called methods defined in class C, together with a timestamp'; 'report all updates to all variables'; and 'report all acquisitions and releases of locks'. In more complex instructions one can specify that certain expressions should be evaluated and even that certain code should be executed under various conditions. The instrumentation package can hence be seen as implementing Aspect Oriented Programming for Java in the sense that one can add functionality to a Java program without explicitly changing the code of the original program, but one rather writes an aspect and compiles it into the original program using the instrumentation. Another core element of JPaX is an observation package that supports the analysis of the generated event stream. Two kinds of analysis are currently supported. In temporal analysis the execution trace is evaluated against formulae written in temporal logic. We have implemented a temporal logic evaluator on finite traces using the Maude rewriting system from SRI International, USA. Temporal logic is defined in Maude by giving its syntax as a signature and its semantics as rewrite equations. The resulting semantics is extremely efficient and can handle event streams of hundreds of millions events in few minutes. Furthermore, the implementation is very succinct. The second form of even stream analysis supported is error pattern analysis where an execution trace is analyzed using various error detection algorithms that can identify error-prone programming practices that may potentially lead to errors in some different executions. Two such algorithms focusing on concurrency errors have been implemented in JPaX, one for deadlocks and the other for data races. It is important to note, that a deadlock or data race potential does not need to occur in order for its potential to be detected with these algorithms. This is what makes them very scalable in practice. The data race algorithm implemented is the Eraser algorithm from Compaq, however adopted to Java. The tool is currently being applied to a code base for controlling a spacecraft by the developers of that software in order to evaluate its applicability.
Havelund, Klaus↗
Optimal space communication techniques
Encoding of video signals using adaptive delta modulation (DM) was investigated, along with the error correction of DM encoded signals corrupted by thermal noise. Conversion from pulse code modulation to delta modulation was studied; an expression for the signal to noise ratio of the DM signal derived was achieved by employing linear, 2-sample, interpolation between sample points. A phase locked loop using a nonlinear processor in lieu of a loop filter is discussed.
Schilling, D. L.↗
Documentation for the machine-readable version of the general catalogue of 33342 stars for the epoch 1950 (Boss 1937)
A revised and corrected version of the machine-readable catalog has been prepared. Cross identifications of the GC stars to the HD and DM catalogs have been replaced by data from the new SAO-HD-GC-DM Cross Index (Roman, Warren and Schofield 1983), including component identifications for multiple SAO entries having identical DM numbers in the SAO Catalog, supplemental Bonner Durchmusterung stars (lower case letter designations) and codes for multiple HD stars. Additional individual corrections have been incorporated based upon errors found during analyses of other catalogs.
Roman, N. G.↗
Channel coding for digital HDTV terrestrial broadcasting
The Federal Communications Commission of the United States has ruled that high-definition television (HDTV) will occupy no more than 6 MHz of the VHF and UHF bands now used for conventional TV. In order to transmit the HDTV signal in 6 MHz, the four United States digital HDTV proponents, the DigiCipher, DSC-HDTV, ADTV, and ATVA-P systems, are reducing the video data rate of HDTV to 15-17 Mb/s, a compression ratio of approximately 60-70 times. The high compression dictates that channel coding be used to avoid block errors and multiframe error propagation. High efficiency in channel utilization required by the 6-MHz limitation means that the channel must be properly equalized and that the multipath and interfering signals must be severely limited. The channel coding techniques used for error reduction include data interleaving, error detection and replacement, and error correction at different levels of protection for bits and blocks of unequal importance.
Beakley, Guy W.↗