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At least 325 records · Page 18

High-voltage, high-power, solid-state remote power controllers for aerospace applications

Two general types of remote power controller (RPC) that combine the functions of a circuit breaker and a switch were developed for use in direct-current (dc) aerospace systems. Power-switching devices used in these designs are the relatively new gate-turnoff thyristor (GTO) and poweer metal-oxide-semiconductor field-effect transistors (MOSFET). The various RPC's can switch dc voltages to 1200 V and currents to 100 A. Seven different units were constructed and subjected to comprehensive laboratory and thermal vacuum testing. Two of these were dual units that switch both positive and negative voltages simultaneously. The RPC's using MOSFET's have slow turnon and turnoff times to limit voltage spiking from high di/dt. The GTO's have much faster transition times. All RPC's have programmable overload tripout and microsecond tripout for large overloads. The basic circuits developed can be used to build switchgear limited only by the ratings of the switching device used.

Sturman, J. C.↗

Platinum Graphene Catalytic Condenser for Millisecond Programmable Metal Surfaces

Accelerating catalytic chemistry and tuning surface reactions require precise control of the electron density of metal atoms. In this work, nanoclusters of platinum were supported on a graphene sheet within a catalytic condenser device that facilitated electron or hole accumulation in the platinum active sites with negative or positive applied potential, respectively. The catalytic condenser was fabricated by depositing on top of a p-type Si wafer an amorphous HfO 2 dielectric (70 nm), on which was placed the active layer of 2–4 nm platinum nanoclusters on graphene. A potential of ±6 V applied to the Pt/graphene layer relative to the silicon electrode moved electrons into or out of the active sites of Pt, attaining charge densities more than 1% of an electron or hole per surface Pt atom. At a level of charge condensation of ±10% of an electron per surface atom, the binding energy of carbon monoxide to a Pt(111) surface was computed via density functional theory to change 24 kJ mol –1 (0.25 eV), which was consistent with the range of carbon monoxide binding energies determined from temperature-programmed desorption (ΔBE CO of 20 ± 1 kJ mol –1 or 0.19 eV) and equilibrium surface coverage measurements (ΔBE CO of 14 ± 1 kJ mol –1 or 0.14 eV). Impedance spectroscopy indicated that Pt/graphene condensers with potentials oscillating at 3000 Hz exhibited negligible loss in capacitance and charge accumulation, enabling programmable surface conditions at amplitudes and frequencies necessary to achieve catalytic resonance.

Inorganic carbon compounds↗

Electrolytically Assisted Surface Decontamination (EASD{sup TM}) for POCO Operations - 20282

NNL in collaboration with C-Tech Innovation Ltd and Sellafield Ltd has been exploring innovative technologies to enable a significant reduction of radiological hazards within facilities during the Post Operational Clean Out (POCO) phase of a nuclear plant's life cycle. Reducing the hazard by effectively decontaminating plants in-situ during POCO delivers huge cost reductions for future decommissioning operations. These cost reduction benefits are realized by reducing the number and complexity of remote operations as well as lowering the long-term waste disposal costs. Whilst chemical decontamination can achieve the desired level of decontamination, applying aggressive chemical reagents is hazardous, potentially difficult to control and requires there to be complimentary effluent treatment and waste routes. This work has aimed to develop flexible and controllable decontamination processes which could be operated without the additional complexity and issues associated with chemical decontamination. The processes needed to be relatively fast and effective to minimize the time operators would spend in an active area. In addition, there was a driver to produce decontamination methodologies which generated a secondary waste compatible with current routes and which takes advantage of current waste capacity. The strategy therefore was to come up with a solution that works with, rather than against, the science and engineering behind process plants at Sellafield. Electrolytically Assisted Surface Decontamination (EASD{sup TM}) is an innovative electrochemical decontamination process (developed by NNL and C-Tech Innovation Ltd) that can remove activity from contaminated metal in very short time periods. Application of the patented electric waveform to the surface when treating contaminated metal with nitric acid has been shown to significantly enhance the decontamination performance. When compared to proposed baseline washout procedures at Sellafield, the only change to the process is the applied electrical waveform which is temporary and controllable. The current causes dissolution of the metal surface being decontaminated which leads to activity transferring from the plant item into the nitric acid effluent stream. This innovation has the potential to transform the POCO process and allow a nitric acid based washout approach to deliver POCO quickly and cost effectively within the existing infrastructure. Several devices have now been designed that incorporate this EASD{sup TM} technology and enable the decontamination process to be applied to a range items commonly identified as being contaminated during nuclear decommissioning programmes such as pipework, tanks and hotspots of walls/floors. Inactive and active laboratory-scale testing has been completed using both simulated and 'real-life' contaminated (low level waste) metallic items retrieved from different nuclear sites. Active trials demonstrated that contaminated items could be treated to free release levels within minutes. Engineering scale tests are currently being performed, with guidance from Sellafield's system engineers and plant managers, to provide the necessary re-assurance the designed devices could be successfully deployed in an on-plant scenario. The final stage of this development work is to carry out an active demonstration of the decontamination technology on Thorp at Sellafield. This paper aims to highlight progress made to date with the EASD{sup TM} technology and, more specifically, the development of an in-situ decontamination device for deployment within radioactive pipework. (authors)

12 MANAGEMENT OF RADIOACTIVE AND NON-RADIOACTIVE W↗

Quantum criticality using a superconducting quantum processor

Quantum criticality emerges from the collective behavior of many interacting quantum particles, often at the transition between different phases of matter. It is one of the cornerstones of condensed matter physics, which we access on noisy intermediate-scale (NISQ) quantum devices by leveraging a dynamically driven phenomenon. Here we probe the critical properties of the one-dimensional quantum Ising model on a programmable superconducting quantum chip via a Kibble-Zurek process, obtain scaling laws, and estimate critical exponents despite inherent sources of errors on the hardware. In addition, we investigate how the improvement of NISQ computers (more qubits, less noise) will consolidate the computation of those universal physical properties. A one-parameter noise model captures the effect of imperfections and reproduces the experimental data. Its systematic study reveals that the noise, analogously to temperature, induces a new length scale in the system. We introduce and successfully verify modified scaling laws, directly accounting for the noise without any prior knowledge. It makes data analyses for extracting physical properties transparent to noise. By understanding how imperfect quantum hardware modifies the genuine properties of quantum states of matter, we enhance the power of NISQ processors considerably for addressing quantum criticality and potentially other phenomena and algorithms.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Some queuing network models of computer systems

Queuing network models of a computer system operating with a single workload type are presented. Program algorithms are adapted for use on the Texas Instruments SR-52 programmable calculator. By slightly altering the algorithm to process the G and H matrices row by row instead of column by column, six devices and an unlimited job/terminal population could be handled on the SR-52. Techniques are also introduced for handling a simple load dependent server and for studying interactive systems with fixed multiprogramming limits.

Herndon, E. S.↗

Low Power Transceiver

One of the FREESTAR experiments, the Low Power Transceiver (LPT) experiment is a low-power, lightweight software programmable transceiver prototype technology demonstration that is being developed by NASA as a low-cost S-band spacecraft navigation and communication device. The LPT prototype receives Global Positioning System (GPS) satellite signals for spacecraft navigation support and provides both forward and return, low-rate data communications links to the Merritt Island (MILA) and Dryden Flight Research Facility (DFRC) ground stations and to the Tracking and Data Relay Satellite System (TDRSS). The experiment is designed to demonstrate the system's ability to do simultaneous communications and navigation, as well as multi-mode communications and reconfiguration. LPT is managed by NASA's Goddard Space Flight Center and sponsored by NASA/HQ Code M. The LPT experiment consists of one thermally conductive box containing the electronics stack, three S-band antennas and one L-band antenna. The LPT payload uses general Orbiter services, including power control, command, and telemetry provided through the HHC avionics. On-orbit, the LPT payload will be primarily operated via direct communications between LPT and ground stations (MILA, WLPS, or DFRC) and/or TDRSS, with backup command and telemetry capability provided via the hitchhiker avionics and remote Payload Operations Control Center. During operations, LPT will utilize high Sband frequencies for communications. The LPT TDRSS (and GN) forward link (uplink) frequency is 2106.40625 MHz and their TDRSS (and GN) return link (downlink) frequency is 2287.5 MHz (utilizing Left-handed Circular Polarization to work with the TDRSS MA system). Two standard switch panel switches will be utilized to prohibit inadvertent operation of the antenna. An additional inhibit will be provided through the HH avionics power relay to the LPT.

Source record↗

Dynamometer Facts

The National Renewable Energy Laboratory's (NREL's) Flatirons Campus features two dynamometers in the Water Power Systems Laboratory that can perform research validation on marine and hydrokinetic energy devices as well as wind turbine systems from 100 watts to 15 kilowatts (kW) in size. These capabilities can also be combined with programmable loads, blue economy (nrel.gov/water/powering-blue- economy.html) application simulators, and microgrid emulators to test an extensive range of system operation and technology integration. The dynamometers replicate realistic operational conditions to assess power take-of systems and advance the technical readiness of innovations.

dynomometer↗

Innovations in Sensors and Controls for Building Energy Management: Research and Development Opportunities Report for Emerging Technologies

Sensors, actuators, and controllers, which collectively serve as the backbone of cyberphysical systems for building energy management, are one of the core technical areas of investment for achieving the U.S. Department of Energy (DOE) Building Technologies Office's (BTO's) goals for energy affordability in the national building stock - both commercial and residential. In fact, an aggregated annual energy savings of 29% is estimated in the commercial sector alone through the implementation of efficiency measures using current state-of-the-art sensors and controls to retune buildings by optimizing programmable settings based on occupant schedules and comfort requirements, as well as detecting and diagnosing equipment operation and installation problems (Fernandez et al. 2017). Monitoring and control of building conditions and operations has advanced significantly, from the invention of the modern thermostat just before the start of the 20th century to the midcentury incorporation of direct digital control into devices, the introduction of open protocols and network communications at the end of the century, and finally the invention of cloud-based computing and additional advancements that have enabled remote operation and a proliferation of connected and intelligent devices in building automation. Despite this potential, however, two main challenges hinder widespread adoption of sensors and controls in building operations that can ensure savings for high-efficiency components and equipment (e.g., heat pumps, windows, and lighting devices), as well as additional savings from more sophisticated control architectures and algorithms. energy savings of 29% is estimated in the commercial sector alone through the implementation of efficiency measures using current state-of-the-art sensors and controls to retune buildings by optimizing programmable settings based on occupant schedules and comfort requirements, as well as detecting and diagnosing equipment operation and installation problems (Fernandez et al. 2017). Monitoring and control of building conditions and operations has advanced significantly, from the invention of the modern thermostat just before the start of the 20th century to the midcentury incorporation of direct digital control into devices, the introduction of open protocols and network communications at the end of the century, and finally the invention of cloud-based computing and additional advancements that have enabled remote operation and a proliferation of connected and intelligent devices in building automation. Despite this potential, however, two main challenges hinder widespread adoption of sensors and controls in building operations that can ensure savings for high-efficiency components and equipment (e.g., heat pumps, windows, and lighting devices), as well as additional savings from more sophisticated control architectures and algorithms.

32 ENERGY CONSERVATION, CONSUMPTION, AND UTILIZATI↗

OpenABLext: An automatic code generation framework for agent-based simulations on CPU-GPU-FPGA heterogeneous platforms

The execution of agent-based simulations (ABSs) on hardware accelerator devices such as graphics processing units (GPUs) has been shown to offer great performance potentials. However, in heterogeneous hardware environments, it can become increasingly difficult to find viable partitions of the simulation and provide implementations for different hardware devices. To automate this process, we present OpenABLext, an extension to OpenABL, a model specification language for ABSs. By providing a device-aware OpenCL backend, OpenABLext enables the co-execution of ABS on heterogeneous hardware platforms consisting of central processing units, GPUs, and field programmable gate arrays (FPGAs).We present a novel online dispatching method that efficiently profiles partitions of the simulation during run-time to optimize the hardware assignment while using the profiling results to advance the simulation itself. In addition, OpenABLext features automated conflict resolution based on user-specified rules, supports graph-based simulation spaces, and utilizes an efficient neighbor search algorithm. We show the improved performance of OpenABLext and demonstrate the potential of FPGAs in the context of ABS. We illustrate how co-execution can be used to further lower execution times. OpenABLext can be seen as an enabler to tap the computing power of heterogeneous hardware platforms for ABS.

97 MATHEMATICS AND COMPUTING↗

Acoustic charge transport technology investigation for advanced development transponder

Acoustic charge transport (ACT) technology has provided a basis for a new family of analog signal processors, including a programmable transversal filter (PTF). Through monolithic integration of ACT delay lines with GaAs metal semiconductor field effect transistor (MESFET) digital memory and controllers, these devices significantly extend the performance of PTF's. This article introduces the basic operation of these devices and summarizes their present and future specifications. The production and testing of these devices indicate that this new technology is a promising one for future space applications.

Kayalar, S.↗

Design of a Ferroelectric Programmable Logic Gate Array

A programmable logic gate array has been designed utilizing ferroelectric field effect transistors. The design has only a small number of gates, but this could be scaled up to a more useful size. Using FFET's in a logic array gives several advantages. First, it allows real-time programmability to the array to give high speed reconfiguration. It also allows the array to be configured nearly an unlimited number of times, unlike a FLASH FPGA. Finally, the Ferroelectric Programmable Logic Gate Array (FPLGA) can be implemented using a smaller number of transistors because of the inherent logic characteristics of an FFET. The device was only designed and modeled using Spice models of the circuit, including the FFET. The actual device was not produced. The design consists of a small array of NAND and NOR logic gates. Other gates could easily be produced. They are linked by FFET's that control the logic flow. Timing and logic tables have been produced showing the array can produce a variety of logic combinations at a real time usable speed. This device could be a prototype for a device that could be put into imbedded systems that need the high speed of hardware implementation of logic and the complexity to need to change the logic algorithm. Because of the non-volatile nature of the FFET, it would also be useful in situations that needed to program a logic array once and use it repeatedly after the power has been shut off.

MacLeod, Todd C.↗

G(sup 4)FET Implementations of Some Logic Circuits

Some logic circuits have been built and demonstrated to work substantially as intended, all as part of a continuing effort to exploit the high degrees of design flexibility and functionality of the electronic devices known as G(sup 4)FETs and described below. These logic circuits are intended to serve as prototypes of more complex advanced programmable-logicdevice-type integrated circuits, including field-programmable gate arrays (FPGAs). In comparison with prior FPGAs, these advanced FPGAs could be much more efficient because the functionality of G(sup 4)FETs is such that fewer discrete components are needed to perform a given logic function in G(sup 4)FET circuitry than are needed perform the same logic function in conventional transistor-based circuitry. The underlying concept of using G(sup 4)FETs as building blocks of programmable logic circuitry was also described, from a different perspective, in G(sup 4)FETs as Universal and Programmable Logic Gates (NPO-41698), NASA Tech Briefs, Vol. 31, No. 7 (July 2007), page 44. A G(sup 4)FET can be characterized as an accumulation-mode silicon-on-insulator (SOI) metal oxide/semiconductor field-effect transistor (MOSFET) featuring two junction field-effect transistor (JFET) gates. The structure of a G(sup 4)FET (see Figure 1) is the same as that of a p-channel inversion-mode SOI MOSFET with two body contacts on each side of the channel. The top gate (G1), the substrate emulating a back gate (G2), and the junction gates (JG1 and JG2) can be biased independently of each other and, hence, each can be used to independently control some aspects of the conduction characteristics of the transistor. The independence of the actions of the four gates is what affords the enhanced functionality and design flexibility of G(sup 4)FETs. The present G(sup 4)FET logic circuits include an adjustable-threshold inverter, a real-time-reconfigurable logic gate, and a dynamic random-access memory (DRAM) cell (see Figure 2). The configuration of the adjustable-threshold inverter is similar to that of an ordinary complementary metal oxide semiconductor (CMOS) inverter except that an NMOSFET (a MOSFET having an n-doped channel and a p-doped Si substrate) is replaced by an n-channel G(sup 4)FET

Mojarradi, Mohammad↗

Testing of A Photon-Counting Optical Ground Receiver With Emulated Space-to-Ground Link Effects

The National Aeronautics and Space Administration (NASA) Glenn Research Center (GRC) developed and previously characterized a photon-counting optical ground receiver system. The receiver is compliant with the Consultative Committee for Space Data Systems (CCSDS) Optical Communications Coding and Synchronization High Photon Efficiency (HPE) Standard. The standard will be used on the Optical Artemis-2 Orion (O2O) communications demonstration and the Deep Space Optical Communication (DSOC) project aboard the Psyche spacecraft. The receiver system consists of a fiber interconnect, up to sixteen superconducting nanowire single-photon detectors (SNSPDs), and a field programmable gate array (FPGA) based receive modem. Previously, the receiver system architecture was described and test results without emulated link effects were presented. SNSPD device properties, which impact detection jitter and time delay, can limit the receiver dynamic range, especially when operating with varying flux rates (>10 dB) between detectors. Codeword error-rate curves with and without simulated clock drifts attributed to Doppler shift and space transmitter clock differences are presented. Results with ±66 ppm clock differences show minimal performance impact (<0.2 dB). Test results show that the receiver dynamic range (>28 dB) is limited by changing SNSPD detection delays at high photon flux rates.

optical communications↗

Testing of A Photon-Counting Optical Ground Receiver With Emulated Space-to-Ground Link Effects

The National Aeronautics and Space Administration (NASA) Glenn Research Center (GRC) developed and previously characterized a photon-counting optical ground receiver system. The receiver is compliant with the Consultative Committee for Space Data Systems (CCSDS) Optical Communications Coding and Synchronization High Photon Efficiency (HPE) Standard. The standard will be used on the Optical Artemis-2 Orion (O2O) communications demonstration and the Deep Space Optical Communication (DSOC) project aboard the Psyche spacecraft. The receiver system consists of a fiber interconnect, up to sixteen superconducting nanowire single-photon detectors (SNSPDs), and a field programmable gate array (FPGA) based receive modem. Previously, the receiver system architecture was described and test results without emulated link effects were presented. SNSPD device properties, which impact detection jitter and time delay, can limit the receiver dynamic range, especially when operating with varying flux rates (>10 dB) between detectors. Codeword error-rate curves with and without simulated clock drifts attributed to Doppler shift and space transmitter clock differences are presented. Results with ±66 ppm clock differences show minimal performance impact (<0.2 dB). Test results show that the receiver dynamic range (>28 dB) is limited by changing SNSPD detection delays at high photon flux rates.

optical communications↗

Electrically reconfigurable logic array

To compose the complicated systems using algorithmically specialized logic circuits or processors, one solution is to perform relational computations such as union, division and intersection directly on hardware. These relations can be pipelined efficiently on a network of processors having an array configuration. These processors can be designed and implemented with a few simple cells. In order to determine the state-of-the-art in Electrically Reconfigurable Logic Array (ERLA), a survey of the available programmable logic array (PLA) and the logic circuit elements used in such arrays was conducted. Based on this survey some recommendations are made for ERLA devices.

Agarwal, R. K.↗

Development of visual 3D virtual environment for control software

Virtual environments for software visualization may enable complex programs to be created and maintained. A typical application might be for control of regional electric power systems. As these encompass broader computer networks than ever, construction of such systems becomes very difficult. Conventional text-oriented environments are useful in programming individual processors. However, they are obviously insufficient to program a large and complicated system, that includes large numbers of computers connected to each other; such programming is called 'programming in the large.' As a solution for this problem, the authors are developing a graphic programming environment wherein one can visualize complicated software in virtual 3D world. One of the major features of the environment is the 3D representation of concurrent process. 3D representation is used to supply both network-wide interprocess programming capability (capability for 'programming in the large') and real-time programming capability. The authors' idea is to fuse both the block diagram (which is useful to check relationship among large number of processes or processors) and the time chart (which is useful to check precise timing for synchronization) into a single 3D space. The 3D representation gives us a capability for direct and intuitive planning or understanding of complicated relationship among many concurrent processes. To realize the 3D representation, a technology to enable easy handling of virtual 3D object is a definite necessity. Using a stereo display system and a gesture input device (VPL DataGlove), our prototype of the virtual workstation has been implemented. The workstation can supply the 'sensation' of the virtual 3D space to a programmer. Software for the 3D programming environment is implemented on the workstation. According to preliminary assessments, a 50 percent reduction of programming effort is achieved by using the virtual 3D environment. The authors expect that the 3D environment has considerable potential in the field of software engineering.

Hirose, Michitaka↗