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At least 325 records · Page 18

Topological spin memory of antiferromagnetically coupled skyrmion pairs in Co/Gd/Pt multilayers

Antiferromagnetically (AFM) coupled skyrmions offer potential advantages for spintronic devices, including reduced dipolar fields that may enable smaller skyrmion sizes and a reduction of the skyrmion Hall effect. However, the topological stability of AFM-coupled skyrmions subjected to dramatic spin deformation through low-temperature cycling has not been investigated. We report the discovery of a topological spin memory effect for AFM-coupled skyrmion pairs in [Co/Gd/Pt](10) multilayered films. Photoemission electron microscopy imaging shows that bubble skyrmions in the multilayer that are stable at room temperature evolve into complex in-plane spin textures as the temperature is lowered and reform completely when the sample is warmed back up. Simulations demonstrate that Dzyaloshinskii-Moriya interactions play a key role in this spin memory effect, and furthermore reveal that the topological charge is preserved throughout the dramatic spin texture rearrangement and recovery. These results highlight a key aspect of topological protection-the preservation of the topological properties under continuous deformation-and also provide a promising avenue for information encryption and recovery.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Kondo enabled transmutation between spinons and superconducting vortices: Origin of magnetic memory in 4 H b − TaS 2

Recent experiments [Persky , ] demonstrate a magnetic memory effect in 4 H b − TaS 2 above its superconducting transition temperature, where Abriokosov vortices are spontaneously generated by lowering the temperature at zero magnetic field after field training the normal state. Motivated by the experiment, we propose the chiral quantum spin liquid (QSL) stabilized in the constituent layers of 4 H b − TaS 2 as a mechanism. We model 4 H b − TaS 2 as coupled layers of the chiral QSL and the superconductor. Through the Kondo coupling between the localized moments and conduction electrons, there is mutual transmutation between spinons and vortices during the thermal-cycling process, which yields the magnetic memory effect observed in experiments. We also propose a mechanism to stabilize chiral and nematic superconductivity in 4 H b − TaS 2 through the Kondo coupling of conduction electrons to the chiral QSL. Our picture suggests 4 H b − TaS 2 as an exciting platform to explore the interplay between QSL and superconductivity through the Kondo effect. Published by the American Physical Society 2024

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Improving net ecosystem CO2 flux prediction using memory-based interpretable machine learning

Terrestrial ecosystems play a central role in the global carbon cycle and affect climate change. However, our predictive understanding of these systems is still limited due to their complexity and uncertainty about how key drivers and their legacy effects influence carbon fluxes. Here, we propose an interpretable Long Short-Term Memory (iLSTM) network for predicting net ecosystem CO 2 exchange (NEE) and interpreting the influence on the NEE prediction from environmental drivers and their memory effects. We consider five drivers and apply the method to three forest sites in the United States. Besides performing the prediction in each site, we also conduct transfer learning by using the iLSTM model trained in one site to predict at other sites. Results show that the iLSTM model produces good NEE predictions for all three sites and, more importantly, it provides reasonable interpretations on the input driver's importance as well as their temporal importance on the NEE prediction. Additionally, the iLSTM model demonstrates good across-site transferability in terms of both prediction accuracy and interpretability. The transferability can improve the NEE prediction in unobserved forest sites, and the interpretability advances our predictive understanding and guides process-based model development.

Liu, Siyan↗

Distributed-Memory Parallel Symmetric Nonnegative Matrix Factorization

We develop the first distributed-memory parallel implementation of Symmetric Nonnegative Matrix Factorization (SymNMF), a key data analytics kernel for clustering and dimensionality reduction. Our implementation includes two different algorithms for SymNMF, which give comparable results in terms of time and accuracy. The first algorithm is a parallelization of an existing sequential approach that uses solvers for non symmetric NMF. The second algorithm is a novel approach based on the Gauss-Newton method. It exploits second-order information without incurring large computational and memory costs. We evaluate the scalability of our algorithms on the Summit system at Oak Ridge National Laboratory, scaling up to 128 nodes (4,096 cores) with 70% efficiency. Additionally, we demonstrate our software on an image segmentation task.

Eswar, Srinivas↗

Amorphous Indium Oxide Channel FEFETs With Write Voltage of 0.9 V and Endurance >10 12 for Refresh-Free Embedded Memory

This work presents, for the first time, a back-end-of-the-line (BEOL)-compatible W-doped indium oxide (IWO) ferroelectric field-effect transistor (FEFET) with a record-low operating voltage below 0.9 V and a write speed of 20 ns while achieving a transient read current window (CW) ratio ( I LVT /I HVT ) greater than 10 4 . The device also exhibits exceptional reliability characteristics such as: 1) measured bipolar write endurance up to 10 12 cycles; 2) a fast read speed of 50 ns; 3) read endurance surpassing 10 12 cycles; and 4) retention exceeding 10 4 s at 85 ∘ C. Furthermore, a physics-based numerical model has been developed to investigate the nanoscale characteristics of BEOL FEFET devices, leveraging nucleation-limited switching in HfO 2 ferroelectrics and dc characterization to extract material and channel parameters for accurate device simulation. The simulation uncovers the stochastic switching behavior of BEOL amorphous oxide semiconductor (AOS) FEFETs and demonstrates an intrinsic switching time as low as 1 ps, highlighting the potential of BEOL AOS FEFETs for ultrafast memory applications. These results establish AOS FEFETs as a compelling candidate for high-density embedded memory applications for last-level cache (LLC) (L4) in advanced CMOS technology nodes.

1-V ferroelectric field-effect transistor (FEFET)↗

Ultrafast high-endurance memory based on sliding ferroelectrics

The persistence of voltage-switchable collective electronic phenomena down to the atomic scale has extensive implications for area- and energy-efficient electronics, especially in emerging nonvolatile memory technology. We investigate the performance of a ferroelectric field-effect transistor (FeFET) based on sliding ferroelectricity in bilayer boron nitride at room temperature. Sliding ferroelectricity represents a different form of atomically thin two-dimensional (2D) ferroelectrics, characterized by the switching of out-of-plane polarization through interlayer sliding motion. We examined the FeFET device employing monolayer graphene as the channel layer, which demonstrated ultrafast switching speeds on the nanosecond scale and high endurance exceeding 10 11 switching cycles, comparable to state-of-the-art FeFET devices. These characteristics highlight the potential of 2D sliding ferroelectrics for inspiring next-generation nonvolatile memory technology.

Science & Technology - Other Topics↗

Randomized Sketching Algorithms for Low-Memory Dynamic Optimization

This paper develops a novel limited-memory method to solve dynamic optimization problems. The memory requirements for such problems often present a major obstacle, particularly for problems with PDE constraints such as optimal flow control, full waveform inversion, and optical tomography. In these problems, PDE constraints uniquely determine the state of a physical system for a given control; the goal is to find the value of the control that minimizes an objective. While the control is often low dimensional, the state is typically more expensive to store. This paper suggests using randomized matrix approximation to compress the state as it is generated and shows how to use the compressed state to reliably solve the original dynamic optimization problem. Concretely, the compressed state is used to compute approximate gradients and to apply the Hessian to vectors. The approximation error in these quantities is controlled by the target rank of the sketch. This approximate first- and second-order information can readily be used in any optimization algorithm. As an example, we develop a sketched trust-region method that adaptively chooses the target rank using a posteriori error information and provably converges to a stationary point of the original problem. Numerical experiments with the sketched trust-region method show promising performance on challenging problems such as the optimal control of an advection-reaction-diffusion equation and the optimal control of fluid flow past a cylinder.

97 MATHEMATICS AND COMPUTING↗

CoREC: Scalable and Resilient In-memory Data Staging for In-situ Workflows

The dramatic increase in the scale of current and planned high-end HPC systems is leading new challenges, such as the growing costs of data movement and IO, and the reduced mean time between failures (MTBF) of system components. In-situ workflows, i.e., executing the entire application workflows on the HPC system, have emerged as an attractive approach to address data-related challenges by moving computations closer to the data, and staging-based frameworks have been effectively used to support in-situ workflows at scale. However, the resilience of these staging-based solutions has not been addressed, and they remain susceptible to expensive data failures. Furthermore, naive use of data resilience techniques such as n-way replication and erasure codes can impact latency and/or result in significant storage overheads. In this article, we present CoREC, a scalable and resilient in-memory data staging runtime for large-scale in-situ workflows. CoREC uses a novel hybrid approach that combines dynamic replication with erasure coding based on data access patterns. It also leverages multiple levels of replications and erasure coding to support diverse data resiliency requirements. Furthermore, the article presents optimizations for load balancing and conflict-avoiding encoding, and a low overhead, lazy data recovery scheme. We have implemented the CoREC runtime and have deployed with the DataSpaces staging service on leadership class computing machines and present an experimental evaluation in the article. Here, the experiments demonstrate that CoREC can tolerate in-memory data failures while maintaining low latency and sustaining high overall storage efficiency at large scales.

97 MATHEMATICS AND COMPUTING↗

Timely Reporting of Heavy Hitters Using External Memory

Given an input stream S of size N, a Φ-heavy hitter is an item that occurs at least ΦN times in S. The problem of finding heavy-hitters is extensively studied in the database literature. In this work, we study a real-time heavy-hitters variant in which an element must be reported shortly after we see its T = Φ N-th occurrence (and hence it becomes a heavy hitter). We call this the Timely Event Detection (TED) Problem. The TED problem models the needs of many real-world monitoring systems, which demand accurate (i.e., no false negatives) and timely reporting of all events from large, high-speed streams with a low reporting threshold (high sensitivity). Like the classic heavy-hitters problem, solving the TED problem without false-positives requires large space (Ω (N) words). Thus in-RAM heavy-hitters algorithms typically sacrifice accuracy (i.e., allow false positives), sensitivity, or timeliness (i.e., use multiple passes). We show how to adapt heavy-hitters algorithms to external memory to solve the TED problem on large high-speed streams while guaranteeing accuracy, sensitivity, and timeliness. Our data structures are limited only by I/O-bandwidth (not latency) and support a tunable tradeoff between reporting delay and I/O overhead. With a small bounded reporting delay, our algorithms incur only a logarithmic I/O overhead. We implement and validate our data structures empirically using the Firehose streaming benchmark. Multi-threaded versions of our structures can scale to process 11M observations per second before becoming CPU bound. In comparison, a naive adaptation of the standard heavy-hitters algorithm to external memory would be limited by the storage device’s random I/O throughput, i.e., ≈100K observations per second.

97 MATHEMATICS AND COMPUTING↗

Synchronization for CXL Based Memory

Compute Express Link (CXL) is an important emerging standard for disaggregated memory. While this standard provisions coherency across numerous hosts and devices, implementing hardware support for type three devices is challenging. In this work, we look at the overhead of software synchronization and using software-based coherency. Moreover, we discuss the limits of software-based coherency in fully expressing modern synchronization techniques for a CXL-based disaggregate memory system. We demonstrate our approach using a CXL hardware prototype and running a version of the famous Peterson Lock (enhanced to run with more than two threads). We analyze its performance and share how more advanced synchronization techniques might interact with software-based coherence CXL hardware and program execution models.

High Performance Computing (HPC)↗

Studying CPU and memory utilization of applications on Fujitsu A64FX and Nvidia Grace Superchip

ARM-based manycore CPU architectures are well-positioned to provide the rising memory throughput requirements of modern data intensive scientific applications in High Performance Computing (HPC). The Fujitsu A64FX CPU platform is based on the ARM v8.2A architecture, and is the processor of the flagship Japanese supercomputer - "Fugaku", which was previously ranked as the #1 supercomputer in the world according to the Top500 list. The Nvidia Grace superchip features 144 Neoverse V2 cores based on the ARMv9 architecture with 4x128b SVE2, providing exceptional computational power. The chip supports up to 480GB of memory, making it ideal for AI, machine learning, and scientific computing workloads. In this paper, we conduct a thorough performance exploration of a variety of parallel bandwidth-sensitive benchmarks and applications compiled with the native Fujitsu compiler on a Fugaku A64FX compute node and ARM (LLVM) Compiler on an NVIDIA Grace superchip compute node, engaging all the computational cores per cluster using OpenMP multithreading (assuming the cores can drive the available bandwidth). Our ultimate goals are to study the resource utilization of scientific applications and benchmarks on A64FX and Grace superchip, considering graph application scenarios ( GAP Benchmark suite) and eleven appli- cation proxies from the Rodinia heterogeneous benchmark suite (considering domains such as Data Mining, Bioinformatics, Fluid Dynamics, Pattern Recognition, etc.). Through exhaustive performance monitoring, we quantify the resource utilization of diverse OpenMP-based HPC applications on both the Fujitsu A64FX and the Nvidia Grace Superchip platforms.

benchmarking, Performance Analysis, High performan↗

Memory Analysis Tool

This tool traces all memory accesses to stack (static allocation) and heap (dynamic allocation) on a trace run in a particular hardware and then estimates execution time on given arbitrary hardware configurations for hardware design space exploration. It can also compute memory access statistics, such as reuse distance.

Sato, Kento↗

High-temperature superelasticity in NiTiPt and NiTiPd shape memory alloys

Alloying NiTi shape memory alloys with sufficient Pt and Pd at the expense of Ni has been shown to increase transformation temperatures well above those possible with the binary composition, enabling consideration of a new class of high-temperature mechanical sensors and actuators. To achieve shape memory behavior at temperatures greater than 200 °C, previous studies of NiTiPt and NiTiPd compositions have focused primarily on alloys with greater than 16 at.% Pt and 25 at.% Pd. While generally not the focus, none of these previous studies demonstrated superelastic behavior at high temperatures. In an effort to identify alloys that transform to austenite at approximately 200 °C and exhibit superelastic behavior with recoverable strains greater than 2%, a series of Ti-rich NiTiPt ternary alloys with 15.5–16.5 at.% Pt, and Ti-rich NiTiPd ternary alloys with 25–26 at.% Pd have been targeted. The polycrystalline alloys were processed via arc melting followed by homogenization heat treatment. Thermomechanical properties were measured using electro-discharge machined tension test coupons and a miniature load frame equipped with a clamshell furnace. Ultimately, superelasticity in uniaxial tension with clear plateau regions was demonstrated and characterized in these alloys at temperatures between 219 °C and 270 °C.

Massad, Jordan E.↗

Memory and CPU efficient coherent mode decomposition of partially coherent synchrotron radiation with subtraction of common quadratic phase terms

Application examples of a memory and CPU efficient coherent mode decomposition (CMD) method for wave-optics based simulation of the partially coherent undulator radiation propagation through a hard X-ray beamline in a 3rd generation synchrotron radiation source are presented. The high efficiency of the method is achieved thanks to the analytical treatment of the common quadratic phase terms that are developed in the phase of cross-spectral density (CSD) of partially coherent radiation at a distance from source. This treatment allows for a considerable, several orders of magnitude, reduction of the 4D CSD mesh density (and the memory occupied by the CSD) required for ensuring sufficient accuracies of wavefront propagation simulations with the modes produced by the CMD at a beamline entrance. This method, implemented in the “Synchrotron Radiation Workshop” open-source software, dramatically increases the feasibility of the CMD of 4D CSD for producing 2D coherent modes for a large variety of applications at storage rings and other types of radiation sources.

36 MATERIALS SCIENCE↗

Unified Memory: GPGPU-Sim/UVM Smart Integration

CPU/GPU heterogeneous compute platforms are an ubiquitous element in computing and a programming model specified for this heterogeneous computing model is important for both performance and programmability. A programming model that exposes the shared, unified, address space between the heterogeneous units is a necessary step in this direction as it removes the burden of explicit data movement from the programmer while maintaining performance. GPU vendors, such as AMD and NVIDIA, have released software-managed runtimes that can provide programmers the illusion of unified CPU and GPU memory by automatically migrating data in and out of the GPU memory. However, this runtime support is not included in GPGPU-Sim, a commonly used framework that models the features of a modern graphics processor that are relevant to non-graphics applications. UVM Smart was developed, which extended GPGPU-Sim 3.x to in- corporate the modeling of on-demand pageing and data migration through the runtime. This report discusses the integration of UVM Smart and GPGPU-Sim 4.0 and the modifications to improve simulation performance and accuracy.

97 MATHEMATICS AND COMPUTING↗

Controlling reversible phase transitions in rare-earth nickelates for novel memory devices

Resistive switching in correlated complex oxides is lucrative for emerging applications in neuromorphic computing, and densely scaled non-volatile memory. Electrical conductance of such complex oxides can be controllable switched across multiple orders of magnitude by either (a) electroforming a conduction channel (e.g., in tungsten oxide), or (b) inducing Mott-Hubbard transition (e.g., in rare-earth nickelates)– both via controlled migration of defects (such as oxygen vacancies) under applied bias. Nevertheless, the promise of such defect-driven electronic transitions are far from realized due to a lack of fundamental understanding of the atomic-scale processes that underlie migration and spatiotemporal evolution of oxygen vacancies over nano-to-mesoscopic length/timescales under applied electric field. In this project, we employ a synergistic integration of density functional theory (DFT) calculations, ab initio/classical molecular dynamics (AIMD/CMD) simulations, machine learning (ML), precision synthesis, and multi-modal X-ray imaging experiments to address this knowledge gap. Such an integrated approach offers to elucidate the correlations between subtle structural distortion and oxidation states; treat localized charge carriers; describe defect/ion transport in the presence of electric field; and, in turn, greatly advance the current understanding of microstructural evolution in complex oxides under applied bias. The fundamental knowledge gained from this work will enable precise control over hierarchical defect structures and unravel new routes to manipulate resistance states in complex oxides. This, in turn, will accelerate design of novel devices with desired set of neural functionalities, and high-speed densely-scaled resistive random access memory technologies.

36 MATERIALS SCIENCE↗

Multifunctional Fiber-Reinforced Polymer Composites for Damage Detection and Memory

Self-structural health monitoring (SHM) functionalities for fiber-reinforced polymer composites have become highly sought after to ensure the structural safety of newly advancing components in the automotive, civil, mechanical, and aerospace industries. This paper introduces a self-damage detection and memory (SDDM) hybrid composite material, where the structural carbon fiber tow is transformed into a piezoresistive sensor network, and the structural glass fiber operates as electrical insulation. In this study, SDDM specimens were fabricated, and tensile and impact tests were performed. The tensile tests of SDDM specimens find two distinct loading peaks: first where the carbon fiber fails, and second where the glass fiber fails. A linear correlation was observed between the carbon fiber resistance and composite strain up to a threshold, beyond which a sharp nonlinear increase in resistance occurred. The resistance then approached infinity, coinciding with the first loading peak and failure of the carbon fiber elements. This demonstrates the potential for a damage early warning threshold. Additionally, the effect of stitching the sensor tow in a zig-zag pattern over a large area was investigated using tailored fiber placement (TFP) of 1-loop, 3-loop, and 5-loop specimens. Tensile testing found that increasing the number of loops improved the sensor’s accuracy for strain sensing. Furthermore, impact tests were conducted, and as the impact energy progressively increased, the sensor resistance permanently increased. This illustrates a capability for self-memory of microdamage throughout the life cycle of the structure, potentially useful for predicting the remaining life of the composite.

Demo, Luke B. (ORCID:0000000208806522)↗

HAMR - Heterogeneous Accelerator Memory Resource (HAMR) v1.0

HAMR is a library defining an accelerator technology agnostic memory model that bridges between accelerator technologies (CUDA, HIP, ROCm, OpenMP, Sycl, OpenCL, Kokos, etc) and traditional CPUs in heterogeneous computing environments. HAMR is light weight and implemented in modern C++. HAMR can be used to manage memory with in a single code or as a data model for coupling codes in a technologically agnostic way. HAMR provides a Python module for coupling C++ and Python codes which implements zero-copy data transfers to and from Python using the Numpy array interface and Numba CUDA array interface protocols.

Loring, Burlen↗