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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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319 records · Page 18

A Voltage Injection-Based Current Harmonics Suppression Strategy for Six-Phase PMSM With Nonsinusoidal Back EMF

This article presents a voltage injection-based current harmonic minimization method for wide bandgap device-based six-phase permanent magnet synchronous machine (PMSM) drives. The presence of low-order harmonics is common in the back EMF of PMSMs with low slot and high pole numbers. The back EMF harmonics generate low-order harmonic currents that increase torque ripples. Furthermore, zero-sequence current (ZSC) is also observed if all six phases are connected to a common neutral point. ZSC does not affect the torque ripple but reduces the system efficiency. A special technique is required to reduce ZSC for variable speed drives as direct ac component to synchronous reference frame (SRF) dc transformation is not possible for ZSC. In this article, a voltage injection-based current harmonics reduction method is proposed. The injected harmonic voltage coefficients are calculated from the harmonic estimations of back EMF and updated using closed-loop harmonic compensators to improve steady-state performance. For ZSC reduction, third harmonics power controller, and for 6n ± 1 (n = 1, 2,...) order harmonic current reduction, SRF current controllers are presented in this article. Furthermore, the current harmonics minimization method is experimentally verified using a GaN-based three-level active neutral point clamped inverter-driven six-phase PMSM.

42 ENGINEERING↗

Adaptive Threshold-Based Zonal Isolation of Faults in a Multiterminal DC Using Local Measurements

Fast and accurate methods of fault detection and isolation are a pre-emptive measure in multiterminal dc (MTdc) systems. Zonal isolation of faults is necessary to prevent any misopertation of the dc breakers that can lead to a shutdown of the network. Existing techniques require fast-communication or data synchronization methods have their own disadvantages. This article proposes a method for efficient fault zone isolation without the need of a communication link that prevents any misoperation of the dc breakers in a radial MTdc. This method provides individual local measurement-based control to the hybrid dc circuit breakers (dcCB). Faults created outside the zone of protection for a breaker create a change in the rate of change of current or voltage leading to misoperation. To avoid detection using a fixed threshold, an adaptive threshold based approach is suggested that updates the threshold based on the present operating status. Sensitivity analysis by varying the current limiting inductance and fault location is performed. In conclusion, a three terminal radial model of an MTdc is used for zonal isolation using power system computer aided design/electromagnetic transients including dc.

24 POWER TRANSMISSION AND DISTRIBUTION↗

Retargetable Optimizing Compilers for Quantum Accelerators via a Multi-Level Intermediate Representation

In this work, we present a multi-level quantum-classical intermediate representation (IR) that enables an optimizing, retargetable compiler for available quantum languages. Our work builds upon the Multi-level Intermediate Representation (MLIR) framework and leverages its unique progressive lowering capabilities to map quantum languages to the LLVM machine-level IR. We provide both quantum and classical optimizations via the MLIR pattern rewriting sub-system and standard LLVM optimization passes, and demonstrate the programmability, compilation, and execution of our approach via standard benchmarks and test cases. In comparison to other standalone language and compiler efforts available today, our work results in compile times that are 1000x faster than standard Pythonic approaches, and 5-10x faster than comparative standalone quantum language compilers. Our compiler provides quantum resource optimizations via standard programming patterns that result in a 10x reduction in entangling operations, a common source of program noise. We see this work as a vehicle for rapid quantum compiler prototyping.

43 PARTICLE ACCELERATORS↗

Enhanced Performance of Dual Inverter with a Floating Capacitor for Motor Drive Applications

This paper studies a dual inverter supplied by a DC-link and a floating capacitor (FC), emerged as a promising inverter topology for motor drive applications. For this type of inverter, the voltage ratio between the DC-link and the FC can be actively controlled. This ratio design is crucial as it essentially defines both the DC-link voltage utilization and the inverter output quality. Several voltage ratios have previously been discussed to enhance the dual inverter performance, but only one aspect, either the voltage utilization or the output quality, is investigated. As a result, although one performance aspect can be improved, the other aspect has been adversely affected. In this work, a comparative study considering both aspects is carried out for all the possible voltage ratios. Based on this analysis, the optimal ratios for different inverter modulation indices are identified. This is followed by proposing a ratio selection strategy to double the voltage utilization without degrading the output quality. Furthermore, this strategy enables an electric drive to work at a higher maximum speed without flux weakening for a given DC-link voltage. The claimed advantages have been proved by experimental tests on an open-end windings induction motor drive.

42 ENGINEERING↗

Stacked Low-Inertia Converter or Solid-State Transformer: Modeling and Model Predictive Priority-Shifting Control for Voltage Balance

This paper presents control challenges of stacked low-inertia converter (SLIC) or cascaded reduced dc-link solid-state transformer (SST) and proposes a novel model predictive priority-shifting (MPPS) control with implicit modulator and a discrete-time large-signal model for voltage balancing and dc-link regulation. Low-inertia converters, featuring small electrolytic capacitor-less dc links, dramatically reduce cost, size, and weight compared to conventional solutions. However, without a large dc-link buffer, the input and output are tightly coupled, leading to significant control challenges. The control becomes even more challenging with these converters stacked input-series output-parallel (ISOP) for medium-voltage (MV) grid, which causes coupling between the modules besides the coupling within each module. This paper analyzes the multi-objective, multi-degree of freedom control problem, using the modular soft-switching solid-state transformer (M-S4T) as an example of the SLIC. First, distribution of control efforts under controller saturation is critical because multiple control objectives can be conflicting, especially when the module voltages are unbalanced and are being restored. The MPPS can shift the priorities to address this issue. Second, due to the low inertia and high dc-link ripple, classic space vector pulse-width modulation (SVPWM), average model with small-ripple assumption, and control design based on small-signal model cannot accurately modulate, model, and control the nonlinear reduced dc link. Therefore, a discrete-time large-signal model of the M-S4T is established to derive the predictive control in the MPPS. The MPPS and the PI control are compared in MV simulations to show the issue of applying the PI to the SLIC and the effectiveness of the MPPS for voltage balancing and dc-link regulation in a deadbeat manner. Finally, the proposed control is tested on a 5 kV ISOP SiC SST prototype to verify priority shifting to address controller saturation issue and fast and robust voltage balancing.

14 SOLAR ENERGY↗

Robust Predictive Control for Modular Solid-State Transformer With Reduced DC Link and Parameter Mismatch

This paper presents the analysis and implementation of a predictive control method for dc-link regulation and voltage balance in a cascaded modular reduced dc-link solid-state transformer (SST). Passive components like bulky dc links limit the power density of power converters, especially medium-voltage (MV) SST. Reduced dc-link or low-inertia converters can dramatically reduce the size, cost, and weight by tolerating larger dc-link ripples and improve the reliability with electrolytic capacitor-less dc link. However, a small dc link leads to tight coupling between the input and the output stages, which is a challenge for control design. In stacked low-inertia converters (SLIC), the low-inertia converter modules are stacked for MV applications, resulting in coupling between the modules and making the control more challenging. A new model predictive control method which can achieve deadbeat regulation on the dc link without weighting factors has been proposed to address this novel problem. This paper focuses on analyzing the condition of the low-inertia dc link up to 80% ripple, the robustness of the control under parameter mismatches, high-order terms, and important implementation issues such as model-based sampling and computation delay compensation. Significantly, the high-order terms are introduced because of the large dc-link ripple. These high-order terms are unique to the SLIC and negligible in conventional high-inertia converters. A discrete-time large-signal model is built to capture the dc-link’s nonlinear dynamics, and the eigenvalues of a small-signal Jacobian matrix are analyzed with Floquet theory to evaluate stability, using the modular soft-switching solid-state transformer (M-S4T) as an example of the SLIC. Simulation and experimental results of an MVDC M-S4T verify the analysis and the predictive control method. Finally, the general application of the predictive control to low-inertia converters is compared against a conventional PI controller using a reduced dc-link active-front-end (AFE) rectifier as an example.

14 SOLAR ENERGY↗

7.2 kV Three-Port SiC Single-Stage Current-Source Solid-State Transformer With 90 kV Lightning Protection

This article proposes a multiport modular single-stage current-source solid-state transformer (SST) for applications like photovoltaic, energy storage integration, electric vehicle fast charging, data center, etc. The 7.2 kV 50 kVA current-source SST consists of five input-series output-parallel modules, each based on 3.3 kV SiC reverse-blocking MOSFET-plus-diode modules. The proposed SST has some unique features. First, compared to the voltage-source or matrix converter-based SSTs, the current-source SST has a unique advantage of single-stage isolated AC/DC or AC/AC conversion with an inductive DC link, but no medium-voltage (MV) AC experiments have been reported. This article for the first time demonstrates MV AC current-source SST up to 7.5 kV peak. Second, the multiport SST has a buffer port for active power decoupling (APD) or energy storage integration. The double-line-frequency power ripple from single-phase AC grid normally results in a large capacitor size in MV SSTs. The APD scheme is proposed in MV applications for the first time to enable a reduced DC link and the electrolytic capacitor-less SST with high reliability. Third, as a direct grid-connected converter without line-frequency transformer, insulation and protection are critical. A medium-frequency transformer design passes 55 kV basic-insulation level (BIL) and 60 kV high potential dielectrics withstand test with only 0.09% leakage inductance. Importantly, a lightning protection scheme is presented to protect the SST itself from 90 kV BIL impulse. Fourth, the proposed current-source SST topology is a modular soft-switching solid-state transformer (M-S4T) with full-range zero-voltage switching and controlled dv/dt for low electromagnetic interference. Furthermore, these concepts are verified in a three-port M-S4T prototype with forced oil cooling under single-module, stacked-module, steady-state, and dynamic operations.

14 SOLAR ENERGY↗

Predictive Direct DC-Link Control for 7.2 kV Three-Port Low-Inertia Solid-State Transformer With Active Power Decoupling

Promising for applications including renewable energy and electric vehicle fast charging, a medium-voltage (MV) solid-state transformer (SST) typically has multiple modules series stacked, which requires the modules to be single phase. One critical issue of the single-phase SST is the double-line-frequency power ripple. Traditionally, large passives are used to buffer the ripple, resulting in significantly increased volume and cost. This article for the first time proposes active power decoupling (APD) for the SST and a predictive direct DC-link control method, using a current-source single-stage SST as an example. An electrolytic capacitor-less buffer port is used to absorb the ripple, which tolerates up to a 30% voltage ripple for small capacitance. The APD SST control is challenging. First, the current-source SST realizes isolation, DC link, and multiport in a single stage. Second, different from conventional SSTs or APD converters, the low-inertia DC link in this SST has a 40% switching ripple, which is difficult to stabilize. To address the control challenge, a direct DC-link control architecture and a predictive control method are proposed. Simulation and experimental results verify the proposed control method on an MV SiC modular soft-switching solid-state transformer (M-S4T) prototype. Here, the proposed APD reduces the SST volume by 53.8%. Importantly, the proposed concept is not limited to the M-S4T but is generic to other SSTs or APD converters.

14 SOLAR ENERGY↗

Postfault Operation of Three-Level Inverter Driven Six-Phase PMSM With Enhanced Torque–Speed Region

This article presents an open-switch postfault operational technique with enhanced torque–speed region for three-level (3L) active neutral point clamped (ANPC) inverter-driven symmetrical six-phase (SSP) permanent magnet synchronous machines (PMSMs). Maximum torque (MT), minimum loss (ML), and single three-phase (STP) operations are commonly used for the postfault operations of six-phase drives. The maximum possible torque and speed in these operations are generally limited by voltage, current ratings, and the neutral point configuration of the motor. To enhance the postfault torque and speed operating region, the torque and speed limits in different postfault operational techniques are determined based on the voltage, current constraints, and neutral point configuration of the SSP-PMSM. In this work, a unified postfault operation is proposed that increases the postfault operational limits by combining MT, ML, and STP operations and modifying the neutral point configuration of the SSP-PMSM. In addition, a technique is also presented that modifies the pulsewidth modulation technique to enable full torque operation below 0.5 p.u. speed. The proposed postfault operational technique enables full-speed (1 p.u.) operation by operating in STP mode and full torque operation (1 p.u.) below 0.5 p.u. speed. Furthermore, the postfault operational technique is experimentally validated using a Gallium Nitride (GaN) device-based3L-ANPC inverter-driven SSP-PMSM.

42 ENGINEERING↗

A Six-Phase Space Vector PWM Technique for Wide Bandgap Device-Based Three-Level Inverters

This article presents a space vector pulsewidth modulation (SVPWM) technique for wide bandgap (WBG) device-based three-level (3L) six-phase inverters. Implementation of the SVPWM techniques for any six-phase inverter is complex for its high number of possible voltage vectors. Different six-phase load configurations are also possible depending on the angle between two consecutive phases and neutral point connections. The implementation techniques change depending on the load configuration. Moreover, a common neutral point for all six phases leads to circulating currents. Capacitor voltage balancing is also needed for 3L inverters. Capacitor voltage balancing and addressing the circulating current problem further increases the implementation complexity. In this article, a generalized SVPWM technique is proposed for the six-phase 3L inverters that is implementable using two three-phase 3L SVPWM blocks. The SVPWM technique also ensures dc bus capacitor voltage balancing and minimizes circulating current. Here, the SVPWM technique is experimentally verified using a GaN-based 3L six-phase active neutral point clamped (ANPC) inverter prototype, and the results are presented in this article.

42 ENGINEERING↗

Scalable Multiphysics Block Preconditioning for Low Mach Number Compressible Resistive MHD with Application to Magnetic Confinement Fusion

This study investigates multiphysics block preconditioners that are critical in devising scalable Newton–Krylov iterative solvers for longer time-scale fully implicit fluid plasma models. The specific model of interest is the visco-resistive, low Mach number, compressible magnetohydrodynamics (MHD) model. This model describes the dynamics of conducting fluids in the presence of electromagnetic fields and can be used to study aspects of astrophysical phenomena, important science and technology applications, and basic plasma physics. The specific application of interest that motivates this study is the macroscopic simulation of longer time-scale stability and disruptions of magnetic confinement fusion devices, specifically the ITER Tokamak. The computational solution of the governing balance equations for mass, momentum, heat transfer, and magnetic induction for resistive MHD systems can be extremely challenging. These difficulties arise from both the strong nonlinear, nonsymmetric coupling of fluid and electromagnetic phenomena as well as the significant range of time and length scales that the interactions of these physical mechanisms produce. To handle the range of time and spatial scales of interest, a fully implicit unstructured variational multiscale finite element formulation is employed. For the scalable solution of the Newton linearized systems, fully coupled block preconditioners are designed to leverage algebraic multigrid subsolves. In conclusion, results are presented for the strong and weak scaling of the method as well as the robustness of these techniques for a large range of Lundquist numbers.

97 MATHEMATICS AND COMPUTING↗

A two-level GPU-accelerated incomplete LU preconditioner for general sparse linear systems

This paper presents a parallel preconditioning approach based on incomplete LU (ILU) factorizations in the framework of Domain Decomposition (DD) for general sparse linear systems. We focus on distributed memory parallel architectures, specifically, those that are equipped with graphic processing units (GPUs). In addition to block-Jacobi, we present general purpose two-level ILU Schur complement-based approaches, where different strategies are presented to solve the coarse-level reduced system. These strategies are combined with modified ILU methods in the construction of the coarse-level operator, in order to effectively remove smooth errors by targeting an algebraically smooth vector. We leverage available GPU-based sparse matrix kernels to accelerate the setup and the solve phases of the proposed ILU preconditioner. We evaluate the efficiency of the proposed methods as a smoother for algebraic multigrid (AMG) and as a preconditioner for Krylov subspace methods on challenging anisotropic diffusion problems and a collection of general sparse matrices.

97 MATHEMATICS AND COMPUTING↗

Tokamak disruption simulation

UT contribution in this Tokamak Disruption Simulation (TDS) is to develop a parallel high‐order hybridized Discontinuous Galerkin (HDG) methods for large‐s cale MHD simulations. The following are the major goals: 1) Construction of HDG methods for linearized MHD, 2) Rigorous analysis for the HDG formulations for linearized MHD, 3) 2D and 3D simulations to verify the convergent of the HDG methods for linearized MHD, 4) multigrid solvers/preconditioners for HDG formulations, 5) HDG for reconnection problems, 6) Divergence cleaning with HDG, 7) HDG formulations for nonlinear MHD, 8) Picard fixed point HDG approach, 9) IMEX HDG‐DG for nonlinear HDG; 10) parallel large‐scale HDG for linear and nonlinear MHD simulations.

70 PLASMA PHYSICS AND FUSION TECHNOLOGY↗