Engineering Papers⌕ Search

SEARCH · Engineering Papers

Results for “integrated circuits”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 325 records · Page 18

Reflective laser-based particle detector

A reflective laser-based particle detector for detecting contamination particles moving through a vacuum. Laser light is directed through a vacuum access window in the containment vessel and toward a reflective surface on an inner surface opposite the window. A photonic detector is positioned to monitor reflected laser from the opposite inner surface inside the vessel and is capable of detecting perturbations of the reflected light. The system makes use of optical interferometry techniques embodied as a photonic integrated circuit to detect the particles. The reflective laser-based system can be placed entirely outside the vacuum thereby avoiding the need for breaking the vacuum environment to check for accumulation of contaminant particles.

Xi, Wenze↗

Towards Automatic and Agile AI/ML Accelerator Design with End-to-End Synthesis

Domain-specific designs offer greater energy efficiency and performance gain than general-purpose processors. For this reason, modern system-on-chips have a significant portion of their silicon area with custom accelerators. However, designing hardware by hand is laborious and time-consuming, given the large design space and the performance, power, and area constraints that are not realized in the software. Moreover, domain-specific algorithms (e.g., machine learning models) are evolving quickly, challenging the accelerator design further. To address these issues, this paper presents SODA Synthesizer, an automated open-source high-level ML framework to Verilog modular compiler targeting AI/ML Application-Specific Integrated Circuits (ASICs) accelerators. SODA tightly couples the Multi- Level Intermediate Representation (MLIR) compiler infrastructure [24] and open-source HLS approaches. Thus, SODA can support various ML frameworks and algorithms and can perform optimizations that combine specialized architecture templates and conventional HLS to generate the hardware modules. In addition, SODA’s closed-loop design space exploration (DSE) engine allows developers to perform end-to-end design space explorations on different metrics and technology nodes.

Zhang, Jeff↗

Preventing stent failure using adaptive shear responsive endovascular implant

A stent apparatus, system, and method that senses wall shear stress by measuring fluid flow at localized areas within the stent, that processes measured information through an integrated circuit, and selectively sends power to mechanically controllable stent surfaces which results in localized geometric changes. In various embodiments the stent apparatus, system, and method sends data to outside the body in real time.

Mukerjee, Erik V.↗

Wafer-level handle replacement

A wafer includes a number of die, with each die including electronic integrated circuits and optical devices. The wafer has a top surface and a bottom surface and a base layer. The bottom surface of the wafer corresponds to a bottom surface of the base layer. A wafer support system is attached to the top surface of the wafer. A thickness of the base layer is removed to expose a target layer within the wafer and to give the wafer a new bottom surface. A replacement handle structure is attached to the new bottom surface of the wafer. The replacement handle structure includes a first thickness region and a second thickness region. The first thickness region is positioned closest to the new bottom surface. The first thickness region is formed of an optical cladding material that mitigates optical coupling between optical devices within the die and the replacement handle structure.

Meade, Roy Edward↗

Mutli-layered neutron detector

A neutron detector including a plurality of layers of converter material and a plurality of layers of detector material. Each layer of converter material can be immediately adjacent to at least one layer of detector material and each layer of detector material can be immediately adjacent to at least one layer of converter material. The neutron detector may further include a read out integrated circuit (ROIC) that is electrically coupled to the plurality of layers of detector material. A value output by the ROIC may be indicative of a neutron interacting with a layer of converter material from amongst the plurality of layers of converter material.

Rice, William Charles↗

Quantum cascade laser with monolithically integrated passive waveguide

A photonic integrated circuit device includes a passive waveguide section formed over a substrate, a quantum cascade laser (QCL) gain section formed over the substrate and adjacent to the passive waveguide section, and a taper section disposed between and in contact with each of the passive waveguide section and the QCL gain section. In some embodiments, the passive waveguide section includes a passive waveguide core layer disposed between a first cladding layer and a second cladding layer. In some examples, the QCL gain section includes a QCL active region disposed between a first confinement layer and a second confinement layer, where the QCL active region has a lower index of refraction than each of the first and second confinement layers. In some embodiments, the taper section is configured to optically couple the QCL gain section to the passive waveguide section.

Jung, Seungyong↗

Peak Prediction Using Multi Layer Perceptron (MLP) for Edge Computing ASICs Targeting Scientific Applications

High data rate detectors play an integral part in scientific research and their development is actively pursued at High Energy Physics (HEP) facilities around the world. Edge Machine Learning (ML) offers the ability to reduce data rates by integrating ML algorithms into Application Specific Integrated Circuits (ASICs) on the front end electronics. In this work, we explore a set of neural network architectures for predicting the peak amplitudes in the detector's sensor response. We have designed and synthesized several MLP based neural networks comparing their inference accuracy, power consumption, and area targeting for minimal latency. The neural networks are synthesized in a commercial 65nm process. The effect of quantizing the network's weights and biases on hardware performance and area is reported. We also conduct design space exploration to compare between design alternatives

47 OTHER INSTRUMENTATION↗

CyTRICS: Vulnerability Analysis Tailored for Critical Infrastructure

Society and modern life are dependent on critical infrastructure that is composed of expensive, special purpose devices that have long life cycles and may be in use for decades before being replaced. There are an abundance of organizations and individuals doing vulnerability analysis on a variety of systems, but what makes the Cyber Testing for Resilient Industrial Control Systems (CyTRICS) program unique and valuable is its strategic focus on high-priority critical infrastructure, close partnership with vendors, and ability to leverage bills of materials (BOMs) to identify and relate vulnerabilities to affected systems. Creating a bill of materials is a formal way of understanding and documenting the components of a system, including everything from integrated circuits to operating systems to third-party libraries. This is beneficial for connecting known vulnerabilities to affected devices, since vulnerabilities in a specific component are often not mapped to all systems that use that vulnerable component. Additionally, CyTRICS finds novel vulnerabilities through its vulnerability testing process and works closely with vendor partners to provide vulnerability reports so that affected systems can be patched in a timely manner. This presentation will describe the interrelated technical processes CyTRICS uses to create bills of materials and conduct vulnerability analysis.

99 GENERAL AND MISCELLANEOUS↗

Electrical Analysis of Pulsed Laser Annealed Poly-Si:Ga/SiOx Passivating Contacts

High-efficiency single crystalline silicon (c-Si) solar cells require precise control of dopant diffusion profiles and highly active doping concentrations through thermal annealing. Conventional furnace annealing has been successfully employed for dopant diffusion in aluminum back-surface field (Al-BSF), passivated emitter and rear contact (PERC), and Topcon cells. However, furnace annealing limits some next-generation polycrystalline silicon (poly-Si) on SiOx passivating contacts. This limitation largely affects p-type passivating contacts by not being able to: 1) control the dopant diffusion accurately to prevent B segregation at the SiOx and c-Si interface; and 2) provide highly activated doping concentrations for low contact resistivity. In this contribution, we use a nanosecond excimer laser to examine the passivation quality and electrical performance of both B- and Ga-doped poly-Si/SiOx passivating contacts. The core of this method is to take advantage of the nonequilibrium nature of the anneal through rapid melting and recrystallizing the poly-Si in a short timescale and to achieve doping concentrations above the solid solubility limit. Simulations were performed on polished surfaces to visualize the doping diffusion profiles under different laser conditions, and secondary ion mass spectrometry (SIMS) was used to verify the experimental diffusion profiles post pulsed laser melting (PLM). The results show the dopant diffusion profiles can be tuned precisely through PLM. The electrical analysis using VdP-Hall measurements reveals that the active doping concentration reached 10^21 cm-3 for B and ~2×10^21 cm-3 for Ga in poly-Si, far exceeding their solid solubility limit in Si, with a nearly 100% dopant activation achieved for B, and 20% for Ga. This highly activated dopant profile results in a low contact resistivity of <15 mO·cm^2 for B-doped contacts and <40 mO·cm^2 for Ga-doped contacts. We demonstrate that the passivation quality of the laser annealed contacts shows a linear dependency with the laser energy density and the number of pulses. PLM was also performed on random pyramid textured samples, and we found that preferential melting exists for the tips of pyramids, which can be pursued further for selective pinhole opening. Additionally, we perform thermal stability tests of these hyperdoped passivating contacts and show that under certain laser conditions, the B-doped samples exhibit good thermal stability with near full activation for temperatures up to 800°C. Lastly, we transfer this technique to a larger area by overlapping laser spots and show uniform passivation quality and electrical performance. We are currently implementing this PLM annealed p-type passivating contacts into double-side back-junction poly-Si/SiOx passivating contact devices. Our results show that PLM can not only enable the next generation of high-efficiency c-Si photovoltaics technology but can also benefit the c-Si integrated circuit industry through hyperdoping other semiconductors with atoms that may otherwise have a low solubility.

doping diffusion profile↗

In-Pixel Readout IC with compact in-pixel ADC for Pixel detectors at HL LHC

The prototype Smart Pixel concept test chip (SP28), designed in a CMOS 28 nm bulk process, is a proof of concept readout integrated circuit (ROIC) designed for a future Phase III High Luminosity upgrade of the Large Hadron Collider. It employs a synchronous analog to digital converter (ADC) for the front-end design, with signal processing and data conversion within a single bunch crossing of 25 ns. It is therefore capable of accurately detecting hits occurring in consecutive bunch crossings, without off-time registration of events and pileup insensitivity, making it particularly suitable for the inner most layers of the vertex detector. The ROIC consists of a matrix of 32 × 16 pixels, each 25 × 25 µm 2 in size. Each pixel contains a charge sensitive preamplifer with leakage current compensation, three auto-zero comparators for a 2-bit fash-type ADC. The total power consumption is approximately 5 µW per pixel. The measured noise at the output of all the hit comparators across the ROIC is < 90 e- with threshold dispersion < 45 e-RMS, which allows an in-time threshold setting of ≈ 475 e-.

Parpillon, Benjamin↗

Integrated freeform optical couplers

Reflecting light beams off of microscale three-dimensional (3D) freeform surfaces can yield highly efficient coupling into and out of optical waveguides, optical fibers, and photonic chips. The structure of the 3D freeform reflective surface determines the shape of the reflected beam. This allows freeform reflectors to control the mode profile, rotation angle, and divergence angle of light beams. Control of beam shape enables mode matching between source output mode and target input mode, which results in low-loss optical coupling. An inventive freeform reflective surface can direct light beams in plane or out of plane via specular reflection or total internal reflection. A photonic integrated circuit with this type of freeform optical coupler can operate with a bandwidth range of at least 400 nm, potentially encompassing all visible or telecommunications wavelengths, and can be volume manufactured in photonic chips.

Yu, Shaoliang↗

Gain balanced nonlinear optical interferometer

A nonlinear fiber interferometer is disclosed suitable for fiber sensor and other applications. A first nonlinear fiber section amplifies probe and conjugate sidebands of a pump through four-wave mixing. A second section introduces a phase shift to be measured, for example from a sensor. A third nonlinear fiber section amplifies with phase-sensitive gain to increase signal-to-noise ratio. Based on phase-sensitive output power of probe and/or conjugate components, the phase shift can be measured. Superior performance can be obtained by balancing gain between the (first and third) nonlinear sections. Non-fiber, for example photonic integrated circuit, embodiments are disclosed. Differential sensing, alternative detection schemes, sensing applications, associated methods, and other variations are disclosed.

Lukens, Joseph M.↗

Method and apparatus for providing thermal wear leveling

Exemplary embodiments provide thermal wear spreading among a plurality of thermal die regions in an integrated circuit or among dies by using die region wear-out data that represents a cumulative amount of time each of a number of thermal die regions in one or more dies has spent at a particular temperature level. In one example, die region wear-out data is stored in persistent memory and is accrued over a life of each respective thermal region so that a long term monitoring of temperature levels in the various die regions is used to spread thermal wear among the thermal die regions. In one example, spreading thermal wear is done by controlling task execution such as thread execution among one or more processing cores, dies and/or data access operations for a memory.

Roberts, David A.↗

Heterogeneous integration of an electro-optical platform

A hybrid photonic integrated circuit and a method of its manufacture are provided. A SiP functional layer is fabricated on an SOI wafer. A lithium niobate thin film is bonded to the SiP functional layer. The silicon handle layer is removed from the SOI wafer to expose buried oxide, and at least one III-V die is bonded to the exposed buried oxide. In embodiments, at least one waveguiding component is fabricated in the SiP functional layer. In embodiments, the SiP functional layer comprises a top waveguiding layer.

Kodigala, Ashok↗

Gain balanced nonlinear optical interferometer

A nonlinear fiber interferometer is disclosed suitable for fiber sensor and other applications. A first nonlinear fiber section amplifies probe and conjugate sidebands of a pump through four-wave mixing. A second section introduces a phase shift to be measured, for example from a sensor. A third nonlinear fiber section amplifies with phase-sensitive gain to increase signal-to-noise ratio. Based on phase-sensitive output power of probe and/or conjugate components, the phase shift can be measured. Superior performance can be obtained by balancing gain between the (first and third) nonlinear sections. Non-fiber, for example photonic integrated circuit, embodiments are disclosed. Differential sensing, alternative detection schemes, sensing applications, associated methods, and other variations are disclosed.

Lukens, Joseph M.↗

Meta-optics-based systems and methods for ocular applications

Meta-lens based ocular imaging, near-eye display, and eye-tracking systems are described. The systems can include a single focusing optic and an integrated circuit that provides illumination light and includes an imaging array. The focusing optic includes meta-atoms formed on a substrate. The systems may have no moving parts and achieve imaging or image-projection fields-of-view approaching or exceeding 180 degrees. Because of their low part count, the systems can be robust and have a very small form factor.

Hu, Juejun↗

A Real-Time ANPC Inverter Digital Twin with Integrated Design-For-Trust

The demand for renewable energy has increased over the last few years, and so has the demand for greater expectations within the energy market. This increasing trend has been accompanied by more significant usage of internet-connected devices (IoT), leading to critical electrical infrastructure being connected to the internet. Implementing internet connectivity with such devices and systems provides benefits such as improving the system's performance, facilitating irregularity and anomaly mitigation, and providing additional situational awareness for enhanced decision-making. However, enhancing the connected system with IoT introduces a drawback – a greater vulnerability to cyber-attacks. Cyber-attacks targeting critical infrastructure in the electrical sector have occurred in the United States and Ukraine. These cyber-attacks highlight and expose vulnerabilities that a system inherits when connecting to the internet. These attacks left thousands of customers without electricity for hours until operators could regain control of the electric utility grid. Therefore, to address the vulnerabilities of an internet-connected power electronic device, this work focused on the hardware layer of the system. Implementing a cyber-control system inside the hardware layer can significantly reduce the possibility of an attacker patching malicious controller firmware into a photovoltaic grid-connected inverter, thus mitigating the likelihood that the inverter becomes inactive a cyber-attack scenario. With this mitigation technique, if a cyberattack is successful and an attacker gains control of the network, a cyber-defense technique is in place to mitigate the impact of the cyber-attack. This additional protection layer was developed based on an innovative concept known as Digital Twin (DT). A DT, in this case, replicates an Active-Neutral Point Clamped (ANPC) inverter and was designed using a hardware language known as VHDL (Very High-Speed Integrated Circuit Hardware Description Language) and applied to Field-Programmable-GateArray (FPGA). The DT is embedded within the FPGA and contained in a controller board, the UCB (Unified Controller Board), developed by the University of Arkansas electrical engineering team. This UCB also contains two Digital Signal Processors (DSPs) responsible for generating associated signals to control an authentic physical inverter. These DSP signals are received and processed by the FPGA that implements the DT of an ANPC; in other words, it simulates in realtime the expected output of an actual ANPC inverter using the signals from the DSP. When a new firmware is ready to be patched, the DT provides output signals simulating behavior that a real ANPC inverter would generate with the new firmware. The new firmware is tested to check if it meets all the operational requirements established using a Design-For-Trust technique (DFTr). If the new firmware fails in at least one of the DFT tests, it is considered malicious and must be rejected. This work is divided into sections, such as Background, which explains the pieces that were used and the strategy behind this work; Process and Procedure, which explains the methodology that was adopted to prove the reliability and effectiveness of this work; Results and Discussion, where the simulations and results are described and explained; followed by Conclusion and Future work section, which concludes this work and adds possible future projects to continue this work further.

do Amaral Custodio, Paulo Vitor↗

Smart Pixels: In-pixel AI for on-sensor data filtering

We present a smart pixel prototype readout integrated circuit (ROIC) designed in CMOS 28 nm bulk process, with in-pixel implementation of an artificial intelligence (AI) / machine learning (ML) based data filtering algorithm designed as proof-of-principle for a Phase III upgrade at the Large Hadron Collider (LHC) pixel detector. The first version of the ROIC consists of two matrices of 256 smart pixels, each 25$\times$25 $\mu$m$^2$ in size. Each pixel consists of a charge-sensitive preamplifier with leakage current compensation and three auto-zero comparators for a 2-bit flash-type ADC. The frontend is capable of synchronously digitizing the sensor charge within 25 ns. Measurement results show an equivalent noise charge (ENC) of $\sim$30e$^-$ and a total dispersion of $\sim$100e$^-$ The second version of the ROIC uses a fully connected two-layer neural network (NN) to process information from a cluster of 256 pixels to determine if the pattern corresponds to highly desirable high-momentum particle tracks for selection and readout. The digital NN is embedded in-between analog signal processing regions of the 256 pixels without increasing the pixel size and is implemented as fully combinatorial digital logic to minimize power consumption and eliminate clock distribution, and is active only in the presence of an input signal. The total power consumption of the neural network is $\sim$ 300 $\mu$W. The NN performs momentum classification based on the generated cluster patterns and even with a modest momentum threshold, it is capable of 54.4% - 75.4% total data rejection, opening the possibility of using the pixel information at 40MHz for the trigger. The total power consumption of analog and digital functions per pixel is $\sim$ 6 $\mu$W per pixel, which corresponds to $\sim$ 1 W/cm$^2$ staying within the experimental constraints.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗