Results for “digital circuits designs” — Page 18

DOE OSTI2021

A custom high-stability pulse generator for the test of a novel in-situ magnetic sensor developed to detect radiation damage in undulators

High-performance analog-to-digital converters (ADC) have been widely applied in many areas of science. For instance, magnetic field measurements based on the Faraday’s induction law require high-precision voltmeters to measure induced voltages. In this study in the context of free-electron lasers technology, the Magnetic Measurements Team at SLAC National Accelerator Laboratory proposed a novel in-situ radiation damage detection system (RDDS) for detecting small field variations in undulators. The system measures the flux change in a flexible printed-circuit coil attached to the magnet array during the undulator gap movement. The gap movement changes the magnetic field, which induces a voltage signal in the coil that is measured and integrated with an ADC. Although the system is capable of detecting relative flux changes better than 100 ppm, drift in the ADC’s gain or offset can cause apparent changes in the relative flux. This paper describes the first attempt to developed a high-precision verification circuit to perform ADC testing in the framework of the novel RDDS. The circuit generates a reference voltage pulse with a voltage–time integral relative precision better than 50 ppm for a few hundreds of mVs — the typical order of magnitude measured with the RDDS. The circuit’s design combines a fast and precise switch with a low-noise voltage reference. Long-term measurements allowed statistical analysis and showed that averaging the voltage–time integral of ten pulses gives the required 50 ppm stability. Moreover, reproducibility tests confirmed that the circuit’s output is invariable under small power supply instabilities and equipment shutdown. Instruments and applications designed to quantify the magnetic field by integrating voltage signals may use the pulse generator proposed in this paper for verification purposes.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

NASA NTRS1994

A Motion-Compensating Image-Compression Scheme

Chrominance used (in addition to luminance) in estimating motion. Variable-rate digital coding scheme for compression of color-video-image data designed to deliver pictures of good quality at moderate compressed-data rate of 1 to 2 bits per pixel, or of fair quality at rate less than 1 bit per pixel. Scheme, in principle, implemented by use of commercially available application-specific integrated circuits. Incorporates elements of some prior coding schemes, including motion compensation (MC) and discrete cosine transform (DCT).

Wong, Carol↗

NASA NTRS2015

Conformal and Spectrally Agile Ultra Wideband Phased Array Antenna for Communication and Sensing

There is a continuing need for reducing size and weight of satellite systems, and is also strong interest to increase the functional role of small- and nano-satellites (for instance SmallSats and CubeSats). To this end, a family of arrays is presented, demonstrating ultra-wideband operation across the numerous satellite communications and sensing frequencies up to the Ku-, Ka-, and Millimeter-Wave bands. An example design is demonstrated to operate from 3.5-18.5 GHz with VSWR2 at broadside, and validated through fabrication of an 8 x 8 prototype. This design is optimized for low cost, using Printed Circuit Board (PCB) fabrication. With the same fabrication technology, scaling is shown to be feasible up to a 9-49 GHz band. Further designs are discussed, which extend this wideband operation beyond the Ka-band, for instance from 20-80 GHz. Finally we will discuss recent efforts in the direct integration of such arrays with digital beamforming back-ends. It will be shown that using a novel on-site coding architecture, orders of magnitude reduction in hardware size, power, and cost is accomplished in this transceiver.

Ultra Wideband antenna↗

NASA NTRS2012

Development of Thermal Infrared Sensor to Supplement Operational Land Imager

The thermal infrared sensor (TIRS) is a quantum well infrared photodetector (QWIP)-based instrument intended to supplement the Operational Land Imager (OLI) for the Landsat Data Continuity Mission (LDCM). The TIRS instrument is a far-infrared imager operating in the pushbroom mode with two IR channels: 10.8 and 12 m. The focal plane will contain three 640 ~512 QWIP arrays mounted onto a silicon substrate. The readout integrated circuit (ROIC) addresses each pixel on the QWIP arrays and reads out the pixel value (signal). The ROIC is controlled by the focal plane electronics (FPE) by means of clock signals and bias voltage value. The means of how the FPE is designed to control and interact with the TIRS focal plane assembly (FPA) is the basis for this work. The technology developed under the FPE is for the TIRS focal plane assembly (FPA). The FPE must interact with the FPA to command and control the FPA, extract analog signals from the FPA, and then convert the analog signals to digital format and send them via a serial link (USB) to a computer. The FPE accomplishes the described functions by converting electrical power from generic power supplies to the required bias power that is needed by the FPA. The FPE also generates digital clocking signals and shifts the typical transistor-to-transistor logic (TTL) to }5 V required by the FPA. The FPE also uses an application- specific integrated circuit (ASIC) named System Image, Digitizing, Enhancing, Controlling, And Retrieving (SIDECAR) from Teledyne Corp. to generate the clocking patterns commanded by the user. The uniqueness of the FPE for TIRS lies in that the TIRS FPA has three QWIP detector arrays, and all three detector arrays must be in synchronization while in operation. This is to avoid data skewing while observing Earth flying in space. The observing scenario may be customized by uploading new control software to the SIDECAR.

Shu, Peter↗

NASA NTRS1974

Shuttle extravehicular activity signal processor pulse amplitude modulation decommutator

To provide data with long-term stability and accuracy, the pulse amplitude modulation (PAM) decommutator was synchronized to the PAM-return to zero wavetrain, and each channel was sampled with a common sample and hold circuit and digitized sequentially. The digital value of each channel was then scaled by the digital value of the calibration channels. The corrected digital value of each channel was stored for one complete frame and then transferred to the multiplexer-demultiplexer at a high rate in one block of serial digital data. A test model was built to demonstrate this design approach taken for the PAM decom and performance data was provided. The accuracies obtained with various signal to noise ratios are shown.

Noble, D. E.↗

NASA NTRS1991

Rendezvous radar for the orbital maneuvering vehicle

This paper describes the development of the Rendezvous Radar Set (RRS) for the Orbital Maneuvering Vehicle (OMV) for the National Aeronautics and Space Administration (NASA). The RRS was to be used to locate, and then provide vectoring information to, target satellites (or Shuttle or Space Station) to aid the OMV in making a minimum-fuel-consumption approach and rendezvous. The RRS design is that of an X-Band, all solid-state, monopulse tracking, frequency hopping, pulse-Doppler radar system. The development of the radar was terminated when the OMV prime contract to TRW was terminated by NASA. At the time of the termination, the development was in the circuit design stage. The system design was virtually completed, the PDR had been held. The RRS design was based on Motorola's experiences, both in the design and production of radar systems for the US Army and in the design and production of hi-rel communications systems for NASA space programs. Experience in these fields was combined with the latest digital signal processor and micro-processor technology to design a light-weight, low-power, spaceborne radar. The antenna and antenna positioner (gimbals) technology developed for the RRS is now being used in the satellite-to-satellite communication link design for Motorola's Iridium telecommunications system.

Locke, John W.↗

NASA NTRS1998

Trellises and Trellis-Based Decoding Algorithms for Linear Block Codes

Decoding algorithms based on the trellis representation of a code (block or convolutional) drastically reduce decoding complexity. The best known and most commonly used trellis-based decoding algorithm is the Viterbi algorithm. It is a maximum likelihood decoding algorithm. Convolutional codes with the Viterbi decoding have been widely used for error control in digital communications over the last two decades. This chapter is concerned with the application of the Viterbi decoding algorithm to linear block codes. First, the Viterbi algorithm is presented. Then, optimum sectionalization of a trellis to minimize the computational complexity of a Viterbi decoder is discussed and an algorithm is presented. Some design issues for IC (integrated circuit) implementation of a Viterbi decoder are considered and discussed. Finally, a new decoding algorithm based on the principle of compare-select-add is presented. This new algorithm can be applied to both block and convolutional codes and is more efficient than the conventional Viterbi algorithm based on the add-compare-select principle. This algorithm is particularly efficient for rate 1/n antipodal convolutional codes and their high-rate punctured codes. It reduces computational complexity by one-third compared with the Viterbi algorithm.

Lin, Shu↗

NASA NTRS1994

Cell Libraries

A NASA contract led to the development of faster and more energy efficient semiconductor materials for digital integrated circuits. Gallium arsenide (GaAs) conducts electrons 4-6 times faster than silicon and uses less power at frequencies above 100-150 megahertz. However, the material is expensive, brittle, fragile and has lacked computer automated engineering tools to solve this problem. Systems & Processes Engineering Corporation (SPEC) developed a series of GaAs cell libraries for cell layout, design rule checking, logic synthesis, placement and routing, simulation and chip assembly. The system is marketed by Compare Design Automation.

Source record↗

NASA NTRS2007

Programmable Thermostats for MPLM Shell Heater Control ULF1: Thermal Performances - 1

The Multi-Purpose Logistics Module (MPLM) is the primary carrier for "pressurized" logistics to and from the International Space Station (ISS). The MPLM is transported in the payload bay of the Space Shuttle and is docked to the ISS for unloading, and reloading, of contents within the ISS shirt sleeve environment. Foil heaters, controlled originally with bi-metallic thermostats, are distributed across the outside of the MPLM structure and are utilized to provide energy to the structure to avoid exposure to cold temperatures and prevent condensation. The existing bi-metallic, fixed temperature set point thermostats have been replaced with Programmable Thermostats Modules (PTMs) in the Passive Thermal Control Subsystem (PTCS) 28Vdc shell heater circuits. The goal of using the PTM thermostat is to improve operational efficiency of the MPLM on-orbit shell heaters by providing better shell temperature control via feedback control capability. Each heater circuit contains a programmable thermostat connected to an external temperature sensor, a Resistive Temperature Device (RTD), which is used to provide continuous temperature monitoring capability. Each thermostat has programmable temperature set points and control spans. The data acquisition system uses a standard RS-485 serial interface communications cable to provide digital control capability. The PTM system was designed by MSFC, relying upon ALTEC support for their integration within the MPLM system design, while KSC performed the installation and ground checkout testing of the thermostat and RS-485 communication cable on the MPLM FM1 flight module. The PTMs were used for the first time during the STS-121/ULF1.1 mission. This paper will describe the design, development and verification of the PTM system, as well as the PTM flight performance and comparisons with SINDA thermal model predictions.

Glasgow, Shaun↗

NASA NTRS2000

Development of a Two Dimensional Synthetic Aperture Radiometer at L-Band

A radiometer that uses aperture synthesis in two dimensions is being built as part of research under NASA's Instrument Incubator Program. The instrument development team consists of engineers at the Goddard Space Flight Center, the University of Massachusetts and Quadrant Engineering. This will be an aircraft instrument operating at L-band which builds on the heritage of ESTAR. The choice of L-band was made because the problem of achieving adequate resolution in space is most critical at this wavelength and because a polarimetric, conical scanning airborne radiometer for future experiments to validate soil moisture and ocean salinity retrieval algorithms is not currently available. The instrument will be designed to fly on the NASA P-3 aircraft in a nadir pointing mode, although other options are possible. The antenna will consist of an array of modules arranged in a rectangular grid. Each module will be comprised of a printed circuit dual-polarized patch and integrated receiver. The distribution of modules within the rectangular array will be adjustable so that several different imaging configurations (e.g. "+","Y", "T") can be employed. The integrated receiver will provide amplification and conversion to IF. The IF signal will be routed to a processor where the required correlations performed. The I and Q channels will be created digitally and the correlations will be done digitally in this processor. The digitization will be done with sufficient bits to study the effects of quantization on radiometer performance. A computer/controller will store the data for conversion to an image and will also perform temperature control and other data interfacing and housekeeping tasks. The instrument is currently in the bread boarding phase of development. A design of the critical components has been completed and hardware is being assembled to test the individual elements. It is expected that a complete 2-channel correlator will be tested by the summer of 2000 and that the complete instrument will be ready for flight tests the following summer (2001).

LeVine, D. M.↗

NASA NTRS1991

Design of lightning protection for a full-authority digital engine control

The steps and procedures are described which are necessary to achieve a successful lightning-protection design for a state-of-the-art Full-Authority Digital Engine Control (FADEC) system. The engine and control systems used as examples are fictional, but the design and verification methods are real. Topics discussed include: applicable airworthiness regulation, selection of equipment transient design and control levels for the engine/airframe and intra-engine segments of the system, the use of cable shields, terminal-protection devices and filter circuits in hardware protection design, and software approaches to minimize upset potential. Shield terminations, grounding, and bonding are also discussed, as are the important elements of certification and test plans, and the role of tests and analyses. Also included are examples of multiple-stroke and multiple-burst testing. A review of design pitfalls and challenges, and status of applicable test standards such as RTCA DO-160, Section 22, are presented.

Dargi, M.↗

NASA NTRS1991

Programmable digital modem

The design of the Programmable Digital Modem (PDM) is outlined. The PDM will be capable of operating with numerous modulation techniques including: 2-, 4-, 8- and 16-ary phase shift keying (PSK), minimum shift keying (MSK), and 16-ary quadrature amplitude modulation (QAM), with spectral occupancy from 1.2x to 2x the data symbol rate. It will also be programmable for transmission rates ranging from 2.34 to 300 Mbit/s, where the maximum symbol rate is 75 Msymbol/s. Furthermore, these parameters will be executable in independent burst, dependent burst, or continuous mode. In dependent burst mode the carrier and clock oscillator sources are common from burst to burst. To achieve as broad a set of requirements as these, it is clear that the essential signal processing must be digital. In addition, to avoid hardware changes when the operational parameters are changed, a fixed interface to an analog intermediate frequency (IF) is necessary for transmission; and, common system level architectures are necessary for the modulator and demodulator. Lastly, to minimize size and power, as much of the design as possible will be implemented with application specific integrated circuit (ASIC) chips.

Poklemba, John J.↗

NASA NTRS1994

Hardware description languages

Hardware description languages are special purpose programming languages. They are primarily used to specify the behavior of digital systems and are rapidly replacing traditional digital system design techniques. This is because they allow the designer to concentrate on how the system should operate rather than on implementation details. Hardware description languages allow a digital system to be described with a wide range of abstraction, and they support top down design techniques. A key feature of any hardware description language environment is its ability to simulate the modeled system. The two most important hardware description languages are Verilog and VHDL. Verilog has been the dominant language for the design of application specific integrated circuits (ASIC's). However, VHDL is rapidly gaining in popularity.

Tucker, Jerry H.↗

NASA NTRS2002

Electronics for Deep Space Cryogenic Applications

Deep space probes and planetary exploration missions require electrical power management and control systems that are capable of efficient and reliable operation in very cold temperature environments. Typically, in deep space probes, heating elements are used to keep the spacecraft electronics near room temperature. The utilization of power electronics designed for and operated at low temperature will contribute to increasing efficiency and improving reliability of space power systems. At NASA Glenn Research Center, commercial-off-the-shelf devices as well as developed components are being investigated for potential use at low temperatures. These devices include semiconductor switching devices, magnetics, and capacitors. Integrated circuits such as digital-to-analog and analog-to-digital converters, DC/DC converters, operational amplifiers, and oscillators are also being evaluated. In this paper, results will be presented for selected analog-to-digital converters, oscillators, DC/DC converters, and pulse width modulation (PWM) controllers.

Patterson, R. L.↗

NASA NTRS2007

Analog Nonvolatile Computer Memory Circuits

In nonvolatile random-access memory (RAM) circuits of a proposed type, digital data would be stored in analog form in ferroelectric field-effect transistors (FFETs). This type of memory circuit would offer advantages over prior volatile and nonvolatile types: In a conventional complementary metal oxide/semiconductor static RAM, six transistors must be used to store one bit, and storage is volatile in that data are lost when power is turned off. In a conventional dynamic RAM, three transistors must be used to store one bit, and the stored bit must be refreshed every few milliseconds. In contrast, in a RAM according to the proposal, data would be retained when power was turned off, each memory cell would contain only two FFETs, and the cell could store multiple bits (the exact number of bits depending on the specific design). Conventional flash memory circuits afford nonvolatile storage, but they operate at reading and writing times of the order of thousands of conventional computer memory reading and writing times and, hence, are suitable for use only as off-line storage devices. In addition, flash memories cease to function after limited numbers of writing cycles. The proposed memory circuits would not be subject to either of these limitations. Prior developmental nonvolatile ferroelectric memories are limited to one bit per cell, whereas, as stated above, the proposed memories would not be so limited. The design of a memory circuit according to the proposal must reflect the fact that FFET storage is only partly nonvolatile, in that the signal stored in an FFET decays gradually over time. (Retention times of some advanced FFETs exceed ten years.) Instead of storing a single bit of data as either a positively or negatively saturated state in a ferroelectric device, each memory cell according to the proposal would store two values. The two FFETs in each cell would be denoted the storage FFET and the control FFET. The storage FFET would store an analog signal value, between the positive and negative FFET saturation values. This signal value would represent a numerical value of interest corresponding to multiple bits: for example, if the memory circuit were designed to distinguish among 16 different analog values, then each cell could store 4 bits. Simultaneously with writing the signal value in the storage FFET, a negative saturation signal value would be stored in the control FFET. The decay of this control-FFET signal from the saturation value would serve as a model of the decay, for use in regenerating the numerical value of interest from its decaying analog signal value. The memory circuit would include addressing, reading, and writing circuitry that would have features in common with the corresponding parts of other memory circuits, but would also have several distinctive features. The writing circuitry would include a digital-to-analog converter (DAC); the reading circuitry would include an analog-to-digital converter (ADC). For writing a numerical value of interest in a given cell, that cell would be addressed, the saturation value would be written in the control FFET in that cell, and the non-saturation analog value representing the numerical value of interest would be generated by use of the DAC and stored in the storage FFET in that cell. For reading the numerical value of interest stored in a given cell, the cell would be addressed, the ADC would convert the decaying control and storage analog signal values to digital values, and an associated fast digital processing circuit would regenerate the numerical value from digital values.

MacLeod, Todd↗

NASA NTRS1998

A Spaceflight Magnetic Bearing Equipped Optical Chopper with Six-Axis Active Control

This paper describes the development of an ETU (Engineering Test Unit) rotary optical chopper with magnetic bearings. An ETU is required to be both flight-like, nearly identical to a flight unit without the need for material certifications, and demonstrate structural and performance integrity. A prototype breadboard design previously demonstrated the feasibility of meeting flight performance requirements using magnetic bearings. The chopper mechanism is a critical component of the High Resolution Dynamics Limb Sounder (HIRDLS) which will be flown on EOS-CHEM (Earth Observing System-Chemistry). Particularly noteworthy are the science requirements which demand high precision positioning and minimal power consumption along with full redundancy of coils and sensors in a miniature, lightweight package. The magnetic bearings are unique in their pole design to minimize parasitic losses and utilize collocated optical sensing. The motor is of an unusual disk-type ironless stator design. The ETU design has evolved from the breadboard design. A number of improvements have been incorporated into the ETU design. Active thrust control has been added along with changes to improve sensor stability, motor efficiency, and touchdown and launch survivability. It was necessary to do all this while simultaneously reducing the mechanism volume. Flight-like electronics utilize a DSP (Digital Signal Processor) and contain all sensor electronics and drivers on a single five inch by nine inch circuit board. Performance test results are reported including magnetic bearing and motor rotational losses.

Blumenstock, Kenneth A.↗

NASA NTRS1998

A Spaceflight Magnetic Bearing Equipped Optical Chopper with Six-Axis Active Control

This paper describes the development of an ETU (Engineering Test Unit) rotary optical chopper with magnetic bearings. An ETU is required to be both flight-like, nearly identical to a flight unit without the need for material certifications, and demonstrate structural and performance integrity. A prototype breadboard design previously demonstrated the feasibility of meeting flight performance requirements using magnetic bearings. The chopper mechanism is a critical component of the High Resolution Dynamics Limb Sounder (HIRDLS) which will be flown on EOS-CHEM (Earth Observing System-Chemistry). Particularly noteworthy are the science requirements which demand high precision positioning and minimal power consumption along with full redundancy of coils and sensors in a miniature, lightweight package. The magnetic bearings are unique in their pole design to minimize parasitic losses and utilize collocated optical sensing. The motor is of an unusual disk-type ironless stator design. The ETU design has evolved from the breadboard design. A number of improvements have been incorporated into the ETU design. Active thrust control has been added along with changes to improve sensor stability, motor efficiency, and touchdown and launch survivability. It was necessary to do all this while simultaneously reducing the mechanism volume. Flight-like electronics utilize a DSP (Digital Signal Processor) and contain all sensor electronics and drivers on a single five inch by nine inch circuit board. Performance test results are reported including magnetic bearing and motor rotational losses.

Blumenstock, K. A.↗

NASA NTRS1998

A Spaceflight Magnetic Bearing Equipped Optical Chopper with Six-Axis Active Control

This paper describes the development of an ETU (Engineering Test Unit) rotary optical chopper with magnetic bearings. An ETU is required to be both flight-like, nearly identical to a flight unit without the need for material certifications, and demonstrate structural and performance integrity. A prototype breadboard design previously demonstrated the feasibility of meeting flight performance requirements using magnetic bearings. The chopper mechanism is a critical component of the High Resolution Dynamics Limb Sounder (HIRDLS) which will be flown on EOS-CHEM (Earth Observing System-Chemistry). Particularly noteworthy are the science requirements which demand high precision positioning and minimal power consumption along with full redundancy of coils and sensors in a miniature, lightweight package. The magnetic bearings are unique in their pole design to minimize parasitic losses and utilize collocated optical sensing. The motor is of an unusual disk-type ironless stator design. The ETU design has evolved from the breadboard design. A number of improvements have been incorporated into the ETU design. Active thrust control has been added along with changes to improve sensor stability, motor efficiency, and touchdown and launch survivability. It was necessary to do all this while simultaneously reducing the mechanism volume. Flight-like electronics utilize a DSP (Digital Signal Processor) and contain all sensor electronics and drivers on a single five inch by nine inch circuit board. Performance test results are reported including magnetic bearing and motor rotational losses.

Blumenstock, Kenneth A.↗