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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 325 records · Page 18
All sourcesNASA NTRSDOE OSTI
DOE OSTI2017

RF Energy Harvesting Peel-and-Stick Sensors

PARC, a Xerox Company, is developing a low-cost system of peel-and-stick wireless sensors that will enable widespread building environment sensor deployment with the potential to deliver up to 30% energy savings. The system is embodied by a set of RF hubs that provide power to the automatically located sensor nodes, and relays data wirelessly to the building management system (BMS). The sensor nodes are flexible electronic labels powered by rectified RF energy transmitted by a RF hub and can contain multiple printed and conventional sensors. The system design overcomes limitations in wireless sensors related to power delivery, lifetime, and cost by eliminating batteries and photovoltaic devices. The sensor localization is performed automatically by the inclusion of a programmable multidirectional antenna array in the RF hub. Comparison of signal strengths when the RF beam is swept allows for sensor localization, further reducing installation effort and enabling automatic recommissioning of sensors that have been relocated, overcoming a significant challenge in building operations. PARC has already demonstrated wireless power and temperature data transmission up to a distance of 20m with a duty cycle less than a minute between measurements, using power levels well within the FCC regulation limits in the 902-928 MHz ISM band. The sensor’s RF energy harvesting antenna dimensions was less than 5cmx9cm, demonstrating the possibility of small form factor for the sensor nodes.

32 ENERGY CONSERVATION, CONSUMPTION, AND UTILIZATI↗
DOE OSTI2023

Face‐on Orientation Matches Vertical Organic Electrochemical Transistors for High Transconductance and Superior Non‐Volatility

Abstract The recently developed vertical structure of organic electrochemical transistors (OECTs) can integrate volatile and non‐volatile functions into one reconfigurable device, making it highly promising. However, comparing with the conventional planar OECT (c‐OECT), the understanding of vertical OECT (v‐OECT) working principles and device engineering strategies is still lacking, impeding rational optimization. Since a major difference between c‐ and v‐OECTs is their charge transport directionality, which is highly influenced by crystallite orientations, the orientation–device structure match thus becomes an important yet outstanding topic for OECTs. Herein, using ann‐type small molecule IDIC‐MEG, investigate how much impact such match can have on OECT performance. The IDIC‐MEG c‐OECT fails to work due to the seriously hindered in‐plane electron transport by face‐on orientation. Surprisingly, simply changing the device structure from planar to vertical allows the resultant v‐OECT to exhibit the highest reported transconductance (46.3 mS) among all small‐molecule OECTs, thanks to the match between face‐on orientation and the vertical structure. Such match also leads to excellent non‐volatility, including highly predictable programmability and good operational stability. This work, for the first time, explicitly demonstrates the significance of orientation–device structure match for OECT optimization, establishing new guidelines for achieving high‐performance volatile and non‐volatile OECTs.

Chemistry↗
DOE OSTI2025

Automated Programmable Logic Controller Memory Forensics Using RGB Image Analysis and Deep Learning

The introduction of Industry 4.0 and Internet-based technologies has enhanced industrial control system operations but have inadvertently increased their vulnerabilities to cyber attacks. When an industrial control system is compromised, security analysts need to identify the root cause quickly to start the recovery process and develop mitigation strategies. Memory forensics is critical in the incident analysis process to ascertain what occurred. Approaches for analyzing the persistent memory in industrial control devices are limited and almost nonexistent for volatile memory. This chapter proposes an automated methodology for programmable logic controller memory dump analysis using computer vision and deep learning techniques. The methodology converts the sequences of bytes in a programmable logic controller memory dump to red-green-blue pixels and employs a deep learning model that learns the underlying patterns and features of pre-labeled forensic artifacts in images and segments them into distinct regions. The trained model is employed to automatically segment new memory images and identify forensic artifacts. Evaluation of the methodology on a Schneider Electric Modicon M221 programmable logic controller under code injection and code modification attacks demonstrates its ability to detect attack artifacts in memory dumps.

Asmar Awad, Rima [ORNL] (ORCID:0000000233407742)↗
NASA NTRS2009

Board Saver for Use with Developmental FPGAs

A device denoted a board saver has been developed as a means of reducing wear and tear of a printed-circuit board onto which an antifuse field programmable gate array (FPGA) is to be eventually soldered permanently after a number of design iterations. The need for the board saver or a similar device arises because (1) antifuse-FPGA design iterations are common and (2) repeated soldering and unsoldering of FPGAs on the printed-circuit board to accommodate design iterations can wear out the printed-circuit board. The board saver is basically a solderable/unsolderable FPGA receptacle that is installed temporarily on the printed-circuit board. The board saver is, more specifically, a smaller, square-ring-shaped, printed-circuit board (see figure) that contains half via holes one for each contact pad along its periphery. As initially fabricated, the board saver is a wider ring containing full via holes, but then it is milled along its outer edges, cutting the via holes in half and laterally exposing their interiors. The board saver is positioned in registration with the designated FPGA footprint and each via hole is soldered to the outer portion of the corresponding FPGA contact pad on the first-mentioned printed-circuit board. The via-hole/contact joints can be inspected visually and can be easily unsoldered later. The square hole in the middle of the board saver is sized to accommodate the FPGA, and the thickness of the board saver is the same as that of the FPGA. Hence, when a non-final FPGA is placed in the square hole, the combination of the non-final FPGA and the board saver occupy no more area and thickness than would a final FPGA soldered directly into its designated position on the first-mentioned circuit board. The contact leads of a non-final FPGA are not bent and are soldered, at the top of the board saver, to the corresponding via holes. A non-final FPGA can readily be unsoldered from the board saver and replaced by another one. Once the final FPGA design has been determined, the board saver can be unsoldered from the contact pads on the first-mentioned printed-circuit board and replaced by the final FPGA.

Berkun, Andrew↗
DOE OSTI2023

Millimeter-Thick Liquid Crystalline Elastomer Actuators Prepared by-Surface-Enforced Alignment

Here, liquid crystalline elastomers (LCE) are thermally cyclable, compliant actuators with compelling mechanical properties. The large and programmable deformation of LCE has led to numerous functional examinations spanning optics, medical devices, and robotics. A well-established method to prepare complex LCE actuators is to utilize surface-enforced photoalignment. Herein, a facile and scalable approach is reported to circumvent the physical limits of surface-enforced alignment (e.g., samples that are 50 µm or less) to amplify the achievable force output in LCE. Applying an approach termed direct layering, the thermomechanical response of LCE elements prepared with +1 disclination patterns in a range of compositions and thicknesses is contrasted. The design and preparation of +1 disclination patterns and arrays is explored to assess the contribution of sample geometry and overlap to deformation and force output. The methodology detailed in this contribution allows for the preparation of elements ≈1 mm in thickness that are capable of actuating large objects. Furthermore, the fabrication of these elements uniquely enables the realization of mechanical instabilities to hasten the actuation rate in response to thermal change and to enable leaping.

36 MATERIALS SCIENCE↗
DOE OSTI2022

The QICK (Quantum Instrumentation Control Kit): Readout and control for qubits and detectors

We introduce a Xilinx RF System-on-Chip (RFSoC)-based qubit controller (called the Quantum Instrumentation Control Kit, or QICK for short), which supports the direct synthesis of control pulses with carrier frequencies of up to 6 GHz. The QICK can control multiple qubits or other quantum devices. The QICK consists of a digital board hosting an RFSoC field-programmable gate array, custom firmware, and software and an optional companion custom-designed analog front-end board. We characterize the analog performance of the system as well as its digital latency, important for quantum error correction and feedback protocols. We benchmark the controller by performing standard characterizations of a transmon qubit. We achieve an average gate fidelity of ℱ avg =99.93%. All of the schematics, firmware, and software are open-source.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2016

IMPACC: A Tightly Integrated MPI+OpenACC Framework Exploiting Shared Memory Parallelism

We propose IMPACC, an MPI+OpenACC framework for heterogeneous accelerator clusters. IMPACC tightly integrates MPI and OpenACC, while exploiting the shared memory parallelism in the target system. IMPACC dynamically adapts the input MPI+OpenACC applications on the target heterogeneous accelerator clusters to fully exploit target system-specific features. IMPACC provides the programmers with the unified virtual address space, automatic NUMA-friendly task-device mapping, efficient integrated communication routines, seamless streamlining of asynchronous executions, and transparent memory sharing. We have implemented IMPACC and evaluated its performance using three heterogeneous accelerator systems, including Titan supercomputer. Results show that IMPACC can achieve easier programming, higher performance, and better scalability than the current MPI+OpenACC model.

Kim, Jungwon↗
NASA NTRS1990

The design and proof of correctness of a fault-tolerant circuit

The flowing achievements are presented in view graph form: (1) a formal statement of interactive consistency conditions in the Boyer-Moore logic; (2) a formal statement of the oral messages (OM) algorithm in the Boyer-Moore logic; (3) a mechanically checked proof that OM satisfies the interactive consistency conditions; (4) a mechanically checked proof of the optimality result--no algorithm can tolerate fewer faults than OM yet still achieve interactive consistency; (5) the use of OM in a functional specification for a fault-tolerant device; (6) a formal description of the design of the device; (7) a mechanically checked proof that the device design satisfies the specification; and (8) an implementation of the design in programmable logic arrays.

Bevier, William R.↗
NASA NTRS2010

FPGA NEPP : FY09 summary report

This report documents the activities and results of the fiscal year 2009 (FY09) funding for the NASA Electronic Parts and Packaging (NEPP) program for re-programmable field programmable gate arrays (FPGAs). The FY09 task was divided into three efforts: 1. Device physics-based design modifications 2. Contention study of Xilinx Virtex-4 3. IDDQ study of Actel A54SX The FY09 NEPP FPGA study was organized into these three sections in recognition of the continued and increasing importance of FPGAs to NASA. FPGAs represent the state of the art in electronic components with millions and millions of transistors integrated into a single device. Modern NASA spacecraft design has dozens and dozens of FPGAs implemented onboard. FPGAs are used in critical command and data handling, instrument control and monitoring, and communications protocols, to name just a few. The reliability of FPGAs is fundamental to mission success for NASA.

Sheldon, Douglas↗
DOE OSTI2021

Architecture Of A Multi-channel Data Streaming Device With An Fpga As A Coprocessor

The design of a data acquisition system often involves the integration of a Field Programmable Gate Array (FPGA) with analog front-end components to achieve precise timing and control. Reuse of these hardware systems can be difficult since they need to be tightly coupled to the communications interface and timing requirements of the specific ADC used. A hybrid design exploring the use of FPGA as a coprocessor to a traditional CPU in a dataflow architecture is presented. Reduction in the volume of data and gradual transitioning of data processing away from a hard real-time environment are both discussed. Chief design concerns, including data throughput and precise synchronization with external stimuli, are addressed. The discussion is illustrated by the implementation of a multi-channel digital integrator, a device based entirely on commercial off-the-shelf (COTS) equipment.

Nogiec, Jerzy M.↗
NASA NTRS1991

An electronic pan/tilt/zoom camera system

A camera system for omnidirectional image viewing applications that provides pan, tilt, zoom, and rotational orientation within a hemispherical field of view (FOV) using no moving parts was developed. The imaging device is based on the effect that from a fisheye lens, which produces a circular image of an entire hemispherical FOV, can be mathematically corrected using high speed electronic circuitry. An incoming fisheye image from any image acquisition source is captured in memory of the device, a transformation is performed for the viewing region of interest and viewing direction, and a corrected image is output as a video image signal for viewing, recording, or analysis. As a result, this device can accomplish the functions of pan, tilt, rotation, and zoom throughout a hemispherical FOV without the need for any mechanical mechanisms. A programmable transformation processor provides flexible control over viewing situations. Multiple images, each with different image magnifications and pan tilt rotation parameters, can be obtained from a single camera. The image transformation device can provide corrected images at frame rates compatible with RS-170 standard video equipment.

Zimmermann, Steve↗
DOE OSTI2023

Techniques for controlling charging and/or discharging of batteries using a tanks-in-series model

In some embodiments, a battery management system is provided. The battery management system comprises a connector for electrically coupling a battery to the battery management system, at least one sensor configured to detect a battery state, a programmable chip configured to control at least one of charging and discharging of the battery, and a controller device. The controller device is configured to receive at least one battery state from the at least one sensor; provide the at least one battery state as input to a tanks-in-series model that represents the battery; and provide at least one output of the tanks-in-series model to the programmable chip for controlling at least one of charging and discharging of the battery.

25 ENERGY STORAGE↗
DOE OSTI2021

Thermal hysteresis controlled reconfigurable MoS 2 nanomechanical resonators

Two-dimensional (2D) structures from layered materials have enabled a number of novel devices including resonant nanoelectromechanical systems (NEMS). 2D NEMS resonators are highly responsive to strain, allowing their resonance frequencies to be efficiently tuned over broad ranges, which is a feature difficult to attain in conventional micromachined resonators. In electrically configured and tuned devices, high external voltages are typically required to set and maintain different frequencies, limiting their applications. Here we experimentally demonstrate molybdenum disulfide (MoS 2 ) nanomechanical resonators that can be reconfigured between different frequency bands with zero maintaining voltage in a non-volatile fashion. By leveraging the thermal hysteresis in these 2D resonators, we use heating and cooling pulses to reconfigure the device frequency, with no external voltage required to maintain each frequency. Here, we further show that the frequency spacing between the bands can be tuned by the thermal pulse strength, offering full control over the programmable operation. Such reconfigurable MoS 2 resonators may provide an alternative pathway toward small-form-factor and low-power tunable devices in future reconfigurable radio-frequency circuits with multi-band capability.

42 ENGINEERING↗
DOE OSTI2019

Overview of new MAST physics in anticipation of first results from MAST Upgrade

We report that the mega amp spherical tokamak (MAST) was a low aspect ratio device (R/a = 0.85/0.65 ~ 1.3) with similar poloidal cross-section to other medium-size tokamaks. The physics programme concentrates on addressing key physics issues for the operation of ITER, design of DEMO and future spherical tokamaks by utilising high resolution diagnostic measurements closely coupled with theory and modelling to significantly advance our understanding. An empirical scaling of the energy confinement time that favours higher power, lower collisionality devices is consistent with gyrokinetic modelling of electron scale turbulence. Measurements of ion scale turbulence with beam emission spectroscopy and gyrokinetic modelling in up-down symmetric plasmas find that the symmetry of the turbulence is broken by flow shear. Near the non-linear stability threshold, flow shear tilts the density fluctuation correlation function and skews the fluctuation amplitude distribution. Results from fast particle physics studies include the observation that sawteeth are found to redistribute passing and trapped fast particles injected from neutral beam injectors in equal measure, suggesting that resonances between the m = 1 perturbation and the fast ion orbits may be playing a dominant role in the fast ion transport. Measured D–D fusion products from a neutron camera and a charged fusion product detector are 40% lower than predictions from TRANSP/NUBEAM, highlighting possible deficiencies in the guiding centre approximation. Modelling of fast ion losses in the presence of resonant magnetic perturbations (RMPs) can reproduce trends observed in experiments when the plasma response and charge-exchange losses are accounted for. Measurements with a neutral particle analyser during merging-compression start-up indicate the acceleration of ions and electrons. Transport at the plasma edge has been improved through reciprocating probe measurements that have characterised a geodesic acoustic mode at the edge of an ohmic L-mode plasma and particle-in-cell modelling has improved the interpretation of plasma potential estimates from ball-pen probes. The application of RMPs leads to a reduction in particle confinement in L-mode and H-mode and an increase in the core ionization source. The ejection of secondary filaments following type-I ELMs correlates with interactions with surfaces near the X-point. Simulations of the interaction between pairs of filaments in the scrape-off layer suggest this results in modest changes to their velocity, and in most cases can be treated as moving independently. A stochastic model of scrape-off layer profile formation based on the superposition of non-interacting filaments is in good agreement with measured time-average profiles. Transport in the divertor has been improved through fast camera imaging, indicating the presence of a quiescent region devoid of filament near the X-point, extending from the separatrix to $ψ_n$ ~ 1.02. Simulations of turbulent transport in the divertor show that the angle between the divertor leg on the curvature vector strongly influences transport into the private flux region via the interchange mechanism. Coherence imaging measurements show counter-streaming flows of impurities due to gas puffing increasing the pressure on field lines where the gas is ionised. MAST Upgrade is based on the original MAST device, with substantially improved capabilities to operate with a Super-X divertor to test extended divertor leg concepts. SOLPS-ITER modelling predicts the detachment threshold will be reduced by more than a factor of 2, in terms of upstream density, in the Super-X compared with a conventional configuration and that the radiation front movement is passively stabilised before it reaches the X-point. 1D fluid modelling reveals the key role of momentum and power loss mechanisms in governing detachment onset and evolution. Analytic modelling indicates that long legs placed at large major radius, or equivalently low at the target compared with the X-point are more amenable to external control. With MAST Upgrade experiments expected in 2019, a thorough characterisation of the sources of the intrinsic error field has been carried out and a mitigation strategy developed.

70 PLASMA PHYSICS AND FUSION TECHNOLOGY↗
DOE OSTI2024

sKokkos: Enabling Kokkos with Transparent Device Selection on Heterogeneous Systems using OpenACC

This paper presents a new feature to enable Kokkos with transparent device selection. For application developers, it is not easy toidentify which device is the most appropriate to use in a heterogeneous system, since this depends on the characteristics of both the application and the hardware. In Kokkos, a backend is associated with one specific programming model/hardware. Programmers decide which backend to use at compilation time. This new feature implemented on the OpenACC backend eliminates the burden of deciding which device to use, providing a highly productive programming solution for Kokkos applications. This work includes implementation details and a performance study conducted with a set of mini-benchmarks (i.e., AXPY and dot product), kernels (Lattice-Bolzmann method), and two mini-apps (LULESH and miniFE) on two heterogeneous systems with different hardware capabilities. This new Kokkos feature provides high accelerations of up to 35× thanks to automatic and transparent device selection.

Lee, Seyong↗
DOE OSTI2021

SSP Personality Programmer

The Personality Programmer software is used as means for entities to configure, deploy, and redeploy SSP devices. SAND2020-14337 O Sandia National Laboratories is a multimission laboratory managed and operated by National Technology & Engineering Solutions of Sandia, LLC, a wholly owned subsidiary of Honeywell International Inc., for the U.S. Department of Energy’s National Nuclear Security Administration under contract DE-NA0003525.

Hunt, TannerR.↗
NASA NTRS1981

Video image processor on the Spacelab 2 Solar Optical Universal Polarimeter /SL2 SOUP/

The SOUP instrument is designed to obtain diffraction-limited digital images of the sun with high photometric accuracy. The Video Processor originated from the requirement to provide onboard real-time image processing, both to reduce the telemetry rate and to provide meaningful video displays of scientific data to the payload crew. This original concept has evolved into a versatile digital processing system with a multitude of other uses in the SOUP program. The central element in the Video Processor design is a 16-bit central processing unit based on 2900 family bipolar bit-slice devices. All arithmetic, logical and I/O operations are under control of microprograms, stored in programmable read-only memory and initiated by commands from the LSI-11. Several functions of the Video Processor are described, including interface to the High Rate Multiplexer downlink, cosmetic and scientific data processing, scan conversion for crew displays, focus and exposure testing, and use as ground support equipment.

Lindgren, R. W.↗
NASA NTRS1985

Efficient implementation of real-time programs under the VAX/VMS operating system

Techniques for writing efficient real-time programs under the VAX/VMS oprating system are presented. Basic operations are presented for executing at real-time priority and for avoiding needlless processing delays. A highly efficient technique for accessing physical devices by mapping to the input/output space and accessing the device registrs directly is described. To illustrate the application of the technique, examples are included of different uses of the technique on three devices in the Langley Avionics Integration Research Lab (AIRLAB): the KW11-K dual programmable real-time clock, the Parallel Communications Link (PCL11-B) communication system, and the Datacom Synchronization Network. Timing data are included to demonstrate the performance improvements realized with these applications of the technique.

Johnson, S. C.↗