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At least 325 records · Page 18

Performance of direct and iterative algorithms on an optical systolic processor

The frequency-multiplexed optical linear algebra processor (OLAP) is treated in detail with attention to its performance in the solution of systems of linear algebraic equations (LAEs). General guidelines suitable for most OLAPs, including digital-optical processors, are advanced concerning system and component error source models, guidelines for appropriate use of direct and iterative algorithms, the dominant error sources, and the effect of multiple simultaneous error sources. Specific results are advanced on the quantitative performance of both direct and iterative algorithms in the solution of systems of LAEs and in the solution of nonlinear matrix equations. Acoustic attenuation is found to dominate iterative algorithms and detector noise to dominate direct algorithms. The effect of multiple spatial errors is found to be additive. A theoretical expression for the amount of acoustic attenuation allowed is advanced and verified. Simulations and experimental data are included.

Ghosh, A. K.↗

Filter induced errors in laser anemometry using counter-processor

Simulations of laser Doppler anemometer (LDA) systems have focused primarily on noise studies or biasing errors. Another possible source of error is the choice of filter types and filter cutoff frequencies. Before it is applied to the counter portion of the signal processor, a Doppler burst is filtered to remove the pedestal and to reduce noise in the frequency bands outside the region in which the signal occurs. Filtering, however, introduces errors into the measurement of the frequency of the input signal which leads to inaccurate results. Errors caused by signal filtering in an LDA counter-processor data acquisition system are evaluated and filters for a specific application will reduce these errors are chosen.

Oberle, L. A.↗

Radar backscatter measurement accuracies using digital Doppler processors in spaceborne scatterometers

The normalized standard deviation, Kp, of radar backscatter measurements using digital Doppler processors in spaceborne scatterometers is derived. The Kp expression for analog Doppler filter processors, such as that used in the Seasat scatterometer is shown to be a special case of the derived Kp expression. A connection to Welch's (1967) power spectrum estimation rsults is also made. Tradeoff studies in digital filter design such as hardware complexity, computational speed, and system performance can be performed based on this Kp expression. A current application in the design of the NASA scatterometer to be flown in 1990 is discussed. This derivation should be useful for system design and analysis of other radar remote-sensing instruments.

Chi, C.-Y.↗

Frequency domain laser velocimeter signal processor

The features and performance parameters of the frequency domain laser velocimeter signal processor (FDSP) for examining flow phenomena are described. A candidate for replacing the standard signal processor, the FDSP can function receiving bursts of as few as 150 photons in an instantaneous mode or down to a photon resolved regime for an averaging mode. the FDSP has a nonlinear A/D converter and data storage shift registers (high speed recorder group), an elliptic digital filter bank, a controlling microprocessor and frequency and signal gain control circuits (low speed data processing group). The high speed group amplifies, digitizes, identifies and stores burst waveforms and the low speed group identifies the signal frequency within the burst after the signal passes through digital filters. The FDSP can operate in a near-autonomous mode using photon correlation techniques and requires no human intervention for calibration.

Meyers, J. F.↗

Solving Finite-Element Problems on a Concurrent Processor

By use of "conjugate gradients" technique, concurrent efficiency greater than 90 percent. Algorithm applies method of conjugate gradients to iterative solution of finite-element problems on concurrent processor. With algorithm, iteration rates nearly proportional to number of processors. For sufficiently large problems, fraction of proportional speedup achieved, called concurrent efficiency, exceeds 90 percent. Results indicate future application of this and related algorithms to large finite-element problems depend primarily upon applicability of iteratiave techniques, not upon issues of concurrency or efficiency.

Lyzenga, G. A.↗

Integrated Optical Processor

Images processed rapidly in rugged, compact device. Conceptual integrated optical image processor performs complicated analog calculations, including Fourier transforms, convolutions, correlations, and matrix multiplications. Compact and rugged on account of monolithic structure, processor faster than equivalent all-electronic devices because calculations require only time for light to travel across device; processing speed limited by electronic input and output circuits.

Stephens, William E.↗

RADARSAT high throughput SAR processor development

MacDonald Dettwiler & Associates has been involved with the Canadian Radarsat (RSAT) project for a number of years. This included Phase A definition studies and for the past two years, Phase B ground station design and processor prototyping efforts. The current baseline design for the SAR processing facility (SARDPF) is described along with its requirements and functional decomposition. This forms the context for then discussing the prototype SAR processor and extensions necessary to meet current ground station processing requirements.

George, P.↗

Phase space simulation of collisionless stellar systems on the massively parallel processor

A numerical technique for solving the collisionless Boltzmann equation describing the time evolution of a self gravitating fluid in phase space was implemented on the Massively Parallel Processor (MPP). The code performs calculations for a two dimensional phase space grid (with one space and one velocity dimension). Some results from calculations are presented. The execution speed of the code is comparable to the speed of a single processor of a Cray-XMP. Advantages and disadvantages of the MPP architecture for this type of problem are discussed. The nearest neighbor connectivity of the MPP array does not pose a significant obstacle. Future MPP-like machines should have much more local memory and easier access to staging memory and disks in order to be effective for this type of problem.

White, Richard L.↗

Particle simulation of plasmas on the massively parallel processor

Particle simulations, in which collective phenomena in plasmas are studied by following the self consistent motions of many discrete particles, involve several highly repetitive sets of calculations that are readily adaptable to SIMD parallel processing. A fully electromagnetic, relativistic plasma simulation for the massively parallel processor is described. The particle motions are followed in 2 1/2 dimensions on a 128 x 128 grid, with periodic boundary conditions. The two dimensional simulation space is mapped directly onto the processor network; a Fast Fourier Transform is used to solve the field equations. Particle data are stored according to an Eulerian scheme, i.e., the information associated with each particle is moved from one local memory to another as the particle moves across the spatial grid. The method is applied to the study of the nonlinear development of the whistler instability in a magnetospheric plasma model, with an anisotropic electron temperature. The wave distribution function is included as a new diagnostic to allow simulation results to be compared with satellite observations.

Gledhill, I. M. A.↗

Chemical network problems solved on NASA/Goddard's massively parallel processor computer

The single instruction stream, multiple data stream Massively Parallel Processor (MPP) unit consists of 16,384 bit serial arithmetic processors configured as a 128 x 128 array whose speed can exceed that of current supercomputers (Cyber 205). The applicability of the MPP for solving reaction network problems is presented and discussed, including the mapping of the calculation to the architecture, and CPU timing comparisons.

Cho, Seog Y.↗

Plasma simulation using the massively parallel processor

Two dimensional electrostatic simulation codes using the particle-in-cell model are developed on the Massively Parallel Processor (MPP). The conventional plasma simulation procedure that computes electric fields at particle positions by means of a gridded system is found inefficient on the MPP. The MPP simulation code is thus based on the gridless system in which particles are assigned to processing elements and electric fields are computed directly via Discrete Fourier Transform. Currently, the gridless model on the MPP in two dimensions is about nine times slower that the gridded system on the CRAY X-MP without considering I/O time. However, the gridless system on the MPP can be improved by incorporating a faster I/O between the staging memory and Array Unit and a more efficient procedure for taking floating point sums over processing elements. The initial results suggest that the parallel processors have the potential for performing large scale plasma simulations.

Lin, C. S.↗

The calibration of photographic and spectroscopic films. The utilization of the digital image processor in the determination of aging of the surf clam (Spisula solidissima)

The age of the surf clam (Spisula solidissima) can be determined with the use of the Digital Image Processor. This technique is used in conjunction with a modified method for aging, refined by John Ropes of the Woods Hole Laboratory, Massachusetts. This method utilizes a thinned sectioned chondrophore of the surf clam which contains annual rings. The rings of the chondrophore are then counted to determine age. By digitizing the chondrophore, the Digital Image Processor is clearly able to separate these annual rings more accurately. This technique produces an easier and more efficient way to count annual rings to determine the age of the surf clam.

Peters, Kevin A.↗

Frequency domain laser velocimeter signal processor

A new laser velocimeter signal processor is described which uses advanced digital circuitry to configure itself to maximize measurement accuracy based on the characteristics of the input signals. This processor maintains measurement independence from burst to burst and yields measurement accuracies better than 0.2 percent for signal frequencies up to 100 MHz.

Meyers, James F.↗

Real-Time Processor For Synthetic-Aperture Radar

Images formed aboard airplane. Data processor for synthetic-aperture radar (SAR) operates aboard airplane with radar equipment to produce images of scanned terrain in real time. Providing images immediately, new processor enables SAR operator to monitor scanning activity. Processed images recorded on tape or transmitted to ground stations.

Liu, Kuang Y.↗

Hardware realization of a baseband processor for a SS-FDMA/TDMA/DAMA system

Hardware implementation of the NASA ACTS baseband processor is described which achieves the system message data handling performance required to perform satellite switching of high-rate baseband data. The hardware meets payload specifications for size, weight, and power. Hardware redundancy applied to critical paths in several functional areas insures that the reliability and life expectancy requirements are fulfilled. The remote reprogrammability of the processor message data handling and routing functions provides system flexibility for dynamic reconfiguration during rapidly changing traffic loads.

Moat, Richard L.↗

Development and implementation of a programmable telemetry processor

A programmable telemetry processor was designed for the NASA Goddard Space Flight Center in support of the Systems Utilization Enhancement (SUE) upgrade of the NASA tracking stations at Merritt Island, FL, and Bermuda. The processor is an integrated hardware and software system that performs the front-end telemetry synchronization and decommutation functions and provides for application-specific data processing. This paper presents the design, architecture, and features of the microprocessor controlled unit.

Flagg, Howard S.↗

Optimal mapping of irregular finite element domains to parallel processors

Mapping the solution domain of n-finite elements into N-subdomains that may be processed in parallel by N-processors is an optimal one if the subdomain decomposition results in a well-balanced workload distribution among the processors. The problem is discussed in the context of irregular finite element domains as an important aspect of the efficient utilization of the capabilities of emerging multiprocessor computers. Finding the optimal mapping is an intractable combinatorial optimization problem, for which a satisfactory approximate solution is obtained here by analogy to a method used in statistical mechanics for simulating the annealing process in solids. The simulated annealing analogy and algorithm are described, and numerical results are given for mapping an irregular two-dimensional finite element domain containing a singularity onto the Hypercube computer.

Flower, J.↗