Engineering Papers⌕ Search

SEARCH · Engineering Papers

Results for “Field effect transistors”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 325 records · Page 18
All sourcesNASA NTRSDOE OSTI
DOE OSTI2026

Analog-to-digital converter based on voltage-controlled superconducting devices

The increasing demand for cryogenic electronics in superconducting and quantum computing systems calls for ultra-energy-efficient data conversion architectures that remain functional at deep cryogenic temperatures. Here, in this work, we present the first design of a voltage-controlled superconducting flash analog-to-digital converter (ADC) based on a voltage-controlled quantum-enhanced Josephson junction field-effect transistor (JJFET). Exploiting its strong gate tunability and transistor-like behavior, the JJFET offers a scalable alternative to conventional current-controlled superconducting devices while aligning naturally with CMOS-style design methodologies. Building on our previously developed Verilog-A compact model calibrated to experimental data, we design and simulate a three-bit JJFET-based flash ADC targeted for integration within cryogenic control and readout circuitry in quantum computing. The core comparator block is realized through careful bias current selection and augmented with a three-terminal nanocryotron to precisely define reference voltages. Cascaded JJFET comparators ensure robust voltage gain, cascadability, and logic-level restoration across stages. Simulation results demonstrate accurate quantization behavior with ultra-low power dissipation, underscoring the feasibility of voltage-driven superconducting mixed-signal circuits. This work establishes a critical step toward unifying superconducting logic and data conversion, paving the way for scalable cryogenic architectures in quantum–classical co-processors, low-power artificial intelligence accelerators, and next-generation energy-constrained computing platforms.

Analog-to-digital converter↗
DOE OSTI2022

Electrochemically decorated gold nanoparticles on CVD graphene ChemFET sensor for the highly sensitive detection of As(III)

Here, in this paper, we report a novel reusable receptor-free chemically sensitive field-effect transistor (ChemFET) sensor for the sensitive detection of As(III) using electrochemical doping of Au nanoparticles (AuNPs)-chemical vapour deposition (CVD) graphene (Gr) sensing film (AuNPs-Gr). The sensor consists of a single-gap gold electrode and a single layer of CVD graphene as a conducting/sensing channel decorated with a thin layer of electrochemically deposited AuNPs to catalyze the electroreduction of As(III) ions onto the sensing channel. A new detection strategy was proposed by measuring the resistance change rate of the AuNPs-Gr sensing channel modified between the source electrode and drain electrode, wherein the resistance change was caused by the electrochemical doping of As(0). The results indicated that the electrochemical doping of As(0) onto the sensing channel led to an increase in resistance through the doping interaction among As(0), AuNPs and graphene, enabling the proposed sensor to have an extraordinary detection performance with a high sensitivity. Moreover, the proposed sensor can be recycled by removing the As(0) deposited on the sensing film with the aid of a simple electrochemical oxidization process. Additionally, the mechanism of the sensing strategy based on the electrochemical n-doping of As(0) into the AuNPs-Gr sensing film was investigated using a top liquid gate electrode. The As(III) concentration detected by the AuNPs-Gr ChemFET sensor was as low as 0.001 μg/L, demonstrating that such sensors with a compatible sensing strategy can be used to detect As(III) with high sensitivity, easy fabrication, fast response and can be recycled.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗
DOE OSTI2022

On the Feasibility of 1T Ferroelectric FET Memory Array

To fully exploit the ferroelectric field effect transistor (FeFET) as compact embedded nonvolatile memory for various computing and storage applications, it is desirable to use a single FeFET (1T) as a unit cell and arrange the cells into an array. However, many write mechanisms for an 1T FeFET array reported in the literature are yet to be validated experimentally. In this work, we performed a comprehensive experimental characterization on the write operations in an 1T- NOR and 1T- AND array using n-channel bulk FeFETs. We discovered that: 1) the source/drain contact can only supply minority carriers (i.e., electrons) to the channel for polarization screening during the low- V TH state programming; 2) the body contact can not only supply majority carriers (i.e., holes) for efficient high- V TH state write, but also depletion charge for low- V TH state programming, though with lower efficiency; and 3) during the low/high- V TH programming, only the path that can supply negative/positive screening charges, respectively, need to respond, which necessitates the application of proper write biases on the corresponding terminal. Based on the understanding of these write mechanisms, we show the importance of localized body contact or column-wise body contact for the successful high- V TH state programming. We also show that the previously proposed C- AND write scheme fails to program the FeFET to the low- V TH state for our devices. Finally, we propose several write schemes for both 1T- AND and 1T- NOR arrays for various scenarios providing insights for choosing the appropriate write scheme, which will facilitate the adoption of 1T FeFET memory arrays for emerging applications.

FeFET↗
DOE OSTI2025

Amorphous Indium Oxide Channel FEFETs With Write Voltage of 0.9 V and Endurance >10 12 for Refresh-Free Embedded Memory

This work presents, for the first time, a back-end-of-the-line (BEOL)-compatible W-doped indium oxide (IWO) ferroelectric field-effect transistor (FEFET) with a record-low operating voltage below 0.9 V and a write speed of 20 ns while achieving a transient read current window (CW) ratio ( I LVT /I HVT ) greater than 10 4 . The device also exhibits exceptional reliability characteristics such as: 1) measured bipolar write endurance up to 10 12 cycles; 2) a fast read speed of 50 ns; 3) read endurance surpassing 10 12 cycles; and 4) retention exceeding 10 4 s at 85 ∘ C. Furthermore, a physics-based numerical model has been developed to investigate the nanoscale characteristics of BEOL FEFET devices, leveraging nucleation-limited switching in HfO 2 ferroelectrics and dc characterization to extract material and channel parameters for accurate device simulation. The simulation uncovers the stochastic switching behavior of BEOL amorphous oxide semiconductor (AOS) FEFETs and demonstrates an intrinsic switching time as low as 1 ps, highlighting the potential of BEOL AOS FEFETs for ultrafast memory applications. These results establish AOS FEFETs as a compelling candidate for high-density embedded memory applications for last-level cache (LLC) (L4) in advanced CMOS technology nodes.

1-V ferroelectric field-effect transistor (FEFET)↗
DOE OSTI2024

Fast Neutron Irradiation of a Multichannel JFET-Based Optical Encoder

Modern electrical components are susceptible to damage from high levels of radiation and extreme temperatures found near reactors in terrestrial nuclear power plants and in aerospace applications. Radiation-hardened electronics are being developed, largely for the aerospace industry, but they sometimes rely on application-specific, small-batch semiconductor fabrication processes. These processes tend to be prohibitively expensive to develop and maintain outside major industrial facilities or governmental agencies. Recently, commercially available, nonradiation-rated junction-gate field-effect transistors (JFETs) were shown to maintain their functionality at gamma doses exceeding 1 MGy, suggesting that nonrated, commercially available electrical components could be used to develop systems that are tolerant to ionizing radiation. However, gamma ray survival is not indicative of neutron dose survival, and few studies characterize JFETs under neutron irradiation. To address this knowledge gap, a JFET-based analog multiplexer and optical pulsewidth modulation (PWM) encoder was developed and irradiated using a 252 Cf source to 1.6×10 13 n/cm 2 . The multiplexed optical encoder (MOE) system maintained functionality throughout testing and showed little evidence of radiation effects. These results indicate that circuitry tolerant to fast neutron damage can be developed using low-cost, nonradiation-rated, commercially available JFETs, which could provide a lower production cost alternative to specialized semiconductor processes when designing and building electronics better able to survive neutron irradiation.

73 NUCLEAR PHYSICS AND RADIATION PHYSICS↗
DOE OSTI2024

Tunable Solid‐State Properties and Anisotropic Charge Mobility in Hydrogen‐Bonded Diketopyrrolopyrrole Polymers via Automated Device Fabrication and Characterization

The optoelectronic properties of semiconducting polymers and device performance rely on a delicate interplay of design and processing conditions. However, screening and optimizing the relationships between these parameters for reliably fabricating organic electronics can be an arduous task requiring significant time and resources. To overcome this challenge, Polybot is developed—a robotic platform within a self‐driving lab that can efficiently produce organic field‐effect transistors (OFETs) from various semiconducting polymers via high‐throughput blade coating deposition. Polybot not only handles the fabrication process but also can conduct characterization tests on the devices and autonomously analyze the data gathered, thus facilitating the rapid acquisition of data on a large scale. This work leverages the capabilities of this platform to investigate the fabrication of OFETs using hydrogen bonding‐containing semiconducting polymers. Through high‐throughput fabrication and characterization, various data trends are analyzed, and large extents of anisotropic charge mobility are observed in devices. The materials are thoroughly characterized to understand the role of processing conditions in solid state and electronic properties of these organic semiconductors. The findings demonstrate the effectiveness of automated fabrication and characterization platforms in uncovering novel structure–property relationships, facilitating refinement of rational chemical design, and processing conditions, ultimately leading to new semiconducting materials.

automated fabrication and characterization↗
DOE OSTI2024

Variation-Resilient FeFET-Based In-Memory Computing Leveraging Probabilistic Deep Learning

Reliability issues stemming from device level nonidealities of nonvolatile emerging technologies like ferroelectric field-effect transistors (FeFETs), especially at scaled dimensions, cause substantial degradation in the accuracy of in-memory crossbar-based AI systems. Here, in this work, we present a variation-aware design technique to characterize the device level variations and to mitigate their impact on hardware accuracy employing a Bayesian neural network (BNN) approach. An effective conductance variation model is derived from the experimental measurements of cycle-to-cycle (C2C) and device-to-device (D2D) variations performed on FeFET devices fabricated using 28 nm high-k metal gate technology. The variations were found to be a function of different conductance states within the given programming range, which sharply contrasts earlier efforts where a fixed variation dispersion was considered for all conductance values. Such variation characteristics formulated for three different device sizes at different read voltages were provided as prior variation information to the BNN to yield a more exact and reliable inference. Near-ideal accuracy for shallow networks (MLP5 and LeNet models) on the MNIST dataset and limited accuracy decline by ~3.8%–16.1% for deeper AlexNet models on CIFAR10 dataset under a wide range of variations corresponding to different device sizes and read voltages, demonstrates the efficacy of our proposed device-algorithm co-design technique.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2021

Charge Trapping in Polymer Electrets with Highly Dilute Blended Arylamine Donors

The nature of and ability to control biasing across dielectrics is a key area of research for the design of more versatile organic field-effect transistors (OFETs). One important technique to achieve such control is the inclusion of donor or acceptor molecules in the dielectric to modulate charge trapping therein. Here in this work, we report the effects of the additive concentration on OFETs with two different arylamines blended in polystyrene (PS) dielectrics, N,N'-diphenyl-N,N'-di-p-tolylbenzene-1,4-diamine (MPDA) and 4-anilinotriphenylamine (PATPA), as well as a comparison between PATPA/PS blends and dielectrics where PATPA was chemically tethered to the PS matrix. Dielectrics included in OFETs were subject to charging, and their charging capacity and stability were extracted from the OFET threshold voltages. For both MPDA/PS and PATPA/PS, blends with additive mole fractions as low as χ = 3 × 10 –4 were sufficient to cause increases in the charge trapping relative to pure PS dielectrics. We observed a pronounced inverse relationship between the capacity and stability of blended systems at larger mole fractions (χ = 10 –2 ) where the interadditive molecule distances became comparable to their size (~1 nm). Differences between MPDA and PATPA behaviors were consistent with their different structures and sizes. Furthermore, we found a small effect on electronic trapping arising from the chemical tethering of PATPA to the PS matrix. This result was consistent with the changes made to the additive during the tethering process and small compared to the observed differences arising from the concentration. These results suggest that the average intermolecular separation is a key determinant of charge storage stability in blended dielectrics.

36 MATERIALS SCIENCE↗
DOE OSTI2023

Nanoscale Ferroelectric Control of Novel Electronic States in Layered Two-Dimensional Materials (Final Report)

In this DOE Early Career project “Nanoscale Ferroelectric Control of Novel Electronic States in Layered Two-Dimensional Materials,” the PI’s group has combined ferroelectric field effect with nanoscale domain imaging and writing to design the electronic and optical properties of two-dimensional (2D) van der Waals materials, including graphene and transition metal dichalcogenides MoS2 and ReS2. The van der Waals materials have been prepared into field effect transistor (FET) devices with ferroelectric gates. Through domain patterning in a ferroelectric polymer PVDF-TrEF top-gate via conductive atomic force microscopy, the team has created programmable Schottky junctions in monolayer MoS 2 , where both barrier height and I-V rectifying polarity can be reconfigured. The transport anisotropy of monolayer to few-layer ReS 2 has been mapped out by defining the entire channel into an insulating state and creating nanoscale conducting paths along different directions through domain writing in the ferroelectric top-gate. The result shows that the conductivity along and perpendicular to the Re-chain can differ by >5.5x10 4 . Theoretical modeling points to the band origin of the transport anomaly and reveals the emergence of a flat band in few-layer ReS 2 . The interfacial epitaxial relation between ReS 2 and PVDF-TrFE further promotes the formation of close-packed, highly ordered PVDF-TrFE nanowires with width of 35 nm and 10 nm. Nonvolatile modulation of quantum Hall effect has been achieved in graphene FETs with a ferroelectric oxide Ba 0.4 Sr 0.6 TiO 3 back-gate. Scattering from the remote surface optical phonon in Ba 0.4 Sr 0.6 TiO 3 limits the room temperature mobility of graphene to be about 3x10 4 cm 2 /Vs. Steep-slope switching has been achieved in MoS 2 FETs back-gated by polycrystalline Pb(Zr,Ti)O 3 , which signals a static-state negative capacitance mode without involving an additional dielectric layer. Piezoresponse force microscopy studies show that the sub-threshold swing can be well correlated with the domain wall density in Pb(Zr,Ti)O 3 . The team also observes an unconventional filtering effect of the second harmonic generation response at the MoS 2 /Pb(Zr,Ti)O 3 heterointerface, which can be accounted for by the alignment between one of the polar axes of MoS 2 and the chiral dipole rotation at the surface of domain wall in Pb(Zr,Ti)O 3 . The research supported by this DOE grant has significantly advanced the fundamental understanding and functional design of ferroelectric/2D van der Waals heterostructures for their implementation towards energy applications.

36 MATERIALS SCIENCE↗
DOE OSTI2020

Highly Emissive Semi-Ladder-Type Copolymers, Aggregation State, and Solution-Processed Organic Light-Emitting Transistor

An organic light-emitting transistor (OLET) integrates the logic function of a field-effect transistor (FET) with electroluminescence of a light-emitting diode (LED) into a single device. This has the potential to play an important role in smart displays, electrically pumped organic laser, and other flexible electronic devices. For achieving high-performance solution-processed OLET, three semiladder copolymers—TPTI-CC, TPTI-C, and TPTI-F—were developed in this study. It was found that variation in the chemical structure lead to significant differences in energy level, emission color, and intermolecular aggregation. High photoluminescence quantum yields (PLQY) was obtained in these three polymers. Solution-processed trilayered OLET devices were fabricated, which exhibited strong electroluminescence, balanced charge mobility, and external quantum efficiency (EQE) of 2.8%.

36 MATERIALS SCIENCE↗
DOE OSTI2020

Synergistic Use of Pyridine and Selenophene in a Diketopyrrolopyrrole‐Based Conjugated Polymer Enhances the Electron Mobility in Organic Transistors

Abstract To achieve semiconducting materials with high electron mobility in organic field‐effect transistors (OFETs), low‐lying energy levels (the highest occupied molecular orbital (HOMO) and the lowest unoccupied molecular orbital (LUMO)) and favorable molecular packing and ordering are two crucial factors. Here, it is reported that the incorporation of pyridine and selenophene into the backbone of a diketopyrrolopyrrole (DPP)‐based copolymer produces a high‐electron‐mobility semiconductor, PDPPy‐Se. Compared with analogous polymers based on other DPP derivatives and selenophene, PDPPy‐Se features a lower LUMO that can decrease the electron transfer barrier for more effective electron injection, and simultaneously a lower HOMO that, however, can increase the hole transfer barrier to suppress the hole injection. Combined with thermal annealing at 240 °C for thin film morphology optimization to achieve large‐scale crystallite domains with tight molecular packing for effective charge transport along the conducting channel, OFET devices fabricated with PDPPy‐Se exhibit an n‐type‐dominant performance with an electron mobility (μ e ) as high as 2.22 cm 2 V −1 s −1 and a hole/electron mobility ratio (μ h /μ e ) of 0.26. Overall, this study demonstrates a simple yet effective approach to boost the electron mobility in organic transistors by synergistic use of pyridine and selenophene in the backbone of a DPP‐based copolymer.

Liu, Qian↗
DOE OSTI2026

Physical Modeling and Design of a Nonvolatile Optically Gated High‐Power Diamond Transistor

In this work, we present the theory and modeling framework of a diamond optically gated junction field‐effect transistor (DOGFET). The device utilizes nitrogen substitutional centers in type‐1b diamond to optically modulate a p‐ boron doped diamond channel. Using sub‐gap lasers with intensities as low as 100 W/cm 2 , electrons are optically excited from substitutional nitrogen sites to the conduction band of the diamond substrate, thus enabling the optical gate to exercise control on modulating the space‐charge region at the junction and therefore the channel conductivity. We show that the device can deliver a current of 7 μA/μm, or equivalently 1750 A/cm 2 , while switching at a frequency greater than 100 kHz, in a form factor of 5 μm 2 . The breakdown voltage is found to be greater than 1850 V, with a breakdown field strength of ~13 MV/cm. Moreover, the device supports nonvolatile operation with a “memory effect” enabling single transistor state retention. The presented simulation framework provides a physically grounded insight into the limits and opportunities of optoelectronic diamond systems.

Engineering - Electronic and electrical engineerin↗
NASA NTRS1980

Semiconductor step-stress testing

Report describes extensive program to test behavior of discrete diodes and transistors subjected to power and temperature overstress. Commercially available bipolar and field effect transistors and diodes were stressed between 0.5 and 1.75 times maximum rated power. Two groups were temperature stressed: 160 hour steps starting at 75 C to maximum of 300 C. Cumulative failures and changes in device parameters were monitored and reasons for failures presented.

Source record↗
NASA NTRS1991

Silicon device performance measurements to support temperature range enhancement

The results of the NPN bipolar transistor (BJT) (2N6023) breakdown voltage measurements were analyzed. Switching measurements were made on the NPN BJT, the insulated gate bipolar transistor (IGBT) (TA9796) and the N-channel metal oxide semiconductor field effect transistor (MOSFET) (RFH75N05E). Efforts were also made to build a H-bridge inverter. Also discussed are the plans that have been made to do life testing on the devices, to build an inductive switching test circuit and to build a dc/dc switched mode converter.

Johnson, R. Wayne↗
NASA NTRS2017

Prolonged 500 C Operation of 100+ Transistor Silicon Carbide Integrated Circuits

This report describes more than 5000 hours of successful 500 C operation of semiconductor integrated circuits (ICs) with more than 100 transistors. Multiple packaged chips with two different 4H-SiC junction field effect transistor (JFET) technology demonstrator circuits have surpassed thousands of hours of oven-testing at 500 C. After 100 hours of 500 C burn-in, the circuits (except for 2 failures) exhibit less than 10 change in output characteristics for the remainder of 500C testing. We also describe the observation of important differences in IC materials durability when subjected to the first nine constituents of Venus-surface atmosphere at 9.4 MPa and 460C in comparison to what is observed for Earth-atmosphere oven testing at 500 C.

Silicon Carbid↗
NASA NTRS2017

Prolonged 500 C Operation of 100+ Transistor Silicon Carbide Integrated Circuits

This report describes more than 5000 hours of successful 500 C operation of semiconductor integrated circuits (ICs) with more than 100 transistors. Multiple packaged chips with two different 4H-SiC junction field effect transistor (JFET) technology demonstrator circuits have surpassed thousands of hours of oven-testing at 500 C. After 100 hours of 500 C burn-in, the circuits (except for 2 failures) exhibit less than 10% change in output characteristics for the remainder of 500 C testing. We also describe the observation of important differences in IC materials durability when subjected to the first nine constituents of Venus-surface atmosphere at 9.4 MPa and 460 C in comparison to what is observed for Earth-atmosphere oven testing at 500 C.

Spry, David J.↗
NASA NTRS1996

Silicon Carbide Transistor For Detecting Hydrocarbon Gases

Proposed silicon carbide variable-potential insulated-gate field-effect transistor specially designed for use in measuring concentrations of hydrocarbon gases. Devices like this prove useful numerous automotive, industrial, aeronautical, and environmental monitoring applications.

Shields, Virgil B.↗