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NASA NTRS1975

Automatic computer controlled testing of spacecraft and experiments

Autotest is a flexible, fully automatic, programmable test system. It is externally controlled by a mnemonic test language. Once started, tests can run to completion without further manual intervention. Autotest can be operated manually as well as in automatic mode. Autotest can be adapted to a wide variety of test requirements. Though originally designed to test the Atmosphere Explorer (AE) spacecraft and experiments, autotest can easily be modified to test any electronic device suitable for automated computer testing.

Blakeslee, W. D.↗

NASA NTRS1998

Refurbishment and Automation of Thermal Vacuum Facilities at NASA/GSFC

The thermal vacuum facilities located at the Goddard Space Flight Center (GSFC) have supported both manned and unmanned space flight since the 1960s. Of the eleven facilities, currently ten of the systems are scheduled for refurbishment or replacement as part of a five-year implementation. Expected return on investment includes the reduction in test schedules, improvements in safety of facility operations, and reduction in the personnel support required for a test. Additionally, GSFC will become a global resource renowned for expertise in thermal engineering, mechanical engineering, and for the automation of thermal vacuum facilities and tests. Automation of the thermal vacuum facilities includes the utilization of Programmable Logic Controllers (PLCs), the use of Supervisory Control and Data Acquisition (SCADA) systems, and the development of a centralized Test Data Management System. These components allow the computer control and automation of mechanical components such as valves and pumps. The project of refurbishment and automation began in 1996 and has resulted in complete computer control of one facility (Facility 281), and the integration of electronically controlled devices and PLCs in multiple others.

Dunn, Jamie↗

NASA NTRS1999

Refurbishment and Automation of Thermal Vacuum Facilities at NASA/GSFC

Dunn, Jamie↗

NASA NTRS2011

SNE Industrial Fieldbus Interface

Programmable logic controllers (PLCs) have very limited diagnostic and no prognostic capabilities, while current smart sensor designs do not have the capability to communicate over Fieldbus networks. The aim is to interface smart sensors with PLCs so that health and status information, such as failure mode identification and measurement tolerance, can be communicated via an industrial Fieldbus such as ControlNet. The SNE Industrial Fieldbus Interface (SIFI) is an embedded device that acts as a communication module in a networked smart sensor. The purpose is to enable a smart sensor to communicate health and status information to other devices, such as PLCs, via an industrial Fieldbus networking protocol. The SNE (Smart Network Element) is attached to a commercial off-the-shelf Any bus-S interface module through the SIFI. Numerous Anybus-S modules are available, each one designed to interface with a specific Fieldbus. Development of the SIFI focused on communications using the ControlNet protocol, but any of the Anybus-S modules can be used. The SIFI communicates with the Any-bus module via a data buffer and mailbox system on the Anybus module, and supplies power to the module. The Anybus module transmits and receives data on the Fieldbus using the proper protocol. The SIFI is intended to be connected to other existing SNE modules in order to monitor the health and status of a transducer. The SIFI can also monitor aspects of its own health using an onboard watchdog timer and voltage monitors. The SIFI also has the hardware to drive a touchscreen LCD (liquid crystal display) unit for manual configuration and status monitoring.

Lucena, Angel↗

NASA NTRS1992

JPL activities on development of acousto-optic tunable filter imaging spectrometer

Recent activities of JPL in the development of a new type of imaging spectrometers for earth observation and planetary exploration are reported. This instrument uses the acousto-optic tunable filter (AOTF) as high resolution and fast programmable bandpass filter. AOTF operates in the principle of acousto-optic interaction in an anisotropic medium. This filter can be tuned in sequential, random, and multiwavelength access modes, providing observational flexibility. The diffraction process in the filter generates two diffracted monochromatic beams with polarization orthogonal to each other, creating a unique capability to measure both polarimetric and spectral properties of the incoming light simultaneously with a single instrument. The device gives wide wavelength operations with reasonably large throughput. In addition, it is in a compact solid-state structure without moving parts, providing system reliability. These attractive features give promising opportunities to develop a new generation of airborne/spaceborne and ground, real-time, imaging spectrometer systems for remote sensing applications.

Cheng, Li-Jen↗

NASA NTRS1976

Selective data segment monitoring system

High speed data monitoring apparatus is described for displaying the bit pattern of a selected portion of a block of transmitted data comprising a shift register for receiving the transmitted data and for temporarily containing the consecutive data bits. A programmable sync detector for monitoring the contents of the shift register and for generating a sync signal when the shift register contains a predetermined sync code is included. A counter is described for counting the data bits input to the shift register after the sync signal is generated and for generating a count complete signal when a selected number of data bits have been input to the register. A data storage device is used for storing the contents of the shift register at the time the count complete signal is generated.

Wirth, M. N.↗

NASA NTRS2013

An Offload NIC for NASA, NLR, and Grid Computing

This work addresses distributed data management and access dynamically configurable high-speed access to data distributed and shared over wide-area high-speed network environments. An offload engine NIC (network interface card) is proposed that scales at nX10-Gbps increments through 100-Gbps full duplex. The Globus de facto standard was used in projects requiring secure, robust, high-speed bulk data transport. Novel extension mechanisms were derived that will combine these technologies for use by GridFTP, bandwidth management resources, and host CPU (central processing unit) acceleration. The result will be wire-rate encrypted Globus grid data transactions through offload for splintering, encryption, and compression. As the need for greater network bandwidth increases, there is an inherent need for faster CPUs. The best way to accelerate CPUs is through a network acceleration engine. Grid computing data transfers for the Globus tool set did not have wire-rate encryption or compression. Existing technology cannot keep pace with the greater bandwidths of backplane and network connections. Present offload engines with ports to Ethernet are 32 to 40 Gbps f-d at best. The best of ultra-high-speed offload engines use expensive ASICs (application specific integrated circuits) or NPUs (network processing units). The present state of the art also includes bonding and the use of multiple NICs that are also in the planning stages for future portability to ASICs and software to accommodate data rates at 100 Gbps. The remaining industry solutions are for carrier-grade equipment manufacturers, with costly line cards having multiples of 10-Gbps ports, or 100-Gbps ports such as CFP modules that interface to costly ASICs and related circuitry. All of the existing solutions vary in configuration based on requirements of the host, motherboard, or carriergrade equipment. The purpose of the innovation is to eliminate data bottlenecks within cluster, grid, and cloud computing systems, and to add several more capabilities while reducing space consumption and cost. Provisions were designed for interoperability with systems used in the NASA HEC (High-End Computing) program. The new acceleration engine consists of state-ofthe- art FPGA (field-programmable gate array) core IP, C, and Verilog code; novel communication protocol; and extensions to the Globus structure. The engine provides the functions of network acceleration, encryption, compression, packet-ordering, and security added to Globus grid or for cloud data transfer. This system is scalable in nX10-Gbps increments through 100-Gbps f-d. It can be interfaced to industry-standard system-side or network-side devices or core IP in increments of 10 GigE, scaling to provide IEEE 40/100 GigE compliance.

Awrach, James↗

NASA NTRS2014

SpaceCube v2.0 Space Flight Hybrid Reconfigurable Data Processing System

This paper details the design architecture, design methodology, and the advantages of the SpaceCube v2.0 high performance data processing system for space applications. The purpose in building the SpaceCube v2.0 system is to create a superior high performance, reconfigurable, hybrid data processing system that can be used in a multitude of applications including those that require a radiation hardened and reliable solution. The SpaceCube v2.0 system leverages seven years of board design, avionics systems design, and space flight application experiences. This paper shows how SpaceCube v2.0 solves the increasing computing demands of space data processing applications that cannot be attained with a standalone processor approach.The main objective during the design stage is to find a good system balance between power, size, reliability, cost, and data processing capability. These design variables directly impact each other, and it is important to understand how to achieve a suitable balance. This paper will detail how these critical design factors were managed including the construction of an Engineering Model for an experiment on the International Space Station to test out design concepts. We will describe the designs for the processor card, power card, backplane, and a mission unique interface card. The mechanical design for the box will also be detailed since it is critical in meeting the stringent thermal and structural requirements imposed by the processing system. In addition, the mechanical design uses advanced thermal conduction techniques to solve the internal thermal challenges.The SpaceCube v2.0 processing system is based on an extended version of the 3U cPCI standard form factor where each card is 190mm x 100mm in size The typical power draw of the processor card is 8 to 10W and scales with application complexity. The SpaceCube v2.0 data processing card features two Xilinx Virtex-5 QV Field Programmable Gate Arrays (FPGA), eight memory modules, a monitor FPGA with analog monitoring, Ethernet, configurable interconnect to the Xilinx FPGAs including gigabit transceivers, and the necessary voltage regulation. The processor board uses a back-to-back design methodology for common parts that maximizes the board real estate available. This paper will show how to meet the IPC 6012B Class 3A standard with a 22-layer board that has two column grid array devices with 1.0mm pitch. All layout trades such as stack-up options, via selection, and FPGA signal breakout will be discussed with feature size results. The overall board design process will be discussed including parts selection, circuit design, proper signal termination, layout placement and route planning, signal integrity design and verification, and power integrity results. The radiation mitigation techniques will also be detailed including configuration scrubbing options, Xilinx circuit mitigation and FPGA functional monitoring, and memory protection.Finally, this paper will describe how this system is being used to solve the extreme challenges of a robotic satellite servicing mission where typical space-rated processors are not sufficient enough to meet the intensive data processing requirements. The SpaceCube v2.0 is the main payload control computer and is required to control critical subsystems such as autonomous rendezvous and docking using a suite of vision sensors and object avoidance when controlling two robotic arms.

Xilinx FPGA↗

NASA NTRS1994

A programmable heater control circuit for spacecraft

Spacecraft thermal control is accomplished for many components through use of multilayer insulation systems, electrical heaters, and radiator systems. The heaters are commanded to maintain component temperatures within design specifications. The programmable heater control circuit (PHCC) was designed to obtain an effective and efficient means of spacecraft thermal control. The hybrid circuit provides use of control instrumentation as temperature data, available to the spacecraft central data system, reprogramming capability of the local microprocessor during the spacecraft's mission, and the elimination of significant spacecraft wiring. The hybrid integrated circuit has a temperature sensing and conditioning circuit, a microprocessor, and a heater power and control circuit. The device is miniature and housed in a volume which allows physical integration with the component to be controlled. Applications might include alternate battery-powered logic-circuit configurations. A prototype unit with appropriate physical and functional interfaces was procured for testing. The physical functionality and the feasibility of fabrication of the hybrid integrated circuit were successfully verified. The remaining work to develop a flight-qualified device includes fabrication and testing of a Mil-certified part. An option for completing the PHCC flight qualification testing is to enter into a joint venture with industry.

Nguyen, D. D.↗

NASA NTRS2016

Single Event Effects in FPGA Devices 2015-2016

This presentation provides an overview of single event effects in FPGA devices 2015-2016 including commercial Xilinx V5 heavy ion accelerated testing, Xilinx Kintex-7 heavy ion accelerated testing, mitigation study, and investigation of various types of triple modular redundancy (TMR) for commercial SRAM based FPGAs.

Xilinx V5↗

NASA NTRS1995

Sensor Systems for Space Life Sciences

Sensors 2000! (S2K!) is a NASA Ames Research Center engineering initiative designed to provide biosensor and bio-instrumentation systems technology expertise to NASA's life sciences spaceflight programs. S2K! covers the full spectrum of sensor technology applications, ranging from spaceflight hardware design and fabrication to advanced technology development, transfer and commercialization. S2K! is currently developing sensor systems for space biomedical applications on BION (a Russian biosatellite focused on Rhesus Monkey physiology) and NEUROLAB (a Space Shuttle flight devoted to neuroscience). It's Advanced Technology Development-Biosensors (ATD-B) project focuses efforts in five principle areas: biotelemetry Systems, chemical and biological sensors, physiological sensors, advanced instrumentation architectures, and data and information management. Technologies already developed and tested included, application-specific sensors, preamplifier hybrids, modular programmable signal conditioners, power conditioning and distribution systems, and a fully implantable dual channel biotelemeter. Systems currently under development include a portable receiver system compatible with an off-the-shelf analog biotelemeter, a 4 channel digital biotelemetry system which monitors pH, a multichannel, g-processor based PCM biotelemetry system, and hand-held personal monitoring systems. S2K! technology easily lends itself to telescience and telemedicine applications as a front-end measurement and data acquisition device, suitable for obtaining and configuring physiological information, and processing that information under control from a remote location.

Somps, Chris J.↗

NASA NTRS2004

Enhancements to a Superconducting Quantum Interference Device (SQUID) Multiplexer Readout and Control System

Far-infrared detector arrays such as the 16x32 superconducting bolometer array for the SAFIRE instrument (flying on the SOFIA airborne observatory) require systems of readout and control electronics to provide translation between a user-driven, digital PC and the cold, analog world of the cryogenic detector. In 2001, the National Institute of Standards and Technology (NIST) developed their Mark III electronics for purposes of control and readout of their 1x32 SQUID Multiplexer chips. We at NASA s Goddard Space Flight Center acquired a Mark 111 system and subsequently designed upgrades to suit our and our collaborators purposes. We developed an arbitrary, programmable multiplexing system that allows the user to cycle through rows in a SQUID array in an infinite number of combinations. We provided hooks in the Mark III system to allow readout of signals from outside the Mark 111 system, such as telescope status information. Finally, we augmented the heart of the system with a new feedback algorithm implementation, flexible diagnostic tools, and informative telemetry.

Forgione, J.↗

NASA NTRS1998

Refurbishment and Automation of the Thermal/Vacuum Facilities at the Goddard Space Flight Center

The thermal/vacuum facilities located at the Goddard Space Flight Center (GSFC) have supported both manned and unmanned space flight since the 1960s. Of the 11 facilities, currently 10 of the systems are scheduled for refurbishment and/or replacement as part of a 5-year implementation. Expected return on investment includes the reduction in test schedules, improvements in the safety of facility operations, reduction in the complexity of a test and the reduction in personnel support required for a test. Additionally, GSFC will become a global resource renowned for expertise in thermal engineering, mechanical engineering and for the automation of thermal/vacuum facilities and thermal/vacuum tests. Automation of the thermal/vacuum facilities includes the utilization of Programmable Logic Controllers (PLCs) and the use of Supervisory Control and Data Acquisition (SCADA) systems. These components allow the computer control and automation of mechanical components such as valves and pumps. In some cases, the chamber and chamber shroud require complete replacement while others require only mechanical component retrofit or replacement. The project of refurbishment and automation began in 1996 and has resulted in the computer control of one Facility (Facility #225) and the integration of electronically controlled devices and PLCs within several other facilities. Facility 225 has been successfully controlled by PLC and SCADA for over one year. Insignificant anomalies have occurred and were resolved with minimal impact to testing and operations. The amount of work remaining to be performed will occur over the next four to five years. Fiscal year 1998 includes the complete refurbishment of one facility, computer control of the thermal systems in two facilities, implementation of SCADA and PLC systems to support multiple facilities and the implementation of a Database server to allow efficient test management and data analysis.

Donohue, John T.↗

NASA NTRS1995

Prototype Focal-Plane-Array Optoelectronic Image Processor

Prototype very-large-scale integrated (VLSI) planar array of optoelectronic processing elements combines speed of optical input and output with flexibility of reconfiguration (programmability) of electronic processing medium. Basic concept of processor described in "Optical-Input, Optical-Output Morphological Processor" (NPO-18174). Performs binary operations on binary (black and white) images. Each processing element corresponds to one picture element of image and located at that picture element. Includes input-plane photodetector in form of parasitic phototransistor part of processing circuit. Output of each processing circuit used to modulate one picture element in output-plane liquid-crystal display device. Intended to implement morphological processing algorithms that transform image into set of features suitable for high-level processing; e.g., recognition.

Fang, Wai-Chi↗

NASA NTRS2006

Microshutter Arrays for the JWST NIRSpec

A primary goal of the James Webb Space Telescope (JWST) is to characterize the birth and evolution of galaxies by imaging and spectroscopic observations. The telescope will use a Near Infrared Camera and a Near Infrared Spectrometer (NIRSpec) to carry out this program. The 3.6 x 3.6 field of NIRSpec will contain thousands of candidate high redshift galaxies. With such a high candidate object density, simultaneous multi-object capability is essential. This capability requires a programmable object selection mask to eliminate sky background and to reduce source confusion caused. We are developing a two-dimensional programmable field mask for NIRSpec. These masks employ micromechanical (MEMS) techniques to provide source selection over the NIRSpec field of view. The first flight format arrays (171x365 shutters) have been fabricated and full functionality of these arrays has been demonstrated in lab tests. Qualification tests are in progress to demonstrate readiness for flight, and will be complete in the early fall of 2006. In this paper, I describe performance of this critical new technology, and progress in making the devices ready for a 2008 delivery to ESA for inclusion in the NIRSpec.

Moseley, Samuel H.↗

NASA NTRS2009

FPGA-Based Networked Phasemeter for a Heterodyne Interferometer

A document discusses a component of a laser metrology system designed to measure displacements along the line of sight with precision on the order of a tenth the diameter of an atom. This component, the phasemeter, measures the relative phase of two electrical signals and transfers that information to a computer. Because the metrology system measures the differences between two optical paths, the phasemeter has two inputs, called measure and reference. The reference signal is nominally a perfect square wave with a 50- percent duty cycle (though only rising edges are used). As the metrology system detects motion, the difference between the reference and measure signal phases is proportional to the displacement of the motion. The phasemeter, therefore, counts the elapsed time between rising edges in the two signals, and converts the time into an estimate of phase delay. The hardware consists of a circuit board that plugs into a COTS (commercial, off-the- shelf) Spartan-III FPGA (field-programmable gate array) evaluation board. It has two BNC inputs, (reference and measure), a CMOS logic chip to buffer the inputs, and an Ethernet jack for transmitting reduced-data to a PC. Two extra BNC connectors can be attached for future expandability, such as external synchronization. Each phasemeter handles one metrology channel. A bank of six phasemeters (and two zero-crossing detector cards) with an Ethernet switch can monitor the rigid body motion of an object. This device is smaller and cheaper than existing zero-crossing phasemeters. Also, because it uses Ethernet for communication with a computer, instead of a VME bridge, it is much easier to use. The phasemeter is a key part of the Precision Deployable Apertures and Structures strategic R&D effort to design large, deployable, segmented space telescopes.

Rao, Shanti↗

NASA NTRS2010

Modeling of Sonos Memory Cell Erase Cycle

Silicon-oxide-nitride-oxide-silicon (SONOS) nonvolatile semiconductor memories (NVSMS) have many advantages. These memories are electrically erasable programmable read-only memories (EEPROMs). They utilize low programming voltages, endure extended erase/write cycles, are inherently resistant to radiation, and are compatible with high-density scaled CMOS for low power, portable electronics. The SONOS memory cell erase cycle was investigated using a nonquasi-static (NQS) MOSFET model. The SONOS floating gate charge and voltage, tunneling current, threshold voltage, and drain current were characterized during an erase cycle. Comparisons were made between the model predictions and experimental device data.

Phillips, Thomas A.↗

NASA NTRS2002

Tightly Coupled Inertial Navigation System/Global Positioning System (TCMIG)

Many NASA applications planned for execution later this decade are seeking high performance, miniaturized, low power Inertial Management Units (IMU). Much research has gone into Micro-Electro-Mechanical System (MEMS) over the past decade as a solution to these needs. While MEMS devices have proven to provide high accuracy acceleration measurements, they have not yet proven to have the accuracy required by many NASA missions in rotational measurements. Therefore, a new solution has been formulated integrating the best of all IMU technologies to address these mid-term needs in the form of a Tightly Coupled Micro Inertial Navigation System (INS)/Global Positioning System (GPS) (TCMIG). The TCMIG consists of an INS and a GPS tightly coupled by a Kalman filter executing on an embedded Field Programmable Gate Array (FPGA) processor. The INS consists of a highly integrated Interferometric Fiber Optic Gyroscope (IFOG) and a MEMS accelerometer. The IFOG utilizes a tightly wound fiber coil to reduce volume and the high level of integration and advanced optical components to reduce power. The MEMS accelerometer utilizes a newly developed deep etch process to increase the proof mass and yield a highly accurate accelerometer. The GPS receiver consists of a low power miniaturized version of the Blackjack receiver. Such an IMU configuration is ideal to meet the mid-term needs of the NASA Science Enterprises and the new launch vehicles being developed for the Space Launch Initiative (SLI).

Watson, Michael D.↗