Engineering Papers⌕ Search

SEARCH · Engineering Papers

Results for “logic”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 307 records · Page 17
All sourcesNASA NTRSDOE OSTI
DOE OSTI2024

Direct pulse-level compilation of arbitrary quantum logic gates on superconducting qutrits

Advanced simulations and calculations on quantum computers require high-fidelity implementations of quantum operations. The universal gateset approach builds complex unitaries from a small set of primitive gates, often resulting in a long gate sequence, which is typically a leading factor in the total accumulated error. Compiling a complex unitary for processors with higher-dimensional logical elements, such as qutrits, exacerbates the accumulated error per unitary, since an even longer gate sequence is required. Optimal control methods promise time- and resource-efficient compact gate sequences and, therefore, higher fidelity. These methods generate pulses that can directly implement any complex unitary on a quantum device. In this work, we demonstrate that any arbitrary qubit and qutrit gate can be realized with high fidelity, which can significantly reduce the length of a gate sequence. We generate and test pulses for a large set of randomly selected arbitrary unitaries on several quantum processing units (QPUs): the Lawrence Livermore National Laboratory Quantum Device and Integration Testbed’s (QuDIT’s) standard QPU and three of Rigetti’s QPUs: Ankaa-2, Ankaa-9Q-1, and Aspen-M-3. On the QuDIT platform’s standard QPU, the average fidelity of random qutrit gates is 97.9 ± 0.5% measured with conventional QPT and 98.8 ± 0.6% from QPT with gate folding. Rigetti’s Ankaa-2 achieves random qubit gates with an average fidelity of 98.4 ± 0.5% (conventional QPT) and 99.7 ± 0.1% (QPT with gate folding). On Ankaa-9Q-1 and Aspen-M-3, the average fidelities with conventional qubit QPT measurements were higher than 99% (see Appendix). Here we show that optimal control gates are robust to drift for at least 3 h and that the same calibration parameters can be used for all implemented gates. Our work promises that the calibration overheads for optimal control gates can be made small enough to enable efficient quantum circuits based on this technique.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
DOE OSTI2020

Braiding Majorana fermions and creating quantum logic gates with vortices on a periodic pinning structure

We show how vortices that support Majorana fermions when placed on a periodic pinning array can be used for vortex exchange and independent braiding by performing a series of specific moves with a probe tip. Using these braiding operations, we demonstrate realizations of a Hadamard and a CNOT gate. We specifically consider the first matching field at which there is one vortex per pinning site, and we show that there are two basic dynamic operations, move and exchange, from which basic braiding operations can be constructed in order to create specific logic gates. The periodic pinning array permits both control of the world lines of the vortices and freedom for vortex manipulation using a set of specific moves of the probe during which the probe tip strength and height remain unchanged. We measure the robustness of the different moves against thermal effects and show that the three different operations produce distinct force signatures on the moving tip.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
DOE OSTI2025

A Robust Communication-Free Protection Scheme for Islanded Microgrids with Relay Logic and Hardware-in-the-Loop Validation

This paper presents the Imbalance Square Factor (ISF) detection algorithm, an effective, computationally lightweight method for detecting faults in inverter-based microgrids. ISF provides a high magnitude at the time of the fault, which allows for fast detection and coordination between primary and backup relays. The imbalance squared factor, calculated using local voltage and currents, is used for fault detection and coordination among three relays. ISF is validated in hardware-in-the-loop (HIL) implementation inside commercial-grade relay logic (SEL-751). The HIL validation shows that ISF can coordinate primary, secondary, and tertiary relays in the 13-bus system in islanded operation.

Ferrari Maglia, Max [ORNL]↗
DOE OSTI2020

Signal Temporal Logic Control for Residential HVAC Systems to Accommodate High Solar PV Penetration

This paper proposes a new signal temporal logic (STL) control for ON/OFF residential buildings' Heating Ventilation and Air Conditioning (HVAC) systems. STL is used to control indoor temperatures while consuming most of the generated solar photovoltaic (PV) power locally to minimize its impact on the grid and reduce the need for large energy storage devices. In contrast to most, if not all, control mechanisms such as the traditional model predictive control (MPC), STL control allows for including temporal constraints in the control formulation to further relax indoor temperatures' constraints and allow them to exceed the comfort band limits for a prespecified (short) period of time. This relaxation allows to consume an additional PV power by the HVAC systems, which prevents such an unwanted intermittent power from affecting the grid. We formulate the MPC-based STL control mechanism to implement the objective. Simulation results show that the PV tracking performance has been improved while employing the proposed STL controller.

Wu, Tumin↗
DOE OSTI2020

Voltage Restoration in Microgrids using Temporal Logic Specifications

This paper proposes an energy storage controller synthesis method for voltage restoration in microgrids with respect to temporal logic specifications (TLSs). TLSs is introduced in this paper as a formalism to control the voltage variation of a critical bus against an operational bounds over time. The power system with synchronous generator (SG) connected to a critical load bus is modeled as a set of differential-algebraic equations and a simplified analytical model is derived to describe the voltage variation of this critical bus. The control objective is to schedule an optimal control input signal from a supportive energy storage system (ESS) connected to the critical bus, such that the voltage variation of the latter satisfies the TLSs, such as a finite-time restoration. The proposed control is verified on a lumped distribution system model. With this control diagram, supportive controllers can be designed to make voltage behaviors comply with grid codes and avoid unnecessary relay actions.

Taousser, Fatima Zohra↗
DOE OSTI2021

On the Limits of EM Based Detection of Control Logic Injection Attacks In Noisy Environments

The difficulty in applying traditional security mechanisms in Industrial Control System (ICS) environments makes a large portion of these mission-critical assets vulnerable to cyber attacks. Therefore, there is a dire need for the development of novel security mechanisms specifically designed to protect such critical systems. Recently a lot of attention has been given to mechanisms that exploit the EM emanations of devices for defense purposes. Such practices may lead to the development of robust external and non-intrusive anomaly detection systems. Nevertheless, the majority of current work in the area neglects to consider the implications of real-life environments, particularly environmental noise. In this work, we explore the limits of EM-based anomaly detection towards identifying injection attacks in control logic software in noisy environments. Our study conducted upon both synthetically generated and real signals identified that indeed environmental noise might significantly degrade the accuracy of the anomaly detection process. Experiments done upon synthetic data indicated that assuming that signals are captured with high sampling rates, even minor code injections can be detected with above-90% accuracy in noisy environments where SNR is up to -2dB. This is true even if naive detection methods are considered. Moreover, experiments done using a real-life testbed attest that even single-instruction injections can be detected with near-perfect accuracy in relatively clean environments. Finally, noise-elimination techniques can drastically improve the reliability of the detection mechanism even in noisy environments.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2022

Implementation of ASHRAE Guideline 36 Control Logic into Oak Ridge National Laboratory (ORNL)’s Flexible Research Platform (FRP)

This report presents the initial field test procedure and results for ASHRAE Guideline 36 control logic. The US Department of Energy’s Oak Ridge National Laboratory’s (ORNL’s) two-story Flexible Research Platform (FRP-2) was selected as a test building. The rooftop unit (RTU) system serves as the building’s primary cooling system, and each variable air volume (VAV) box with an electric reheat coil serves as the building’s heating system along with RTU gas furnace. In this study, the control for the RTU and VAV box adopted the practical control sequences from ASHRAE Guideline 36-2018: High-Performance Sequences of Operation. Each story of the FRP-2 building has 5 office zones (thermal zones), for a total of 10 zones.

32 ENERGY CONSERVATION, CONSUMPTION, AND UTILIZATI↗
DOE OSTI2024

Shorter function summaries for finite state machine-based high consequence systems using logic synthesis and tautologies (Final Report LDRD 24-1302)

Computer programs are often viewed as collections of functions – each function has parameters (inputs) and computes a return value, and each has potential side effects that modify program state (outputs). In this research, a Sandia symbolic execution tool designed to support “human-in-the-loop” analysis was modified to automatically create “function summaries,” and a new tool, “diaboolical,” was created to support enhancing readability of the summary using a novel approach to bit-vector simplification that leverages logic synthesis and tautologies. For this effort, students at Auburn University created several finite state machines (FSMs) to serve as exemplars for high-consequence systems. Function summaries for each of the machines were obtained, and then portions of the summaries were simplified using both diaboolical and the simplification procedure of a popular SMT solver. A comparison of the results shows that diaboolical can often produce smaller function summaries, with expression length improvements over the unsimplified function summaries ranging from 0% to 90% for diaboolical and 0% to 65% for the SMT solver, though diaboolical had a significantly greater cost in time. Diaboolical was evaluated against a collection of “arbitrary” C-code as well as FSM exemplars, and for both datasets it achieved an approximately 10% improvement in expression length compared to simplifications that could be obtained using existing techniques. Function summaries can assist assurance efforts that evaluate existing systems and their executable code. A smaller function summary is likely easier for humans to understand and could thus increase the ability and efficacy of assurance practices centered around the analysis of executable artifacts.

97 MATHEMATICS AND COMPUTING↗
NASA NTRS1965

Binary counter uses fluid logic elements

Binary counter with two fluid flip-flops in each stage has an output taken from the output of the second flip-flop. The flip-flops each contain three fluid logic elements.

Source record↗
NASA NTRS1966

Queuing register uses fluid logic elements

Queuing register /a multistage bit-shifting device/ uses a series of pure fluid elements to perform the required logic operations. The register has several stages of three-state pure fluid elements combined with two-input NOR gates.

Source record↗
NASA NTRS1966

Nixie tube display unit employs time-shared logic

Cathodes of display tubes wired in parallel achieve input switching simplification of a Nixie tube display system. Use of time- shared logic energizes the appropriate anode and inhibits all unnecessary cathodes.

Gray, J.↗
NASA NTRS1966

Logic circuitry used to automatically test shielded cables

Automatic cable tester checks multiple shielded conductors assembly cable connections. The tester uses logic circuitry to sequentially test all conductors and their shields to reveal any connection error in a GO-NO GO test.

Dibb, G.↗
NASA NTRS1967

Review of research and development in fluid logic elements

Research and development in multistate fluid logic elements is reviewed in a historical and critical report. The report concludes that in the development of fluid amplifiers, there are elements with very high gain and poor switching speed, and other elements with very high switching speed and poor gain.

Reader, T.↗