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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 307 records · Page 17
All sourcesNASA NTRSDOE OSTI
NASA NTRS2010

Fastener Capture Plate Technology to Contain On-Orbit Debris

The Fastener Capture Plate technology was developed to solve the problem of capturing loose hardware and small fasteners, items that were not originally intended to be disengaged in microgravity, thus preventing them from becoming space debris. This technology was incorporated into astronaut tools designed and successfully used on NASA s Hubble Space Telescope Servicing Mission #4. The technology s ultimate benefit is that it allows a very time-efficient method for disengaging fasteners and removing hardware while minimizing the chances of losing parts or generating debris. The technology aims to simplify the manual labor required of the operator. It does so by optimizing visibility and access to the work site and minimizing the operator's need to be concerned with debris while performing the operations. It has a range of unique features that were developed to minimize task time, as well as maximize the ease and confidence of the astronaut operator. This paper describes the technology and the astronaut tools developed specifically for a complicated on-orbit repair, and it includes photographs of the hardware being used in outer space.

Eisenhower, Kevin↗
NASA NTRS2010

Reconfigurable Hardware for Compressing Hyperspectral Image Data

High-speed, low-power, reconfigurable electronic hardware has been developed to implement ICER-3D, an algorithm for compressing hyperspectral-image data. The algorithm and parts thereof have been the topics of several NASA Tech Briefs articles, including Context Modeler for Wavelet Compression of Hyperspectral Images (NPO-43239) and ICER-3D Hyperspectral Image Compression Software (NPO-43238), which appear elsewhere in this issue of NASA Tech Briefs. As described in more detail in those articles, the algorithm includes three main subalgorithms: one for computing wavelet transforms, one for context modeling, and one for entropy encoding. For the purpose of designing the hardware, these subalgorithms are treated as modules to be implemented efficiently in field-programmable gate arrays (FPGAs). The design takes advantage of industry- standard, commercially available FPGAs. The implementation targets the Xilinx Virtex II pro architecture, which has embedded PowerPC processor cores with flexible on-chip bus architecture. It incorporates an efficient parallel and pipelined architecture to compress the three-dimensional image data. The design provides for internal buffering to minimize intensive input/output operations while making efficient use of offchip memory. The design is scalable in that the subalgorithms are implemented as independent hardware modules that can be combined in parallel to increase throughput. The on-chip processor manages the overall operation of the compression system, including execution of the top-level control functions as well as scheduling, initiating, and monitoring processes. The design prototype has been demonstrated to be capable of compressing hyperspectral data at a rate of 4.5 megasamples per second at a conservative clock frequency of 50 MHz, with a potential for substantially greater throughput at a higher clock frequency. The power consumption of the prototype is less than 6.5 W. The reconfigurability (by means of reprogramming) of the FPGAs makes it possible to effectively alter the design to some extent to satisfy different requirements without adding hardware. The implementation could be easily propagated to future FPGA generations and/or to custom application-specific integrated circuits.

Aranki, Nazeeh↗
DOE OSTI2020

Low Size, Weight, and Power Neuromorphic Computing to Improve Combustion Engine Efficiency

Neuromorphic computing offers one path forward for AI at the edge. However, accessing and effectively utilizing a neuromorphic hardware platform is non-trivial. In this work, we present a complete pipeline for neuromorphic computing at the edge, including a small, inexpensive, low-power, FPGA-based neuromorphic hardware platform, a training algorithm for designing spiking neural networks for neuromorphic hardware, and a software framework for connecting those components. We demonstrate this pipeline on a real-world application, engine control for a spark-ignition internal combustion engine. We illustrate how we connect engine simulations with neuromorphic hardware simulations and training software to produce hardware-compatible spiking neural networks that perform engine control to improve fuel efficiency. We present initial results on the performance of these spiking neural networks and illustrate that they outperform open-loop engine control. We also give size, weight, and power estimates for a deployed solution of this type.

Schuman, Catherine↗
NASA NTRS1993

Compiler-assisted multiple instruction rollback recovery using a read buffer

Multiple instruction rollback (MIR) is a technique that has been implemented in mainframe computers to provide rapid recovery from transient processor failures. Hardware-based MIR designs eliminate rollback data hazards by providing data redundancy implemented in hardware. Compiler-based MIR designs have also been developed which remove rollback data hazards directly with data-flow transformations. This paper focuses on compiler-assisted techniques to achieve multiple instruction rollback recovery. We observe that some data hazards resulting from instruction rollback can be resolved efficiently by providing an operand read buffer while others are resolved more efficiently with compiler transformations. A compiler-assisted multiple instruction rollback scheme is developed which combines hardware-implemented data redundancy with compiler-driven hazard removal transformations. Experimental performance evaluations indicate improved efficiency over previous hardware-based and compiler-based schemes.

Alewine, N. J.↗
NASA NTRS1974

Some aspects of flox-methane rocket engine throttling

Four injector designs and two chamber profiles were experimentally evaluated for structural integrity, combustion efficiency, and resistance to combustion instabilities. Vacuum thrust measurements were used as a primary measure of combustion efficiency. Stability rating to test the sensitivity of the injectors to high frequency combustion was conducted, but not extensively. To map the boundary between stable operation and chugging instability, chamber pressure was throttled downward from 689.5 to 206.9 kN/sq m abs (100 to 30 psia). Best operational results were obtained with an injector configuration having no hydraulic swirlers, a 0.00102-m (0.040-in.) recessed FLOX tube, and a nonflared exit in the methane annulus. This injector design exhibited stable combustion and good integrity of hardware, and it exceeded the design goal efficiency (88 percent) at the 10 to 1 throttled condition.

Sokolowski, D. E.↗
NASA NTRS2011

Extravehicular Activity Technology Development Status and Forecast

The goal of NASA s current EVA technology effort is to further develop technologies that will be used to demonstrate a robust EVA system that has application for a variety of future missions including microgravity and surface EVA. Overall the objectives will be to reduce system mass, reduce consumables and maintenance, increase EVA hardware robustness and life, increase crew member efficiency and autonomy, and enable rapid vehicle egress and ingress. Over the past several years, NASA realized a tremendous increase in EVA system development as part of the Exploration Technology Development Program and the Constellation Program. The evident demand for efficient and reliable EVA technologies, particularly regenerable technologies was apparent under these former programs and will continue to be needed as future mission opportunities arise. The technological need for EVA in space has been realized over the last several decades by the Gemini, Apollo, Skylab, Space Shuttle, and the International Space Station (ISS) programs. EVAs were critical to the success of these programs. Now with the ISS extension to 2028 in conjunction with a current forecasted need of at least eight EVAs per year, the EVA hardware life and limited availability of the Extravehicular Mobility Units (EMUs) will eventually become a critical issue. The current EMU has successfully served EVA demands by performing critical operations to assemble the ISS and provide repairs of satellites such as the Hubble Space Telescope. However, as the life of ISS and the vision for future mission opportunities are realized, a new EVA systems capability will be needed and the current architectures and technologies under development offer significant improvements over the current flight systems. In addition to ISS, potential mission applications include EVAs for missions to Near Earth Objects (NEO), Phobos, or future surface missions. Surface missions could include either exploration of the Moon or Mars. Providing an EVA capability for these types of missions enables in-space construction of complex vehicles or satellites, hands on exploration of new parts of our solar system, and engages the public through the inspiration of knowing that humans are exploring places that they have never been before. This paper offers insight into what is currently being developed and what the potential opportunities are in the forecast.

Chullen, Cinda↗
NASA NTRS1993

Neutral buoyancy test evaluation of hardware and extravehicular activity procedures for on-orbit assembly of a 14 meter precision reflector

A procedure that enables astronauts in extravehicular activity (EVA) to perform efficient on-orbit assembly of large paraboloidal precision reflectors is presented. The procedure and associated hardware are verified in simulated Og (neutral buoyancy) assembly tests of a 14 m diameter precision reflector mockup. The test article represents a precision reflector having a reflective surface which is segmented into 37 individual panels. The panels are supported on a doubly curved tetrahedral truss consisting of 315 struts. The entire truss and seven reflector panels were assembled in three hours and seven minutes by two pressure-suited test subjects. The average time to attach a panel was two minutes and three seconds. These efficient assembly times were achieved because all hardware and assembly procedures were designed to be compatible with EVA assembly capabilities.

Heard, Walter L., Jr.↗
DOE OSTI2025

Breaking the mold: Overcoming the time constraints of molecular dynamics on general-purpose hardware

The evolution of molecular dynamics (MD) simulations has been intimately linked to that of computing hardware. For decades following the creation of MD, simulations have improved with computing power along the three principal dimensions of accuracy, atom count (spatial scale), and duration (temporal scale). Since the mid-2000s, computer platforms have, however, failed to provide strong scaling for MD, as scale-out central processing unit (CPU) and graphics processing unit (GPU) platforms that provide substantial increases to spatial scale do not lead to proportional increases in temporal scale. Important scientific problems therefore remained inaccessible to direct simulation, prompting the development of increasingly sophisticated algorithms that present significant complexity, accuracy, and efficiency challenges. While bespoke MD-only hardware solutions have provided a path to longer timescales for specific physical systems, their impact on the broader community has been mitigated by their limited adaptability to new methods and potentials. In this work, we show that a novel computing architecture, the Cerebras wafer scale engine, completely alters the scaling path by delivering unprecedentedly high simulation rates up to 1.144 M steps/s for 200 000 atoms whose interactions are described by an embedded atom method potential. This enables direct simulations of the evolution of materials using general-purpose programmable hardware over millisecond timescales, dramatically increasing the space of direct MD simulations that can be carried out. In this paper, we provide an overview of advances in MD over the last 60 years and present our recent result in the context of historical MD performance trends.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗
NASA NTRS1992

Scheduling lessons learned from the Autonomous Power System

The Autonomous Power System (APS) project at NASA LeRC is designed to demonstrate the applications of integrated intelligent diagnosis, control, and scheduling techniques to space power distribution systems. The project consists of three elements: the Autonomous Power Expert System (APEX) for Fault Diagnosis, Isolation, and Recovery (FDIR); the Autonomous Intelligent Power Scheduler (AIPS) to efficiently assign activities start times and resources; and power hardware (Brassboard) to emulate a space-based power system. The AIPS scheduler was tested within the APS system. This scheduler is able to efficiently assign available power to the requesting activities and share this information with other software agents within the APS system in order to implement the generated schedule. The AIPS scheduler is also able to cooperatively recover from fault situations by rescheduling the affected loads on the Brassboard in conjunction with the APEX FDIR system. AIPS served as a learning tool and an initial scheduling testbed for the integration of FDIR and automated scheduling systems. Many lessons were learned from the AIPS scheduler and are now being integrated into a new scheduler called SCRAP (Scheduler for Continuous Resource Allocation and Planning). This paper will service three purposes: an overview of the AIPS implementation, lessons learned from the AIPS scheduler, and a brief section on how these lessons are being applied to the new SCRAP scheduler.

Ringer, Mark J.↗
NASA NTRS2009

Using Microwaves for Extracting Water from the Moon

Twenty years ago, the Lunar Prospector remote sensing satellite provided evidence of relatively large hydrogen concentrations at the lunar poles and in particular concentrated in permanently shadowed craters. The scientific hypothesis is that the hydrogen is in the form of cryo-trapped water just under the surface of the soil. If true this would mean that an average of about 2% water ice is mixed with the lunar soil existing in the form of ice at cryogenic temperatures. For 5 years we have been investigating the use of microwaves for the processing of lunar soil. One of the early uses could be to use microwave energy to extract volatiles and in particular water from the lunar permafrost. Prototype experiments have shown that microwave energy at 2.45 GHz, as in consumer microwave ovens, will couple with and heat cryogenically cooled lunar soil permafrost simulant, resulting in the rapid sublimation of water vapor into the vacuum chamber. The water vapor has been collected on a cryogenic cold trap with high efficiency. The primary advantage of microwave processing is that the volatiles can be extracted in situ. Excavation would not be required. Microwave frequency dielectric property measurements are being made of different lunar soil simulants and plans are to measure Apollo lunar soil at different frequencies and over a range of temperatures. The materials properties are being used to evaluate the heating of lunar soil and develop COMSOL models that can be used to evaluate different microwave extraction scenarios. With COMSOL the heating from cryogenic temperatures can be calculated and COMSOL will permit temperature dependent materials properties to be used during the heating process. Calculations at different microwave frequencies will allow the evaluation of the type of hardware that would be needed to most efficiently extract the water and other volatiles.

Ethridge, Edwin C.↗
NASA NTRS2009

Using Microwaves for Extracting Water from the Moon

This disk contains a video that accompanies the talk. Twenty years ago, the Lunar Prospector remote sensing satellite provided evidence of relatively large hydrogen concentrations at the lunar poles and in particular concentrated in permanently shadowed craters. The scientific hypothesis is that the hydrogen is in the form of cryo-trapped water just under the surface of the soil. If true this would mean that an average of about 2% water ice is mixed with the lunar soil existing in the form of ice at cryogenic temperatures. For 5 years we have been investigating the use of microwaves for the processing of lunar soil. One of the early uses could be to use microwave energy to extract volatiles and in particular water from the lunar permafrost. Prototype experiments have shown that microwave energy at 2.45 GHz, as in consumer microwave ovens, will couple with and heat cryogenically cooled lunar soil permafrost simulant, resulting in the rapid sublimation of water vapor into the vacuum chamber. The water vapor has been collected on a cryogenic cold trap with high efficiency. The primary advantage of microwave processing is that the volatiles can be extracted in situ. Excavation would not be required. Microwave frequency dielectric property measurements are being made of different lunar soil simulants and plans are to measure Apollo lunar soil at different frequencies and over a range of temperatures. The materials properties are being used to evaluate the heating of lunar soil and develop COMSOL models that can be used to evaluate different microwave extraction scenarios. With COMSOL the heating from cryogenic temperatures can be calculated and COMSOL will permit temperature dependent materials properties to be used during the heating process. Calculations at different microwave frequencies will allow the evaluation of the type of hardware that would be needed to most efficiently extract the water and other volatiles. The video shows the partial results of the COMSOL modeling.

Ethridge, Edwin C.↗
NASA NTRS2009

Using Microwaves for Extracting Water from the Moon

This disk contains 2 videos that accompanies the talk. Twenty years ago, the Lunar Prospector remote sensing satellite provided evidence of relatively large hydrogen concentrations at the lunar poles and in particular concentrated in permanently shadowed craters. The scientific hypothesis is that the hydrogen is in the form of cryo-trapped water just under the surface of the soil. If true this would mean that an average of about 2% water ice is mixed with the lunar soil existing in the form of ice at cryogenic temperatures. For 5 years we have been investigating the use of microwaves for the processing of lunar soil. One of the early uses could be to use microwave energy to extract volatiles and in particular water from the lunar permafrost. Prototype experiments have shown that microwave energy at 2.45 GHz, as in consumer microwave ovens, will couple with and heat cryogenically cooled lunar soil permafrost simulant, resulting in the rapid sublimation of water vapor into the vacuum chamber. The water vapor has been collected on a cryogenic cold trap with high efficiency. The primary advantage of microwave processing is that the volatiles can be extracted in situ. Excavation would not be required. Microwave frequency dielectric property measurements are being made of different lunar soil simulants and plans are to measure Apollo lunar soil at different frequencies and over a range of temperatures. The materials properties are being used to evaluate the heating of lunar soil and develop COMSOL models that can be used to evaluate different microwave extraction scenarios. With COMSOL the heating from cryogenic temperatures can be calculated and COMSOL will permit temperature dependent materials properties to be used during the heating process. Calculations at different microwave frequencies will allow the evaluation of the type of hardware that would be needed to most efficiently extract the water and other volatiles. The 1st video shows the results of the COMSOL models. The second video shows brief views of the lunar surface.

Ethridge, Edwin C.↗
DOE OSTI2023

On-chip parallel processing of quantum frequency comb

Abstract The frequency degree of freedom of optical photons has been recently explored for efficient quantum information processing. Significant reduction in hardware resources and enhancement of quantum functions can be expected by leveraging the large number of frequency modes. Here, we develope an integrated photonic platform for the generation and parallel processing of quantum frequency combs (QFCs). Cavity-enhanced parametric down-conversion with Sagnac configuration is implemented to generate QFCs with identical spectral distributions. On-chip quantum interference of different frequency modes is simultaneously realized with the same photonic circuit. High interference visibility is maintained across all frequency modes with the identical circuit setting. This enables the on-chip reconfiguration of QFCs. By deterministically separating QFCs without spectral filtering, we further demonstrate high-dimensional Hong-Ou-Mandel effect. Our work provides the critical step for the efficient implementation of quantum information processing with integrated photonics using the frequency degree of freedom.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
NASA NTRS2000

HTMT-class Latency Tolerant Parallel Architecture for Petaflops Scale Computation

Computational Aero Sciences and other numeric intensive computation disciplines demand computing throughputs substantially greater than the Teraflops scale systems only now becoming available. The related fields of fluids, structures, thermal, combustion, and dynamic controls are among the interdisciplinary areas that in combination with sufficient resolution and advanced adaptive techniques may force performance requirements towards Petaflops. This will be especially true for compute intensive models such as Navier-Stokes are or when such system models are only part of a larger design optimization computation involving many design points. Yet recent experience with conventional MPP configurations comprising commodity processing and memory components has shown that larger scale frequently results in higher programming difficulty and lower system efficiency. While important advances in system software and algorithms techniques have had some impact on efficiency and programmability for certain classes of problems, in general it is unlikely that software alone will resolve the challenges to higher scalability. As in the past, future generations of high-end computers may require a combination of hardware architecture and system software advances to enable efficient operation at a Petaflops level. The NASA led HTMT project has engaged the talents of a broad interdisciplinary team to develop a new strategy in high-end system architecture to deliver petaflops scale computing in the 2004/5 timeframe. The Hybrid-Technology, MultiThreaded parallel computer architecture incorporates several advanced technologies in combination with an innovative dynamic adaptive scheduling mechanism to provide unprecedented performance and efficiency within practical constraints of cost, complexity, and power consumption. The emerging superconductor Rapid Single Flux Quantum electronics can operate at 100 GHz (the record is 770 GHz) and one percent of the power required by convention semiconductor logic. Wave Division Multiplexing optical communications can approach a peak per fiber bandwidth of 1 Tbps and the new Data Vortex network topology employing this technology can connect tens of thousands of ports providing a bi-section bandwidth on the order of a Petabyte per second with latencies well below 100 nanoseconds, even under heavy loads. Processor-in-Memory (PIM) technology combines logic and memory on the same chip exposing the internal bandwidth of the memory row buffers at low latency. And holographic storage photorefractive storage technologies provide high-density memory with access a thousand times faster than conventional disk technologies. Together these technologies enable a new class of shared memory system architecture with a peak performance in the range of a Petaflops but size and power requirements comparable to today's largest Teraflops scale systems. To achieve high-sustained performance, HTMT combines an advanced multithreading processor architecture with a memory-driven coarse-grained latency management strategy called "percolation", yielding high efficiency while reducing the much of the parallel programming burden. This paper will present the basic system architecture characteristics made possible through this series of advanced technologies and then give a detailed description of the new percolation approach to runtime latency management.

Sterling, Thomas↗
DOE OSTI2024

In-situ TEM EELS analysis of memristive thin films for neuromorphic computing

Neuromorphic computing stands as a promising frontier for advancing AI algorithms and applications like ChatGBT, offering significant energy efficiency gains. This paper delves into the hardware design intricacies of memristive thin films and their elementary switching mechanisms, including anion migration, electron migration, and phase transitions. Through comprehensive analysis of electron energy loss spectroscopy (EELS) data via in-situ transmission electron microscopy (TEM), we will deduce the primary memristive switching mechanisms vital for optimizing thin film fabrication parameters and achieving desired film thickness, conductivity, and memory retention. A single crystal ptype Si substrate was used with TiN as the bottom metal electrode, TiO x as the insulating dielectric layer, and Pt as the top metal electrode. In-situ TEM was able to tell us the thin film didn’t behave like a filamentary or phase transition material. EELS data deduced that electron trapping/detrapping was one of the primary switching mechanisms. By shedding light on these elementary mechanisms, our study aims to catalyze the development of more 2 efficient and effective neuromorphic computing systems to be deployed into mainstream technologies.

97 MATHEMATICS AND COMPUTING↗
NASA NTRS1992

Industry survey of space system cost benefits from New Ways Of Doing Business

The cost of designing, building and operating space system hardware has always been expensive. Small quantities of specialty parts escalate engineering design, production and operations cost. Funding cutbacks and shrinking revenues dictate aggressive cost saving programs. NASA's highest priority is providing economical transportation to and from space. Over the past three decades NASA has seen technological advances that provide grater efficiencies in designing, building, and operating of space system hardware. As future programs such as NLS, LUTE and SEI begin, these greater efficiencies and cost savings should be reflected in the cost models. There are several New Ways Of Doing Business (NWODB) which, when fully implemented will reduce space system costs. These philosophies and/or culture changes are integrated in five areas: (1) More Extensive Pre-Phase C/D & E, (2) Multi Year Funding Stability, (3) Improved Quality, Management and Procurement Processes, (4) Advanced Design Methods, and (5) Advanced Production Methods. Following is an overview of NWODB and the Cost Quantification Analysis results using an industry survey, one of the four quantification techniques used in the study. The NWODB Cost Quantification Analysis is a study performed at Marshall Space Flight Center by the Engineering Cost Group, Applied Research Incorporated and Pittsburg State University. This study took place over a period of four months in mid 1992. The purpose of the study was to identify potential NWODB which could lead to improved cost effectiveness within NASA and to quantify potential cost benefits that might accrue if these NWODB were implemented.

Rosmait, Russell L.↗
DOE OSTI2026

NeuroCoreX: An Open-Source FPGA-Based Spiking Neural Network Emulator with On-Chip Learning

Spiking Neural Networks (SNNs) are computational models inspired by the event-driven communication and connectivity patterns of biological neural circuits. They enable high energy efficiency and natural support for diverse architectures ranging from layered networks to small-world and graphstructured topologies. In this work, we introduce NeuroCoreX, an open-source, FPGA-based spiking neural network emulator that provides real-time, on-chip learning and flexible network organization. NeuroCoreX supports both feedforward sensory inputs streamed directly from sensors or PCs via UART and recurrent on-chip connectivity, enabling simultaneous processing and learning from external stimuli and internal network dynamics-capabilities rarely available in existing FPGA SNN platforms. The system implements a Leaky Integrate-and-Fire (LIF) neuron model with current-based synapses and supports pair-based STDP learning on both feedforward and recurrent synapses. A lightweight Python interface enables interactive configuration, live monitoring, weight read-back, and experiment control. Importantly, NeuroCoreX is tightly integrated with the SuperNeuroMAT simulator, allowing SNN models to be transferred seamlessly from software to hardware for hardware-in-the-loop development. By combining real-time plasticity, flexible connectivity, and an open-source VHDL implementation, NeuroCoreX provides an extensible and accessible platform for neuromorphic research, algorithm-hardware co-design, and energy-efficient edge intelligence.

Gautam, Ashish [ORNL]↗
DOE OSTI2025

TrioSim: A Lightweight Simulator for Large-Scale DNN Workloads on Multi-GPU Systems

Deep Neural Networks (DNNs) have become increasingly capable of performing tasks ranging from image recognition to content generation. The training and inference of DNNs heavily rely on GPUs, as GPUs' massively parallel architecture delivers extremely high computing capability. With the growing complexity of DNNs and the size of training datasets, training DNNs with a large number of GPUs is becoming a prevalent strategy. Researchers have been exploring how to design software and hardware systems for GPU farms to achieve the best utilization, efficiency, and DNN accuracy during training or inference. However, when designing and deploying such systems, designers usually rely on testing on physical hardware platforms equipped with many GPUs, incurring high costs that are almost prohibitive for system designers to test different configurations and designs, even for highly resourceful companies. While an alternative solution is to test on GPU simulators, they are often too slow for these l

Li, Ying [William & Mary, Williamsburg, VA, USA] (↗