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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 307 records · Page 17

Benefits of Spacecraft Level Vibration Testing

NASA-HDBK-7008 Spacecraft Level Dynamic Environments Testing discusses the approaches, benefits, dangers, and recommended practices for spacecraft level dynamic environments testing, including vibration testing. This paper discusses in additional detail the benefits and actual experiences of vibration testing spacecraft for NASA Goddard Space Flight Center (GSFC) and Jet Propulsion Laboratory (JPL) flight projects. JPL and GSFC have both similarities and differences in their spacecraft level vibration test approach: JPL uses a random vibration input and a frequency range usually starting at 5 Hz and extending to as high as 250 Hz. GSFC uses a sine sweep vibration input and a frequency range usually starting at 5 Hz and extending only to the limits of the coupled loads analysis (typically 50 to 60 Hz). However, both JPL and GSFC use force limiting to realistically notch spacecraft resonances and response (acceleration) limiting as necessary to protect spacecraft structure and hardware from exceeding design strength capabilities. Despite GSFC and JPL differences in spacecraft level vibration test approaches, both have uncovered a significant number of spacecraft design and workmanship anomalies in vibration tests. This paper will give an overview of JPL and GSFC spacecraft vibration testing approaches and provide a detailed description of spacecraft anomalies revealed.

Spacecraft Vibration Test↗

Modular autopilot design and development featuring bayesian non-parametric adaptive control

According to an embodiment, there is provided an onboard integrated computational system for an unmanned aircraft system (“Stabilis” autopilot). This is an integrated suite of hardware, software, and data-to-decisions services that are designed to meet the needs of business and research developers of UAS. Stabilis is designed to accelerate the development of any UAS platform and avionics system; it does so with hardware modularity and software adaptation. The Stabilis offers multiple technological advantages technological advantages including: Plug-and-adapt functionality; Data-to-decisions capability; and, On board parallelization capability.

97 MATHEMATICS AND COMPUTING↗

Understanding Mixed Precision GEMM with MPGemmFI: Insights into Fault Resilience

Emerging deep learning workloads urgently need fast general matrix multiplication (GEMM). Thus, one of the critical features of machine-learning-specific accelerators such as NVIDIA Tensor Cores, AMD Matrix Cores, and Google TPUs is the support of mixed-precision enabled GEMM. For DNN models, lower-precision FP data formats and computation offer acceptable correctness but significant performance, area, and memory footprint improvement. While promising, the mixed-precision computation on error resilience remains unexplored. To this end, we develop a fault injection framework that systematically injects fault into the mixed-precision computation results. We investigate how the faults affect the accuracy of machine learning applications. Based on the characteristics of error resilience, we offer lightweight error detection and correction solutions that significantly improve the overall model accuracy by 75% if the models experience hardware faults. The solutions can be efficiently integrated into the accelerator's pipelines.

Fang, Bo↗

Spaceflight Environmental-Telemetry Data for Biological Science

There is a critical need for better access and visualization of spaceflight environmental telemetry and mission hardware data from sensors including relative humidity, carbon dioxide, oxygen, radiation, airflow, temperature, acceleration, and acoustics. Under the stewardship of the Ames Life Sciences Data Archive (ALSDA) and GeneLab, an effort is underway to consolidate, normalize and provide accessibility of archived mission environmental data and hardware information, with the purpose of providing important context to biological data. This effort is necessary to provide scientific context of its impact upon biological and biomedical data from spaceflight missions and experiments (genomic, metagenomic, gene expression, proteomic, metabolomic, physiological, phenomics, behavioral; tabular, imaging, video). Environmental spaceflight data is derived from dozens of sources, with various formats, and in the past year a pipeline is in development to collect, curate and present this data efficiently. In the upcoming year, a new Data Visualization Portal will utilize the standardized pipeline data to provide easy user access to compare parameters and environmental conditions between missions, locations, subjects, and durations. Environmental and hardware data enables broad accessibility and analytics, without the need for advanced data informatic expertise. Familiarity with the capabilities and limitations of a variety of existing hardware/tools is a strength that could be applied to creation of improved hardware for future ecosystems on the Moon and Mars. The intention is to make biological and environmental telemetry data maximally open-access and FAIR (findable, accessible, interoperable, reusable) for data mining-informatic approaches to support knowledge discovery necessary for low Earth orbit, cis-Lunar, Mars transit, and Mars surface missions.

Danielle K. Lopez↗

Microgravity Research Results and Experiences from the NASA Mir Space Station Program

The Microgravity Research Program Office (MRPO) participated aggressively in Phase I of the International Space Station Program using the Russian Mir Space Station. The Mir Station offered an otherwise unavailable opportunity to explore the advantages and challenges to long duration microgravity space research. Payloads with both NASA and commercial backing were included as well as cooperative research with the Canadian Space Agency (CSA). From this experience, much was learned about dealing with long duration on orbit science utilization and developing new working relationships with our Russian partner to promote efficient planning, operations, and integration to solve complexities associated with a multiple partner program. Microgravity participation in the NASA Mir Program began with the first joint NASA Mir flight to the Mir Space Station. The earliest participation setup acceleration measurement capabilities that were used throughout the Program. Research, conducted by all Microgravity science disciplines, continued on each subsequent increment for the entire three-year duration of the Program. The Phase I Program included the Microgravity participation of over 30 Fluids, Combustion, Materials, and Biotechnology Sciences and numerous commercially sponsored research payloads. In addition to the research gained from Microgravity investigations, long duration operation of facility hardware was tested. Microgravity facilities operated on Mir included the Space Acceleration Measurement System (SAMS), the Microgravity Glovebox (MGBX), the Biotechnology System (BTS) and the Canadian Space Agency sponsored Microgravity Isolation Mount (MIM). The Russian OPTIZONE Furnace was also incorporated into our material science research. All of these efforts yielded significant and useful scientific research data. This paper focuses on the microgravity research conducted onboard the Mir space station. It includes the Program preparation and planning necessary to support this type of cross increment research experience; the payloads which were flown; and summaries of significant microgravity science findings. Most importantly this paper highlights the various disciplines of microgravity research conducted during the International Space Station, Phase 1 Program onboard the Mir Station. A capsulation of significant research and the applicability of our findings are provided. In addition, a brief discussion of how future microgravity science gathering capabilities, hardware development and payload operations techniques have enhanced our ability to conduct long duration microgravity research.

Schagheck, R. A.↗

Automated Generation of Integrated Digital and Spiking Neuromorphic Machine Learning Accelerators

The growing numbers of application areas for artificial intelligence (AI) methods have led to an explosion of domain-specific accelerators that could support every new machine learning (ML) algorithm advancement, clearly highlighting the need for a capability to quickly and automatically transition from algorithm definition to hardware implementation and explore design space along a variety of SWaP (size, weight and Power). The software defined architectures (SODA) synthesizer implements a compiler-based modular infrastructure for the end-to-end generation of machine learning accelerators from high-level frameworks to hardware description language. At the same time, neuromorphic computing, by mimicking how the brain operates, promises to perform artificial intelligence tasks at efficiencies orders of magnitude higher than the current conventional tensor-processing based accelerators, as demonstrated by a variety of specialized designs leveraging Spiking Neural Networks (SNNs). Nevertheless, the mapping of an artificial neural network (ANN) to solutions supporting SNNs is still a non-trivial and very device-specific task, and completely lack the possibility to design hybrid systems that integrate conventional and spiking neural models. In this paper we discuss the support for such an integrated generation leveraging the SODA Synthesizer framework and its modular structure. In particular, we present a new MLIR dialect (part of the SODA frontend) that allows expressing spiking neural network features (e.g., available resources, spiking sequences, analog signal reading, etc.) and illustrate how it enables mapping to Spiking Neurons and deployment to the related specialized hardware (which, in the digital domain, could be generated through the other existing layers of the SODA Synthesizer). We then discuss the opportunities for even deeper integration afforded by the hardware compilation infrastructure, providing a path towards the generation of complex heterogeneous artificial intelligence systems.

Curzel, Serena↗

Production Level CFD Code Acceleration for Hybrid Many-Core Architectures

In this work, a novel graphics processing unit (GPU) distributed sharing model for hybrid many-core architectures is introduced and employed in the acceleration of a production-level computational fluid dynamics (CFD) code. The latest generation graphics hardware allows multiple processor cores to simultaneously share a single GPU through concurrent kernel execution. This feature has allowed the NASA FUN3D code to be accelerated in parallel with up to four processor cores sharing a single GPU. For codes to scale and fully use resources on these and the next generation machines, codes will need to employ some type of GPU sharing model, as presented in this work. Findings include the effects of GPU sharing on overall performance. A discussion of the inherent challenges that parallel unstructured CFD codes face in accelerator-based computing environments is included, with considerations for future generation architectures. This work was completed by the author in August 2010, and reflects the analysis and results of the time.

Duffy, Austen C.↗

Performance Evaluation of Distributed Energy Resource Management Algorithm in Large Distribution Networks

This paper presents performance evaluation of hierarchical optimization and control for distributed energy resource management system (DERMS) in large distribution networks via an advanced hardware-in-the-loop (HIL) platform. The HIL platform provides realistic testing in a laboratory envi-ronment, including the accurate modeling of a full-scale dis-tribution system of 11,000 nodes, the DERMS software con-troller, and 90 power hardware photovoltaics (PVs) and bat-tery inverters. The applied DERMS algorithm is designed based on a real-time optimal power flow algorithm and im-plemented with acceleration design that performs fast dis-patch of simulated PVs and real physical hardware DER devices every 4 seconds.

distributed energy management system (DERMS)↗

Adaptive Control for Microgravity Vibration Isolation System

Most active vibration isolation systems that try to a provide quiescent acceleration environment for space science experiments have utilized linear design methods. In this paper, we address adaptive control augmentation of an existing classical controller that employs a high-gain acceleration feedback together with a low-gain position feedback to center the isolated platform. The control design feature includes parametric and dynamic uncertainties because the hardware of the isolation system is built as a payload-level isolator, and the acceleration Sensor exhibits a significant bias. A neural network is incorporated to adaptively compensate for the system uncertainties, and a high-pass filter is introduced to mitigate the effect of the measurement bias. Simulations show that the adaptive control improves the performance of the existing acceleration controller and keep the level of the isolated platform deviation to that of the existing control system.

Yang, Bong-Jun↗

DDCP framework

DDCP protocol software 1.0 This repository contains the C++ implementation of version 1.x of the Distributed Data Communications Protocol (DDCP). DDCP provides request/reply, feature discovery, data transfer, control, interrupt, and transaction support for communicating with accelerator instrumentation over UDP. The standard server port is 65000. The framework is a source dependency for services that communicate directly with DDCP hardware. It is not a deployable service by itself.

Joshi, Shreya [Fermi National Accelerator Laborato↗

SmartFuse: Reconfigurable Smart Switches to Accelerate Fused Collectives in HPC Applications

Communication switches have sometimes been augmented to process collectives (e.g., the IBM BlueGene project and the Mellanox SHArP switch). In this work, we find that there is a great acceleration opportunity through the further augmentation of switches to accelerate more complex functions that combine communication with computation. We consider three types of such functions. The first is fully-fused collectives built by fusing multiple existing collectives like Allreduce with Alltoall. The second is semi-fused collectives built by combining a collective with another computation. The third we refer to as higher-order collectives built by combining multiple computations and communications, such as to perform matrix-matrix multiply (PGEMM). In this work, we propose a framework called SmartFuse to accelerate fused collective functions. The core of SmartFuse is a reconfigurable smart switch to support these operations. The semi/fully fused collectives are implemented with a CGRAlike architecture, while higher-order collectives are implemented with a more specialized computational unit that can also schedule communication. Supporting our framework is software to evaluate and translate relevant parts of the input program, compile them into a control data flow graph, and then map this graph to the switch hardware. The proposed framework, once deployed, has the strong potential to accelerate existing HPC applications transparently by encapsulation within an MPI implementation. Experimental results show that this approach improves the performance of the PGEMM kernel, MINIFE, and AMG by, on average, 94%, 15%, and 13%, respectively.

Haghi, Pouya↗

Equation-based and data-driven modeling: Open-source software current state and future directions

Here, a review of current trends in scientific computing reveals a broad shift to open-source and higher-level programming languages such as Python and growing career opportunities over the next decade. Open-source modeling tools accelerate innovation in equation-based and data-driven applications. Significant resources have been deployed to develop data-driven tools (PyTorch, TensorFlow, Scikit-learn) from tech companies that rely on machine learning services to meet business needs while keeping the foundational tools open. Open-source equation-based tools such as Pyomo, CasADi, Gekko, and JuMP are also gaining momentum according to user community and development pace metrics. Integration of data-driven and principles-based tools is emerging. New compute hardware, productivity software, and training resources have the potential to radically accelerate progress. However, long-term support mechanisms are still necessary to sustain the momentum and maintenance of critical foundational packages.

97 MATHEMATICS AND COMPUTING↗

Resilience Design Patterns: A Structured Approach to Resilience at Extreme Scale (V.2.0)

Reliability is a serious concern for future extreme-scale high-performance computing (HPC) systems. Projections based on the current generation of HPC systems and technology roadmaps suggest the prevalence of very high fault rates in future systems. The errors resulting from these faults will propagate and generate various kinds of failures, which may result in outcomes ranging from result corruptions to catastrophic application crashes. Therefore, the resilience challenge for extreme-scale HPC systems requires coordination between various hardware and software technologies that are capable of handling a broad set of fault models at accelerated fault rates. Also, due to practical limits on power consumption in future HPC systems, they are likely to embrace innovative architectures, increasing the levels of hardware and software complexities. Therefore, the techniques that seek to improve resilience must navigate the complex trade-off space between resilience and the overheads to power consumption and performance. While the HPC community has developed various resilience solutions, application-level techniques as well as system-based solutions, the solution space of HPC resilience techniques remains fragmented. There are no formal methods to integrate the various HPC resilience techniques into composite solutions, nor are there methods to holistically evaluate the adequacy and efficacy of such solutions in terms of their protection coverage, and their performance & power efficiency characteristics. Additionally, few implementations of current resilience solutions are portable to newer architectures and software environments that will be deployed on future systems. We developed a new structured approach to the management of HPC resilience using the concept of resilience-based design patterns. In general, a design pattern is a repeatable solution to a commonly occurring problem. We identified the well-known solutions that are commonly used to deal with faults, errors and failures in HPC systems. In the initial design patterns specification (version 1.0), we described the various solutions, which address specific problems in the design of resilient HPC environments, in the form of patterns. Each pattern describes a problem caused by a fault, error or failure event in an HPC environment, and then describes the core of the solution of the problem in such a way that this solution may be adapted to different systems and implemented at different layers of the system stack. The catalog of these resilience design patterns provides designers with a collection of design elements. To construct complete resilience solutions using combinations of various patterns, we defined a framework that enhances HPC designers' understanding of the important constraints and the opportunities for the design patterns to be implemented and deployed at various layers of the system stack. The design framework is also useful for establishing interfaces and mechanisms to coordinate flexible fault management across hardware and software components, as well as to consider the trade-off between performance, resilience, and power consumption when constructing a solution. The resilience design patterns specification version 1.1 included more detailed explanations of the pattern solutions, the context in which the patterns are applicable, and the implications for hardware or software design. It also provided several additional examples and detailed case studies to demonstrate the use of patterns to build realistic solutions. In version 1.2 of the specification document, we have improved the pattern descriptions, including graphical representations of the pattern components. These improvements are largely based on critical comments, feedback and suggestions received from pattern experts and readers of the previous versions of the specification. The pattern classification has been modified to further clarify the relationships between pattern categories. This version of the specification also introduces a pattern language for resilience design patterns. The pattern language presents the patterns in the catalog as a network, revealing the relations among the resilience patterns. The language provides designers with the means to explore alternative techniques for handling a specific fault model that may have different efficiency and complexity characteristics. Using the pattern language also enables the design and implementation of comprehensive resilience solutions as a set of interconnected resilience patterns that can be instantiated across layers of the system stack. The overall goal of this work is to provide hardware and software designers, as well as the users and operators of HPC systems, a systematic methodology for the design and evaluation of resilience technologies in HPC systems that keep scientific applications running to a correct solution in a timely and cost-efficient manner despite frequent faults, errors, and failures of various types. Version 2.0 expands the resilience design pattern classification and catalog to include self-stabilization patterns and reliability, availability and performance models for each structural pattern.

97 MATHEMATICS AND COMPUTING↗

Independent Orbiter Assessment (IOA): Analysis of the displays and controls subsystem

The results of the Independent Orbiter Assessment (IOA) of the Failure Modes and Effects Analysis (FMEA) and Critical Items List (CIL) are presented. The IOA approach features a top-down analysis of the hardware to determine failure modes, criticality, and potential critical items. To preserve independence, this analysis was accomplished without reliance upon the results contained within the NASA FMEA/CIL documentation. This report documents the independent analysis results corresponding to the Orbiter Displays and Controls (D and C) subsystem hardware. The function of the D and C hardware is to provide the crew with the monitor, command, and control capabilities required for management of all normal and contingency mission and flight operations. The D and C hardware for which failure modes analysis was performed consists of the following: Acceleration Indicator (G-METER); Head Up Display (HUD); Display Driver Unit (DDU); Alpha/Mach Indicator (AMI); Horizontal Situation Indicator (HSI); Attitude Director Indicator (ADI); Propellant Quantity Indicator (PQI); Surface Position Indicator (SPI); Altitude/Vertical Velocity Indicator (AVVI); Caution and Warning Assembly (CWA); Annunciator Control Assembly (ACA); Event Timer (ET); Mission Timer (MT); Interior Lighting; and Exterior Lighting. Each hardware item was evaluated and analyzed for possible failure modes and effects. Criticality was assigned based upon the severity of the effect for each failure mode.

Trahan, W. H.↗

A Single Thread to Fortran Coarray Transition Process for the Control Algorithm in the Space Radiation Code HZETRN

Exa-scale computing is the direction by industry and government are going to generate solutions to problems they deem necessary. Computing hardware is being developed to achieve the transition from Peta-scale to Exa-scale with more CPUs (Central Processing Units) that have more cores per CPU and more accelerators (GPGPUs (General Purpose Graphics Processing Units) and MICs (Many Integrated Cores)) per node. To fully utilize the hardware available now and in the future, algorithms must become multi-threaded. There are a few methods to generate multi-threaded software such as MPI (Message Passing Interface) and OpenMP (Multi-Processing) / OpenACC (ACCelerator). This paper concentrates on using Coarray Fortran to convert the Fortran 95 based HZETRN (High Z and Energy TRaNsport) code's control algorithm from a single threaded code to a multithreaded code. The resultant Coarray code was 32.5 times faster (with a theoretical speed-up of 74.5 times) than the single threaded version on the hardware tested, as reliable as the Fortran 95 version, and, as it uses native Fortran, was as maintainable as the Fortran 95 version. The Coarray code can be maintained by the same project engineers and scientists who created the original single threaded code. This transition process can be utilized on a C language based code with a compiler that has the UPC (Universal Parallel C) extensions to C.

Singleterry, Robert C., Jr.↗

Electronic Bottleneck Suppression in Next‐Generation Networks with Integrated Photonic Digital‐to‐Analog Converters

Digital‐to‐analog converters (DAC) are indispensable functional units in signal processing instrumentation and wide‐band telecommunication links for both civil and military applications. As photonic systems are capable of high data throughput and low latency, an increasingly found system limitation stems from the required domain crossing such as digital to analog and electronic to optical. A photonic DAC implementation, in contrast, enables a seamless signal conversion with respect to both energy efficiency and short signal delay, often requiring bulky discrete optical components and electric–optic transformation, hence introducing inefficiencies. Herein, a novel coherent parallel photonic DAC concept along with a 4‐bit experimental prototype capable of performing this DAC without optic–electric–optic domain crossing is introduced. This new paradigm guarantees a linear intensity weighting among bits when operating at high sampling rates (50 GHz), featuring an exceptional sampling efficiency (> 100 GS ) and small footprint (≈1 mm 2 ) in an 8‐bit implementation. Importantly, this photonic DAC enables seamless interfaces of next‐generation data processing hardware with high relevance in data centers, task‐specific compute accelerators such as neuromorphic engines, and network edge processing applications.

Meng, Jiawei↗

Relief Zones Enhance the Durability of Ultrathin Membranes in Electrochemical Conversion Devices

Premature failures in electrochemical conversion systems often result when membrane electrode assemblies (MEAs) use ultrathin (≤15 μm-thick) polymer electrolyte membranes, susceptible to mechanical degradation from stress concentrations arising from device-level integration. Herein, relief zones were developed to mitigate mechanical degradation by alleviating excess and nonuniform compression across active areas. Relief zones, created through ablation of carbonaceous diffusion media, enable seamless adaptation across MEA dimensions without need for hardware modifications. Demonstrated using fuel cells as a case study, accelerated stress tests revealed a 6-fold lifetime improvement (∼1500 h) compared to conventional edge-protected MEAs, decoupling device-level engineering effects from material limitations.

accelerated stress test↗

Silicon-germanium technology program of the Jet Propulsion Laboratory.

The outer planetary exploration missions studied by the Jet Propulsion Laboratory require silicon-germanium radioisotope thermoelectric generators (RTGs) in which the factors of safety are as low as is compatible with the reliable satisfaction of the power needs. Work on silicon germanium sublimation performed at the Jet Propulsion Laboratory is presented. Analytical modeling work on the solid-diffusion process involved in the steady-state (free) sublimation of silicon germanium is described. Analytical predictions are made of the sublimation suppression which can be achieved by using a cover gas. A series of accelerated (high-temperature) tests which were performed on simulated hardware (using four SiGe couples) to study long-term sublimation and reaction mechanisms are also discussed.

De Winter, F.↗