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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 307 records · Page 17
All sourcesNASA NTRSDOE OSTI
NASA NTRS1987

The design plan of a VLSI single chip (255, 223) Reed-Solomon decoder

The very large-scale integration (VLSI) architecture of a single chip (255, 223) Reed-Solomon decoder for decoding both errors and erasures is described. A decoding failure detection capability is also included in this system so that the decoder will recognize a failure to decode instead of introducing additional errors. This could happen whenever the received word contains too many errors and erasures for the code to correct. The number of transistors needed to implement this decoder is estimated at about 75,000 if the delay for received message is not included. This is in contrast to the older transform decoding algorithm which needs about 100,000 transistors. However, the transform decoder is simpler in architecture than the time decoder. It is therefore possible to implement a single chip (255, 223) Reed-Solomon decoder with today's VLSI technology. An implementation strategy for the decoder system is presented. This represents the first step in a plan to take advantage of advanced coding techniques to realize a 2.0 dB coding gain for future space missions.

Hsu, I. S.↗
NASA NTRS1987

Modelling the performance of the monogroove with screen heat pipe for use in the radiator of the solar dynamic power system of the NASA Space Station

A computer code to model the steady-state performance of a monogroove heat pipe for the NASA Space Station is presented, including the effects on heat pipe performance of a screen in the evaporator section which deals with transient surges in the heat input. Errors in a previous code have been corrected, and the new code adds additional loss terms in order to model several different working fluids. Good agreement with existing performance curves is obtained. From a preliminary evaluation of several of the radiator design parameters it is found that an optimum fin width could be achieved but that structural considerations limit the thickness of the fin to a value above optimum.

Evans, Austin Lewis↗
NASA NTRS1989

A simplified procedure for decoding the (23,12) and (24,12) Golay codes

A simplified procedure is developed to decode the three possible erors in a (23,12) Golay codeword. A computer simulation shows that this algorithm is modular, regular and naturally suitable for both Very Large Scale Integration (VLSI) and software implementation. An extension of this new decoding procedure is used also to decode the 1/2-rate (24,12) Golay code, thereby correcting three and detecting four errors.

Truong, T. K.↗
NASA NTRS1990

Pipeline Time- And Transform-Domain Reed-Solomon Decoders

Modification of decoding algorithms leads to simplified conceptual designs for time- and transform-domain Reed-Soloman (RS) decoders suitable for implementation as very-large-scale integrated (VLSI) circuits. New conceptual decoders determine simultaneously errata-locator and errata-evaluator polynomials as part of simplified scheme for corrections of errors and erasures in RS codes. Highly suitable for implementation in both VLSI circuitry and in software on general-purpose computer.

Hsu, In-Shek↗
NASA NTRS2003

VLSI design of turbo decoder for integrated communication system on a chip applications

A high-throughput low-power turbo decoder core has been developed for integrated communication system applications such as satellite communications, wireless LAN, digital TV, cable modem, Digital Video Broadcast (DVB), and xDSL systems. The turbo decoder is based on convolutional constituent codes, which outperform all other Forward Error Correction techniques. This turbo decoder core is parameterizable and can be modified easily to fit any size for advanced communication system-on-chip products. The turbo decoder core provides Forward Error Correction of up to 15 Mbits/sec on a 0.13-micron CMOS FPGA prototyping chip at a power of 0.1 watts.

turbo decoder↗
NASA NTRS1989

Fast transform decoding of nonsystematic Reed-Solomon codes

A Reed-Solomon (RS) code is considered to be a special case of a redundant residue polynomial (RRP) code, and a fast transform decoding algorithm to correct both errors and erasures is presented. This decoding scheme is an improvement of the decoding algorithm for the RRP code suggested by Shiozaki and Nishida, and can be realized readily on very large scale integration chips.

Truong, T. K.↗
NASA NTRS1986

Using Hough harmonics to validate and assess nonlinear shallow-water models

The implementation of a technique for locating programming errors in shallow-water codes, establishing the correctness of the code, and assessing the performance of the numerical model under various flow conditions is described. The right-hand side of the differential equations is modified in such a way that the exact solution of the nonlinear initial-value problem is known, so that the truncation errors of the numerical scheme can be studied in detail. The exact solution is prescribed to be any linear combination of Hough harmonics which propagate in time according to their natural frequencies.

Dee, Dick P.↗
NASA NTRS1994

A method to compute SEU fault probabilities in memory arrays with error correction

With the increasing packing densities in VLSI technology, Single Event Upsets (SEU) due to cosmic radiations are becoming more of a critical issue in the design of space avionics systems. In this paper, a method is introduced to compute the fault (mishap) probability for a computer memory of size M words. It is assumed that a Hamming code is used for each word to provide single error correction. It is also assumed that every time a memory location is read, single errors are corrected. Memory is read randomly whose distribution is assumed to be known. In such a scenario, a mishap is defined as two SEU's corrupting the same memory location prior to a read. The paper introduces a method to compute the overall mishap probability for the entire memory for a mission duration of T hours.

Gercek, Gokhan↗
NASA NTRS1987

The performance of trellis coded multilevel DPSK on a fading mobile satellite channel

The performance of trellis coded multilevel differential phase-shift-keying (MDPSK) over Rician and Rayleigh fading channels is discussed. For operation at L-Band, this signalling technique leads to a more robust system than the coherent system with dual pilot tone calibration previously proposed for UHF. The results are obtained using a combination of analysis and simulation. The analysis shows that the design criterion for trellis codes to be operated on fading channels with interleaving/deinterleaving is no longer free Euclidean distance. The correct design criterion for optimizing bit error probability of trellis coded MDPSK over fading channels will be presented along with examples illustrating its application.

Simon, Marvin K.↗
NASA NTRS1988

The performance of trellis coded multilevel DPSK on a fading mobile satellite channel

The performance of trellis-coded multilevel differential phase-shift-keying (MDPSK) modulation over Rician and Rayleigh fading channels is discussed. For operation at L-band, this signalling technique leads to a more robust system than the coherent system with dual pilot tone calibration previously proposed for UHF. The results are obtained using a combination of analysis and simulation. The analysis shows that the design criterion for trellis codes to be operated on fading channels with interleaving/deinterleaving is no longer free Euclidean distance. The correct design criterion for optimizing bit error probability of trellis coded MDPSD over fading channels is presented along with examples illustrating its application.

Simon, Marvin K.↗
NASA NTRS1992

Nonlinear, nonbinary cyclic group codes

New cyclic group codes of length 2(exp m) - 1 over (m - j)-bit symbols are introduced. These codes can be systematically encoded and decoded algebraically. The code rates are very close to Reed-Solomon (RS) codes and are much better than Bose-Chaudhuri-Hocquenghem (BCH) codes (a former alternative). The binary (m - j)-tuples are identified with a subgroup of the binary m-tuples which represents the field GF(2 exp m). Encoding is systematic and involves a two-stage procedure consisting of the usual linear feedback register (using the division or check polynomial) and a small table lookup. For low rates, a second shift-register encoding operation may be invoked. Decoding uses the RS error-correcting procedures for the m-tuple codes for m = 4, 5, and 6.

Solomon, G.↗
NASA NTRS2008

Integrated Performance of Next Generation High Data Rate Receiver and AR4JA LDPC Codec for Space Communications

Low-density parity-check (LDPC) codes are the state-of-the-art in forward error correction (FEC) technology that exhibits capacity approaching performance. The Jet Propulsion Laboratory (JPL) has designed a family of LDPC codes that are similar in structure and therefore, leads to a single decoder implementation. The Accumulate-Repeat-by-4-Jagged- Accumulate (AR4JA) code design offers a family of codes with rates 1/2, 2/3, 4/5 and lengths 1024, 4096, 16384 information bits. Performance is less than one dB from capacity for all combinations.Integrating a stand-alone LDPC decoder with a commercial-off-the-shelf (COTS) receiver faces additional challenges than building a single receiver-decoder unit from scratch. In this work, we outline the issues and show that these additional challenges can be over-come by simple solutions. To demonstrate that an LDPC decoder can be made to work seamlessly with a COTS receiver, we interface an AR4JA LDPC decoder developed on a field-programmable gate array (FPGA) with a modern high data rate receiver and mea- sure the combined receiver-decoder performance. Through optimizations that include an improved frame synchronizer and different soft-symbol scaling algorithms, we show that a combined implementation loss of less than one dB is possible and therefore, most of the coding gain evidence in theory can also be obtained in practice. Our techniques can benefit any modem that utilizes an advanced FEC code.

Cheng, Michael K.↗
NASA NTRS1981

A decoding failure test for the transform decoder of Reed-Solomon code

Using a finite field transform, a transform decoding algorithm is able to correct erasures as well as errors of any (n,k,d) Reed-Solomon code over the finite field GF(q). A pitfall of transform decoding and how to avoid it are discussed. A simple test is given so that the decoder fails to decode instead of introducing additional errors, whenever the received word contains too many errors and erasures.

Miller, R. L.↗
NASA NTRSDate not supplied

Design and Performance of a Multi-mode Photon-counting Receiver for the NASA O2O Mission

The NASA Orion O2O mission was designed and tested to support high-rate bi-directional optical communications between one of multiple ground sites and a crewed capsule during a 10-day mission. This paper focuses on the design and performance of the receiver that will be based at the NASA White Sands Complex, New Mexico, USA. The main receiver components consist of two 40-cm apertures, each coupled to a specialty multi-mode optical fiber; each fiber coupled to a custom array of superconducting nanowire single-photon detectors; a high-speed, high-channel-count time-to-digital converter; and custom digitizing electronics to perform deserialization, demodulation, clock recovery, and forward error correction with a powerful serially-concatenated pulse-position-modulation turbo code. We show error-free data communication performance up to the maximum required data rate of 267 Mb/s.

optical↗
NASA NTRS2005

Highly Reliable, High-Speed, Unidirectional Serial Data Links

Highly reliable, high-speed, unidirectional serial data-communication subsystems have been proposed to be installed in an upgrade of the computing systems aboard the space shuttles. The basic design concept of these serial data links is also adaptable to terrestrial use in applications in which there are requirements for highly reliable serial data communications. The hardware and software aspects of the architecture of the data links are dictated largely by a requirement, in the original space-shuttle application, for one computer to monitor the memory transactions and memory contents of other computers in real time with high reliability and without reliance on requests for retransmission. To minimize weight while affording a capability to transfer data at a required rate of 2.56 x 10(exp 8) bits per second, it was decided that the links would be serial ones of the fiber-channel type. [Fiber channel denotes a type of serial computer bus that is used to connect a computer (usually a supercomputer) with a high-speed data storage device. Depending on the specific application, the physical connection between the transmitter and receiver could be made via an optical fiber or a twisted pair of wires.] Heretofore, fiber-channel links have ordinarily been bidirectional and have operated under protocols that provide for receiving stations to detect errors and request retransmission when necessary. In the present case, the time taken by processing to request retransmission would conflict with the requirement for real-time transfer of data. To ensure reliability without retransmission, a link according to the proposal would utilize a modified version of the normal fiberchannel character set in conjunction with forward error correction by means of a Reed-Solomon code (see figure). The Reed-Solomon encoding and decoding and the translations between the normal and modified character sets would be effected by logic circuitry external to the fiber-channel transmitter and receiver, which would be commercial off-the-shelf units. The receiving end of the link could detect and correct errors at a rate as high as 4 million times per second, if necessary. The receiver detects uncorrectable double-byte errors. It has been estimated that uncorrectable-error rate would amount to one failure in about 10(exp 19) characters.

Cole, Robert M.↗
NASA NTRS1972

Conceptual design of a 10 to the 8th power bit magnetic bubble domain mass storage unit and fabrication, test and delivery of a feasibility model

The conceptual design of a highly reliable 10 to the 8th power-bit bubble domain memory for the space program is described. The memory has random access to blocks of closed-loop shift registers, and utilizes self-contained bubble domain chips with on-chip decoding. Trade-off studies show that the highest reliability and lowest power dissipation is obtained when the memory is organized on a bit-per-chip basis. The final design has 800 bits/register, 128 registers/chip, 16 chips/plane, and 112 planes, of which only seven are activated at a time. A word has 64 data bits +32 checkbits, used in a 16-adjacent code to provide correction of any combination of errors in one plane. 100 KHz maximum rotational frequency keeps power low (equal to or less than, 25 watts) and also allows asynchronous operation. Data rate is 6.4 megabits/sec, access time is 200 msec to an 800-word block and an additional 4 msec (average) to a word. The fabrication and operation are also described for a 64-bit bubble domain memory chip designed to test the concept of on-chip magnetic decoding. Access to one of the chip's four shift registers for the read, write, and clear functions is by means of bubble domain decoders utilizing the interaction between a conductor line and a bubble.

Source record↗
NASA NTRS1974

Error control in the GCF: An information-theoretic model for error analysis and coding

The structure of data-transmission errors within the Ground Communications Facility is analyzed in order to provide error control (both forward error correction and feedback retransmission) for improved communication. Emphasis is placed on constructing a theoretical model of errors and obtaining from it all the relevant statistics for error control. No specific coding strategy is analyzed, but references to the significance of certain error pattern distributions, as predicted by the model, to error correction are made.

Adeyemi, O.↗