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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 307 records · Page 17
All sourcesNASA NTRSDOE OSTI
NASA NTRS2008

1KW Power Transmission Using Wireless Acoustic-Electric Feed-Through (WAEF)

A variety of space applications require the delivery of power into sealed structures. Since the structural integrity can be degraded by holes for cabling we present an alternative method of delivering power and information using stress waves to the internal space of a sealed structure. One particular application of this technology is in sample return missions where it is critical to preserve the sample integrity and to prevent earth contamination. Therefore, the container has to be hermetically sealed and the integrity of the seal must be monitored in order to insure to a high degree of reliability the integrity of the sample return vessel. In this study we investigated the use of piezoelectric acoustic-electric power feed-through devices to transfer electric power wirelessly through a solid wall by using elastic or acoustic waves. The technology is applicable to a range of space and terrestrial applications where power is required by electronic equipment inside sealed containers, vacuum or pressure vessels, etc., where holes in the wall are prohibitive or may result in significant structural performance degradation or unnecessarily complex designs. To meet requirements of higher power applications, the feasibility to transfer kilowatts level power was investigated. Pre-stressed longitudinal piezoelectric feed-through devices were analyzed by finite element models and an equivalent circuit model was developed to predict the power transfer characteristics to different electric loads. Based on the results of the analysis a prototype device was designed, fabricated and a demonstration of the transmission of electric power up to 1.068-kW was successfully conducted. Efficiencies in the 80-90% range were also demonstrated and methods to increase the efficiency further are currently being considered.

pressure vessels↗
NASA NTRS2018

Lightweight, Durable, and Multifunctional Electrical Insulation Material Systems for High Voltage Applications

Newly developed multilayer structures of well-known polymer insulation materials significantly improved dielectric breakdown voltage, VB, or dielectric strength, K, if well-bonded, when compared to those of single material insulations or the commercial SOA systems, such as Teflon-Kapton-Teflon (TKT), at the same overall thickness. To date, the greatest improvement of the new structures from a few candidate materials, including various types of Kapton PIs and PFA or PET as bond layer (BL), was about 61% higher than that of the Kapton PI alone films, 40.1 vs. 24.9 kV, which was translated to 86.3% decrease in insulation thickness, thus significant volume and weight reduction of the final system. However, it was of interest to note that most improvements of the multilayer structures occurred at thicker overall thicknesses, above ~ 0.15 mm. Extensive analyses also showed that K of the multilayer structures increased with (i) decreasing individual layer thickness regardless of material type, (ii) increasing total accumulated thickness of PI or overall PI/BL ratio, and (iii) increasing number of interface or total number of layers, but only above the aforementioned overall thickness limit. Increases in VB of the multilayer structures were directly correlated with damage evolution and failure mode. With further material-design-process optimizations of the multilayer structures, it was expected to achieve other multifunctionalities, such as high partial discharge (PD) resistance, improved durability, EMI shielding, and high thermal dissipation in addition to high dielectric strength. These new structures can be used in various high voltage and high temperature applications, such as future hybrid or all electric aircraft wiring and power transmission as well as many other non-aerospace high power cables, electronic parts and components, printed circuit board, and so forth. The multilayer insulation system can be easily processed and manufactured with various conductor types via calendaring, compression-molding, stamping, laminating, vacuum-bagging and autoclaving, or 3D printing, even for complex 3-D components. Based on their unique structural configurations and potential capabilities, the new insulation system was identified as micro-multilayer multifunctional electrical insulation (MMEI). Patent application of the MMEI concept and current design configurations was filed for a 1-year provisional application (OAI-58834, Serial No.: 62/659,234), pending conversion to a U.S. utility application. This paper presents details of the MMEI structures, their dielectric performance analyses, potential mechanisms, and commercial scaleup feasibility assessment.

Electric aircrafts↗
NASA NTRS2018

Lightweight, Durable, and Multifunctional Electrical Insulation Material Systems for High Voltage Applications

Newly developed multilayer structures of well-known polymer insulation materials significantly improved dielectric breakdown voltage, VB, or dielectric strength, K, if well-bonded, when compared to those of single material insulations or the commercial SOA systems, such as Teflon-Kapton-Teflon (TKT), at the same overall thickness. To date, the greatest improvement of the new structures from a few candidate materials, including various types of Kapton PIs and PFA or PET as bond layer (BL), was about 61% higher than that of the Kapton PI alone films, 40.1 vs. 24.9 kV, which was translated to 86.3% decrease in insulation thickness, thus significant volume and weight reduction of the final system. However, it was of interest to note that most improvements of the multilayer structures occurred at thicker overall thicknesses, above ~ 0.15 mm. Extensive analyses also showed that K of the multilayer structures increased with (i) decreasing individual layer thickness regardless of material type, (ii) increasing total accumulated thickness of PI or overall PI/BL ratio, and (iii) increasing number of interface or total number of layers, but only above the aforementioned overall thickness limit. Increases in VB of the multilayer structures were directly correlated with damage evolution and failure mode. With further material-design-process optimizations of the multilayer structures, it was expected to achieve other multifunctionalities, such as high partial discharge (PD) resistance, improved durability, EMI shielding, and high thermal dissipation in addition to high dielectric strength. These new structures can be used in various high voltage and high temperature applications, such as future hybrid or all electric aircraft wiring and power transmission as well as many other non-aerospace high power cables, electronic parts and components, printed circuit board, and so forth. The multilayer insulation system can be easily processed and manufactured with various conductor types via calendaring, compression-molding, stamping, laminating, vacuum-bagging and autoclaving, or 3D printing, even for complex 3-D components. Based on their unique structural configurations and potential capabilities, the new insulation system was identified as micro-multilayer multifunctional electrical insulation (MMEI). Patent application of the MMEI concept and current design configurations was filed for a 1-year provisional application (OAI-58834, Serial No.: 62/659,234), pending conversion to a U.S. utility application. This paper presents details of the MMEI structures, their dielectric performance analyses, potential mechanisms, and commercial scaleup feasibility assessment.

Multifunctional↗
NASA NTRS1996

Integration of the White Sands Complex into a Wide Area Network

The NASA White Sands Complex (WSC) satellite communications facility consists of two main ground stations, an auxiliary ground station, a technical support facility, and a power plant building located on White Sands Missile Range. When constructed, terrestrial communication access to these facilities was limited to copper telephone circuits. There was no local or wide area communications network capability. This project incorporated a baseband local area network (LAN) topology at WSC and connected it to NASA's wide area network using the Program Support Communications Network-Internet (PSCN-I). A campus-style LAN is configured in conformance with the International Standards Organization (ISO) Open Systems Interconnect (ISO) model. Ethernet provides the physical and data link layers. Transmission Control Protocol and Internet Protocol (TCP/IP) are used for the network and transport layers. The session, presentation, and application layers employ commercial software packages. Copper-based Ethernet collision domains are constructed in each of the primary facilities and these are interconnected by routers over optical fiber links. The network and each of its collision domains are shown to meet IEEE technical configuration guidelines. The optical fiber links are analyzed for the optical power budget and bandwidth allocation and are found to provide sufficient margin for this application. Personal computers and work stations attached to the LAN communicate with and apply a wide variety of local and remote administrative software tools. The Internet connection provides wide area network (WAN) electronic access to other NASA centers and the world wide web (WWW). The WSC network reduces and simplifies the administrative workload while providing enhanced and advanced inter-communications capabilities among White Sands Complex departments and with other NASA centers.

Boucher, Phillip Larry↗
NASA NTRS1988

Electronic Neural-Network Simulator

Experimental circuits faster than simulation programs run on digital computers. Serial shift register routes clock pulses C1 to neurons in sequence. Clock pulses C2 interrogate neurons. Neuron interconnection information stored in simulated synapses. Can be expanded to greater complexity.

Moopenn, Alex W.↗
NASA NTRS2011

Lockout/Tagout (LOTO) Simulator

The Lockout/Tagout (LOTO) Simulator is a portable training aid, or demonstration tool, designed to physically illustrate real-time critical-safety concepts of electrical lockout/tagout. The objective is to prevent misinterpretations of what is off and what is on during maintenance and repair of complex electrical systems. The simulator is designed in the form of a hinged box that opens up and stands on its own as an easel for demonstrations. On the outer face of the unit is a simulated circuit breaker box housing the switches. The breakers control the main power to the unit, a light bulb, and an electrical control cabinet. The light bulb is wired so that either of two breakers can provide power to it. When power is sent to the electrical control cabinet, a red indicator light illuminates. Inside the cabinet is the power supply from a personal computer. The power supply produces a 12-V dc output that is sent over to a small fan next to it, also from a computer, and an amber light on the front of the cabinet illuminates. A separate switch powers the fan on and off. The power supply is behind a plastic shield to protect against exposure to live conductors. Electrical banana jacks are mounted in the plastic shield to allow a voltmeter to be connected safely when opening the cabinet and taking a meter reading to verify de-energization as part of a simulation exercise. This LOTO simulator prototype is designed and fabricated as an all-in-one unit. All accessories can be stored inside the hinged case, and there is a handle on top for ease of transport. The circuit breaker labels attach with hook and loop fasteners so that they may be moved and changed to fit the training or demonstration scenario. The warning signs and labels on the electrical control box are magnetic, allowing for easy reconfiguration to emulate different equipment setups. A specially designed magnetic cover was made to disguise the indicator lights for demonstrations when these indicators are not used. The cover is disguised as an arc flash safety label that would typically be found on such a cabinet. One indicator light has a separate switch that can take it offline. This is to allow for demonstration to trainees on why it is important not to completely rely on indicator lights, but that they should always take a meter reading at the exposed conductors to absolutely verify de-energization before exposure. A clear plastic barrier and banana jacks inside the cabinet provide a safe way to plug in a voltmeter for demonstrations without exposure to the hazards of energized equipment. A small remote control unit is wired into the fan circuit. The remote allows the demonstrator to turn the fan on and off, provided that all of the breakers and switches leading to it are configured on as well. The remote feature was added in order to demonstrate the importance of starting the lockout/tagout task with energized equipment, then powering it down, isolating it, and locking it out to ensure that the correct breakers have been locked out.

Scheer, Jennifer↗
NASA NTRS2008

Intelligent Memory Module Overcomes Harsh Environments

Solar cells, integrated circuits, and sensors are essential to manned and unmanned space flight and exploration, but such systems are highly susceptible to damage from radiation. Especially problematic, the Van Allen radiation belts encircle Earth in concentric radioactive tori at distances from about 6,300 to 38,000 km, though the inner radiation belt can dip as low as 700 km, posing a severe hazard to craft and humans leaving Earth s atmosphere. To avoid this radiation, the International Space Station and space shuttles orbit at altitudes between 275 and 460 km, below the belts range, and Apollo astronauts skirted the edge of the belts to minimize exposure, passing swiftly through thinner sections of the belts and thereby avoiding significant side effects. This radiation can, however, prove detrimental to improperly protected electronics on satellites that spend the majority of their service life in the harsh environment of the belts. Compact, high-performance electronics that can withstand extreme environmental and radiation stress are thus critical to future space missions. Increasing miniaturization of electronics addresses the need for lighter weight in launch payloads, as launch costs put weight at a premium. Likewise, improved memory technologies have reduced size, cost, mass, power demand, and system complexity, and improved high-bandwidth communication to meet the data volume needs of the next-generation high-resolution sensors. This very miniaturization, however, has exacerbated system susceptibility to radiation, as the charge of ions may meet or exceed that of circuitry, overwhelming the circuit and disrupting operation of a satellite. The Hubble Space Telescope, for example, must turn off its sensors when passing through intense radiation to maintain reliable operation. To address the need for improved data quality, additional capacity for raw and processed data, ever-increasing resolution, and radiation tolerance, NASA spurred the development of the Radiation Tolerant Intelligent Memory Stack (RTIMS).

Source record↗
NASA NTRS1985

Oxygen and carbon in silicon

The properties of the early transistors were determined by the minority-carrier lifetime, as is the silicon photovoltaic solar cell. Most of the devices on the modern integrated circuits are majority carrier devices, in part to avoid this lifetime dependence. The micro-electronics industry typically starts with wafers with a minority-carrier lifetime of 1000 micro-seconds, but during device fabrication this lifetime is reduced to beflow 1 micro-second, in spite of extraordinary cleanliness and precautions. Process-induced defects (PID) include point defects, defect complexes, line defects, and bulk precipitates. One of the aspects that needs to be better understood is the nature of minority carrier recombination at line defects and at precipitates. Some of the PIDs are known to be related to the fast-diffusers of the iron-series transition elements. One of the common techniques of dealing with these elements is intrinsic gettering by the oxygen precipitates. But even in the gettered state, there may be a residual effect on the lifetime. Oxygen is an almost ubiquitous impurity in silicon and plays an important role in both integrated circuits and solar cells. The isolated oxygen interstitial is electrically inactive, but in its various aggregated forms it has a variety of electrical activities. The agglomeration and precipitation of oxygen, including impurity gettering and the complicating role of carbon, is discussed.

Corbett, J. W.↗
NASA NTRS1995

InGaAsSb/GaSb thermophotovoltaic cells

AstroPower is developing InGaAsSb thermophotovoltaic (TPV) devices. This photovoltaic cell is a two-layer epitaxial InGaAsSb structure formed by liquid-phase epitaxy on a GaSb substrate. The (direct) bandgap of the In(1 - x)Ga(x)As(1 -y)Sb(y) alloy is 0.50 to 0.55 eV, depending on its exact alloy composition (x, y); and is closely lattice-matched to the GaSb substrate The use of the quaternary alloy, as opposed to a ternary alloy - such as, for example, InGaAs/InP - permits low bandgap devices optimized for 1000 to 1500 C thermal sources with, with at the time, near-exact lattice matching to the GaSb substrate. Lattice-matching is important since even a small degree of lattice mismatch degrades device performance and reliability and increases processing complexity. For bandgaps of 0.52 eV,Fo internal quantum efficiencies as high as 95% have been measured at a wavelength of 2 microns. At 1 micron wavelengths, internal quantum efficiencies of 55% have been observed. The open-circuit voltage at currents of 0.3 A/sq cm is 0.220 volts and 0.260 V for current densities of 2 A/sq cm. Fill factors of 56% have also been measured. These preliminary results lead to the conclusion that the GaSb-based quaternary compounds provide a viable and high performance energy conversion solution for thermophotovoltaic systems operating with 1000 to 1500 C source temperatures.

Mauk, M. G.↗
NASA NTRS2009

On DESTINY Science Instrument Electrical and Electronics Subsystem Framework

Future space missions are going to require large focal planes with many sensing arrays and hundreds of millions of pixels all read out at high data rates'' . This will place unique demands on the electrical and electronics (EE) subsystem design and it will be critically important to have high technology readiness level (TRL) EE concepts ready to support such missions. One such omission is the Joint Dark Energy Mission (JDEM) charged with making precise measurements of the expansion rate of the universe to reveal vital clues about the nature of dark energy - a hypothetical form of energy that permeates all of space and tends to increase the rate of the expansion. One of three JDEM concept studies - the Dark Energy Space Telescope (DESTINY) was conducted in 2008 at the NASA's Goddard Space Flight Center (GSFC) in Greenbelt, Maryland. This paper presents the EE subsystem framework, which evolved from the DESTINY science instrument study. It describes the main challenges and implementation concepts related to the design of an EE subsystem featuring multiple focal planes populated with dozens of large arrays and millions of pixels. The focal planes are passively cooled to cryogenic temperatures (below 140 K). The sensor mosaic is controlled by a large number of Readout Integrated Circuits and Application Specific Integrated Circuits - the ROICs/ASICs in near proximity to their sensor focal planes. The ASICs, in turn, are serviced by a set of "warm" EE subsystem boxes performing Field Programmable Gate Array (FPGA) based digital signal processing (DSP) computations of complex algorithms, such as sampling-up-the-ramp algorithm (SUTR), over large volumes of fast data streams. The SUTR boxes are supported by the Instrument Control/Command and Data Handling box (ICDH Primary and Backup boxes) for lossless data compression, command and low volume telemetry handling, power conversion and for communications with the spacecraft. The paper outlines how the JDEM DESTINY concept instrument EE subsystem can be built now, a design; which is generally U.S. Government work not protected by U.S. copyright IEEEAC paper # 1429. Version 4. Updated October 19, 2009 applicable to a wide variety of missions using large focal planes with lar ge mosaics of sensors.

Kizhner, Semion↗
NASA NTRS2005

NASA Tech Briefs, April 2005

Gas-Tolerant Device Senses Electrical Conductivity of Liquid Nanoactuators Based on Electrostatic Forces on Dielectrics Replaceable Microfluidic Cartridges for a PCR Biosensor CdZnTe Image Detectors for Hard-X-Ray Telescopes High-Aperture-Efficiency Horn Antenna Full-Circle Resolver-to-Linear-Analog Converter Continuous, Full-Circle Arctangent Circuit Advanced Three-Dimensional Display System Automatic Focus Adjustment of a Microscope Topics covered include: FastScript3D - A Companion to Java 3D; Generating Mosaics of Astronomical Images; Simulating Descent and Landing of a Spacecraft; Simulating Vibrations in a Complex Loaded Structure; Rover Sequencing and Visualization Program; Software Template for Instruction in Mathematics; Support for User Interfaces for Distributed Systems; Nanostructured MnO2-Based Cathodes for Li-Ion/Polymer Cells; Multi-Layer Laminated Thin Films for Inflatable Structures; Two-Step Laser Ranging for Precise Tracking of a Spacecraft; Growing Aligned Carbon Nanotubes for Interconnections in ICs; Multilayer Composite Pressure Vessels; Texturing Blood-Glucose-Monitoring Optics Using Oxygen Beams; Fault-Tolerant Heat Exchanger; Atomic Clock Based on Opto-Electronic Oscillator; Microfocus/Polycapillary-Optic Crystallographic X-Ray Sys; Depth-Penetrating Luminescence Thermography of Thermal- Barrier Coatings; One-Dimensional Photonic Crystal Superprisms; Measuring Low-Order Aberrations in a Segmented Telescope; Mapping From an Instrumented Glove to a Robot Hand; Application of the Hilbert-Huang Transform to Financial Data; Optimizing Parameters for Deep-Space Optical Communication; and Low-Shear Microencapsulation and Electrostatic Coating.

Source record↗
NASA NTRSDate not supplied

Upscaling of 500 °C Durable SiC JFET-R Integrated Circuits

At HiTEC 2018, NASA Glenn Research Center reported the first demonstration of yearlong 500 °C operation of ceramic-packaged “Generation 10” ~200-transistor integrated circuits (ICs) based on two-level interconnect silicon carbide (4H-SiC) junction field effect transistors and resistors (JFET-R). This HiTEC 2021 submission updates on-going efforts at NASA Glenn spanning two subsequent prototype IC generations “11 and 12” to increase both complexity and durability of these ICs. Increased chip complexities of around 1000 transistors/chip for Gen. 11 and near 3000 transistors/chip for Gen. 12 are made possible by reductions in minimum layout feature sizes (including resistor width shrinkage from 6 µm to 2 µm) coupled with enlarged die size (from 3 x 3 mm to 5 x 5 mm). Gen. 11 ICs electrically tested to date include an 8-bit delta-sigma analog to digital converter (ADC) as well as upscaled random access memory (RAM) and nearly 1 kbit read only memory (ROM). However, Gen. 11 prototype ICs exhibited significantly lower yield and durability than Gen. 10 ICs. Development of revised processing is being investigated towards mitigating these issues in subsequent Gen. 12 fabrication run currently in progress.

silicon carbide↗
NASA NTRS1989

Eight-Bit-Slice GaAs General Processor Circuit

Novel GaAs 8-bit slice enables quick and efficient implementation of variety of fast GaAs digital systems ranging from central processing units of computers to special-purpose processors for communications and signal-processing applications. With GaAs 8-bit slice, designers quickly configure and test hearts of many digital systems that demand fast complex arithmetic, fast and sufficient register storage, efficient multiplexing and routing of data words, and ease of control.

Weissman, John↗
NASA NTRS1989

Optical Addressing And Clocking Of RAM's

Proposed random-access-memory (RAM) addressing system, in which memory linked optically to read/write logic circuits, greatly increases computer operating speed. System - comprises addressing circuits including numerous lasers as signal sources, numerous optical gates including optical detectors associated with memory cells, and holographic element to direct light signals to desired memory-cell locations - applied to high-capacity digital systems, supercomputers, and complex microcircuits.

Johnston, Alan R.↗
NASA NTRS1998

FPGA Based Reconfigurable ATM Switch Test Bed

Various issues associated with "FPGA Based Reconfigurable ATM Switch Test Bed" are presented in viewgraph form. Specific topics include: 1) Network performance evaluation; 2) traditional approaches; 3) software simulation; 4) hardware emulation; 5) test bed highlights; 6) design environment; 7) test bed architecture; 8) abstract sheared-memory switch; 9) detailed switch diagram; 10) traffic generator; 11) data collection circuit and user interface; 12) initial results; and 13) the following conclusions: Advances in FPGA make hardware emulation feasible for performance evaluation, hardware emulation can provide several orders of magnitude speed-up over software simulation; due to the complexity of hardware synthesis process, development in emulation is much more difficult than simulation and requires knowledge in both networks and digital design.

Chu, Pong P.↗
NASA NTRS2019

FPGA Mitigation Strategies for Critical Applications

Technology is changing at a fast pace. Transistor geometries are getting smaller, voltage thresholds are getting lower, design complexity is exponentially increasing, and user options are expanding. Consequently, reliable insertion of error detection and correction (EDAC) circuitry has become relatively challenging. As a response, a variety of mitigation techniques are being evaluated. They range from weak EDAC circuits that save area and power to strong mitigation strategies that are a great expense to systems. This presentation will focus on radiation induced susceptibilities for a variety of FPGA types and ASIC devices. In addition, the user will be provided information on applicable mitigation strategies per device.

Berg, Melanie↗
NASA NTRS2000

Heat Transfer in a Complex Trailing Edge Passage for a High Pressure Turbine Blade - Part 1: Experimental Measurements: Experimental Measurements - Part 1

A combined experimental and computational study has been performed to investigate the detailed heat transfer coefficient distributions within a complex blade trailing edge passage. The experimental measurements are made using a steady liquid crystal thermography technique applied to one major side of the passage. The geometry of the trailing edge passage is that of a two-pass serpentine circuit with a sharp 180-degree turning region at the tip. The upflow channel is split by interrupted ribs into two major subchannels, one of which is turbulated. This channel has an average aspect ratio of roughly 14:1. The spanwise extent of the channel geometry includes both area convergence from root to tip, as well as taper towards the trailing edge apex. The average section Reynolds numbers tested in this upflow channel range from 55,000 to 98,000. The tip section contains a turning vane near the extreme comer. The downflow channel has an aspect ratio of about 5:1, and also includes convergence and taper. Turbulators of varying sizes are included in this channel also. Both detailed heat transfer and pressure distribution measurements are presented. The pressure measurements are incorporated into a flow network model illustrating the major loss contributors.

Bunker, Ronald S.↗
NASA NTRS2010

26th Space Simulation Conference Proceedings. Environmental Testing: The Path Forward

Topics covered include: A Multifunctional Space Environment Simulation Facility for Accelerated Spacecraft Materials Testing; Exposure of Spacecraft Surface Coatings in a Simulated GEO Radiation Environment; Gravity-Offloading System for Large-Displacement Ground Testing of Spacecraft Mechanisms; Microscopic Shutters Controlled by cRIO in Sounding Rocket; Application of a Physics-Based Stabilization Criterion to Flight System Thermal Testing; Upgrade of a Thermal Vacuum Chamber for 20 Kelvin Operations; A New Approach to Improve the Uniformity of Solar Simulator; A Perfect Space Simulation Storm; A Planetary Environmental Simulator/Test Facility; Collimation Mirror Segment Refurbishment inside ESA s Large Space; Space Simulation of the CBERS 3 and 4 Satellite Thermal Model in the New Brazilian 6x8m Thermal Vacuum Chamber; The Certification of Environmental Chambers for Testing Flight Hardware; Space Systems Environmental Test Facility Database (SSETFD), Website Development Status; Wallops Flight Facility: Current and Future Test Capabilities for Suborbital and Orbital Projects; Force Limited Vibration Testing of JWST NIRSpec Instrument Using Strain Gages; Investigation of Acoustic Field Uniformity in Direct Field Acoustic Testing; Recent Developments in Direct Field Acoustic Testing; Assembly, Integration and Test Centre in Malaysia: Integration between Building Construction Works and Equipment Installation; Complex Ground Support Equipment for Satellite Thermal Vacuum Test; Effect of Charging Electron Exposure on 1064nm Transmission through Bare Sapphire Optics and SiO2 over HfO2 AR-Coated Sapphire Optics; Environmental Testing Activities and Capabilities for Turkish Space Industry; Integrated Circuit Reliability Simulation in Space Environments; Micrometeoroid Impacts and Optical Scatter in Space Environment; Overcoming Unintended Consequences of Ambient Pressure Thermal Cycling Environmental Tests; Performance and Functionality Improvements to Next Generation Thermal Vacuum Control System; Robotic Lunar Lander Development Project: Three-Dimensional Dynamic Stability Testing and Analysis; Thermal Physical Properties of Thermal Coatings for Spacecraft in Wide Range of Environmental Conditions: Experimental and Theoretical Study; Molecular Contamination Generated in Thermal Vacuum Chambers; Preventing Cross Contamination of Hardware in Thermal Vacuum Chambers; Towards Validation of Particulate Transport Code; Updated Trends in Materials' Outgassing Technology; Electrical Power and Data Acquisition Setup for the CBER 3 and 4 Satellite TBT; Method of Obtaining High Resolution Intrinsic Wire Boom Damping Parameters for Multi-Body Dynamics Simulations; and Thermal Vacuum Testing with Scalable Software Developed In-House.

Packard, Edward A.↗