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At least 307 records · Page 17

SAMPA Based Streaming Readout Data Acquisition Prototype

We have assembled a small-scale streaming data acquisition system based on the SAMPA front-end ASIC. The 32-channel SAMPA chip was designed for the high-luminosity upgrade of the ALICE Time Projection Chamber (TPC) detector at the CERN Large Hadron Collider. The goals of the prototype system are to determine if the SAMPA chip is appropriate for use in detector systems at Jefferson Lab, and to gain experience with the hardware and software required to deploy streaming data acquisition systems in nuclear physics experiments. The 800 channel system is composed of components used in the ALICE TPC data acquisition upgrade. Five front-end cards (FEC) support five SAMPA chips each. SAMPA data streams on an FEC are concentrated into two high-speed (4.48 Gb/s) serial data streams by a pair Gigabit Transceiver ASICs (GBTx). These ten streams (44.8 Gb/s) are transmitted from the FECs over fibers to a PCIe based readout unit. The FPGA engine on the readout unit compresses data for transmission to a server via 100 Gb ethernet. Components on the FECs are radiation tolerant. High data rates can be handled. The system is by design scalable and thus provides a functional prototype for high-rate streaming readout at Jefferson Lab and the future Electron Ion Collider. We have made fundamental measurements (noise, linearity, time resolution) on the SAMPA ASIC. We have also coupled the readout system to a small Gas Electron Multiplier (GEM) detector and have studied its response to cosmic rays. A beam test of the system is planned.

ABBOTT, David↗

Reed-Solomon Encoder

Report presents mathematical principles of Berlekamp bit serial multiplier algorithm and its application to design of very-large-scale integrated (VLSI) encoders for Reed-Solomon error-correcting codes. Structure made readily on single chip of negatively doped channel metal oxide semiconductor.

Troung, T. K.↗

Programmable synaptic devices for electronic neural nets

The architecture, design, and operational characteristics of custom VLSI and thin film synaptic devices are described. The devices include CMOS-based synaptic chips containing 1024 reprogrammable synapses with a 6-bit dynamic range, and nonvolatile, write-once, binary synaptic arrays based on memory switching in hydrogenated amorphous silicon films. Their suitability for embodiment of fully parallel and analog neural hardware is discussed. Specifically, a neural network solution to an assignment problem of combinatorial global optimization, implemented in fully parallel hardware using the synaptic chips, is described. The network's ability to provide optimal and near optimal solutions over a time scale of few neuron time constants has been demonstrated and suggests a speedup improvement of several orders of magnitude over conventional search methods.

Moopenn, A.↗

Scalable Nanoimprint Manufacturing of Functional Multilayer Metasurface Devices

Optical metasurfaces, consisting of subwavelength-scale meta-atom arrays, hold great promise of overcoming the fundamental limitations of conventional optics. Due to their structural complexity, metasurfaces usually require high-resolution yet slow and expensive fabrication processes. Here, using a metasurface polarimetric imaging device as an example, the photonic structures and the Nanoimprint lithography (NIL) processes are designed, creating two separate NIL molds over a patterning area of > 20 mm2 with designed Moiré alignment markers by electron-beam writing, and further subsequently integrate silicon and aluminum metasurface structures on a chip. Uniquely, the silicon and aluminum metasurfaces are fabricated by using the nanolithography and 3D pattern-transfer capabilities of NIL, respectively, achieving nanometer-scale linewidth uniformity, sub-200 nm translational overlay accuracy, and <0.017 rotational alignment error while significantly reducing fabrication complexity and surface roughness. Here, the micro-sized multilayer metasurfaces have high circular polarization extinction ratios as large as ≈20 and ≈80 in blue and red wavelengths. Further, the metasurface chip-integrated CMOS imager demonstrates high accuracy in broad-band, full Stokes parameter analysis in the visible wavelength ranges and single-shot polarimetric imaging. This novel, NIL-based, multilayered nanomanufacturing approach is applicable to the scalable production of large-area functional structures for ultra-compact optic, electronic, and quantum devices.

36 MATERIALS SCIENCE↗

CADAT place-and-routine in two dimensions

CADAT place-and-route-in-two dimensions program (PR2D) is standard-cell automatic-layout program for generating large-scale-integrated/metal-oxidesemiconductor (LSI/MOS) arrays. PR2D translates logic designer's cell interconnection requirements into physically-defined MOS chip. PR2D reads input data, searches pin data file for data on each pattern type, generates placement of patterns, and interconnects patterns. As output, it generates artwork for layouts.

Source record↗

Superconducting Quantum Arrays for Wideband Antennas and Low Noise Amplifiers

Superconducting Quantum Iinetference Filters (SQIF) consist of a two-dimensional array of niobium Josephson Junctions formed into N loops of incommensurate area. This structure forms a magnetic field (B) to voltage transducer with an impulse like response at B0. In principle, the signal-to-noise ratio scales as the square root of N and the noise can be made arbitrarily small (i.e. The SQIF chips are expected to exhibit quantum limited noise performance). A gain of about 20 dB was recently demonstrated at 10 GHz.

SQUID Detectors↗

A Realistic Full-Scale 3D Modeling of Turning Using Coupled Smoothed Particle Hydrodynamics and Finite Element Method for Predicting Cutting Forces

Computational modelling is an effective technique for understanding the complex physics of machining. Large deformations, material separation, and high computational requirements are the key challenges faced while simulating machining. This work introduces a full-scale three-dimensional model of turning operations using a combined approach based on the Smoothed Particle Hydrodynamics (SPH) and Finite Element (FE) methods. By exploiting the advantages of each method, this approach leads to high-fidelity coupled SPH-FE machining models. Cutting forces and chip morphology are the primary results of interest. The machining models are validated with the results of turning experiments. Two-dimensional machining model underpredicts the cutting force and feed force by approximately 49% and 70%, respectively. Moreover, passive force cannot be predicted using the two-dimensional model. On the other hand, with the three-dimensional models developed in this manuscript, the difference between the total simulated force and experimentally measured force is ∼17%. The chip morphologies correlate with experiments in terms of the direction of the chip movement and the “long” continuous chips observed while turning Al 6061. This work expands the realm of machining simulations from two-dimensional orthogonal machining or sectional three-dimensional model to a full-scale realistic simulation. The encouraging simulation results show the potential to study more complex phenomena, such as machining stability and tool path modulation.

42 ENGINEERING↗

Fungi-on-a-Chip: microfluidic platforms for single-cell studies on fungi

Abstract This review highlights new advances in the emerging field of ‘Fungi-on-a-Chip’ microfluidics for single-cell studies on fungi and discusses several future frontiers, where we envisage microfluidic technology development to be instrumental in aiding our understanding of fungal biology. Fungi, with their enormous diversity, bear essential roles both in nature and our everyday lives. They inhabit a range of ecosystems, such as soil, where they are involved in organic matter degradation and bioremediation processes. More recently, fungi have been recognized as key components of the microbiome in other eukaryotes, such as humans, where they play a fundamental role not only in human pathogenesis, but also likely as commensals. In the food sector, fungi are used either directly or as fermenting agents and are often key players in the biotechnological industry, where they are responsible for the production of both bulk chemicals and antibiotics. Although the macroscopic fruiting bodies are immediately recognizable by most observers, the structure, function, and interactions of fungi with other microbes at the microscopic scale still remain largely hidden. Herein, we shed light on new advances in the emerging field of Fungi-on-a-Chip microfluidic technologies for single-cell studies on fungi. We discuss the development and application of microfluidic tools in the fields of medicine and biotechnology, as well as in-depth biological studies having significance for ecology and general natural processes. Finally, a future perspective is provided, highlighting new frontiers in which microfluidic technology can benefit this field.

59 BASIC BIOLOGICAL SCIENCES↗

On-Chip Batteries as Distributed Energy Sources in Heterogeneous 2.5D/3D Integrated Circuits

Energy efficiency in digital systems faces challenges due to the constraints imposed by small-scale transistors. Moreover, the growing demand for portable consumer electronics necessitates the use of compact energy sources. To address these challenges, heterogeneous 3D IC technology has emerged as a promising solution for the former. Regarding the latter, we propose the concept of distributed batteries within a heterogeneous 3D IC. This approach involves utilizing multiple smaller batteries with different specifications among different modules of 3D ICs. This approach optimizes performance and overcomes limitations associated with both 3D ICs and conventional power delivery methods. Distributed batteries play a vital role in effectively managing the heat generated by energy sources and modules within a 3D IC. Furthermore, they contribute to achieving a uniform distribution of heat throughout the entire structure, which ultimately ensures the optimal performance of the batteries and modules. The simulation results indicate a 40 percent enhancement in achieving a more even distribution of generated heat. Additionally, the proposed distributed battery techniques improve power delivery, enhance reliability, and enable optimized voltage regulation while improving efficiency. In addition to the primary benefits, alternative configurations of the proposed approach can offer extra energy storage capacity and act as efficient electromagnetic shields, resulting in an impressive reduction of external electromagnetic noises by 60 dB.

47 OTHER INSTRUMENTATION↗

High data rate Reed-Solomon encoding and decoding using VLSI technology

Presented as an implementation of a Reed-Solomon encode and decoder, which is 16-symbol error correcting, each symbol is 8 bits. This Reed-Solomon (RS) code is an efficient error correcting code that the National Aeronautics and Space Administration (NASA) will use in future space communications missions. A Very Large Scale Integration (VLSI) implementation of the encoder and decoder accepts data rates up 80 Mbps. A total of seven chips are needed for the decoder (four of the seven decoding chips are customized using 3-micron Complementary Metal Oxide Semiconduction (CMOS) technology) and one chip is required for the encoder. The decoder operates with the symbol clock being the system clock for the chip set. Approximately 1.65 billion Galois Field (GF) operations per second are achieved with the decoder chip set and 640 MOPS are achieved with the encoder chip.

Miller, Warner↗

Cascade Back-Propagation Learning in Neural Networks

The cascade back-propagation (CBP) algorithm is the basis of a conceptual design for accelerating learning in artificial neural networks. The neural networks would be implemented as analog very-large-scale integrated (VLSI) circuits, and circuits to implement the CBP algorithm would be fabricated on the same VLSI circuit chips with the neural networks. Heretofore, artificial neural networks have learned slowly because it has been necessary to train them via software, for lack of a good on-chip learning technique. The CBP algorithm is an on-chip technique that provides for continuous learning in real time. Artificial neural networks are trained by example: A network is presented with training inputs for which the correct outputs are known, and the algorithm strives to adjust the weights of synaptic connections in the network to make the actual outputs approach the correct outputs. The input data are generally divided into three parts. Two of the parts, called the "training" and "cross-validation" sets, respectively, must be such that the corresponding input/output pairs are known. During training, the cross-validation set enables verification of the status of the input-to-output transformation learned by the network to avoid over-learning. The third part of the data, termed the "test" set, consists of the inputs that are required to be transformed into outputs; this set may or may not include the training set and/or the cross-validation set. Proposed neural-network circuitry for on-chip learning would be divided into two distinct networks; one for training and one for validation. Both networks would share the same synaptic weights.

Duong, Tuan A.↗

An Experimental Feasibility Study on Applying Neutron Tomography to Encapsulated Spent Nuclear Fuel - 20050

Visual inspection makes easier to ensure the integrity and safety of spent nuclear fuel (SNF) than any classical techniques. Various classical techniques have been applied but there are no reliable methods to qualitatively and quantitatively verify spent fuel in dry storage. Thus, the present authors have developed the prototype safeguards apparatus for dry storage employing the array of He-4 gas scintillation detectors (S670E, Arktis Radiation Detectors Ltd., Switzerland), newly designed to simultaneously measure thermal and fast neutrons without any moderators. The S670E detector has a cylindrical shape with a diameter of 52 mm and active length of 600 mm (total length: 875 mm). The detector is filled by He-4 gas with an approximate pressure of 180 bar for fast neutron detection, and its inner wall is coated by Li-6 for thermal neutron detection. The scintillation lights generated via Li-6 nuclear reaction and elastic scattering are collected by 24 SiPMs linearly paired at the center of the detector. The detector delivers a TTL (Transistor-Transistor Logic) output for pulse readout and UART (Universal Asynchronous Receiver Transmitter) for device control. In order to assess feasibility of the apparatus, an experimental system has been designed, built, and optimized via computational studies. Cf-252 neutron sources and linearly arrayed detectors, working as a single detector, were occupied for this study due to the difficulties in working with SNF. The laboratory scale cask (diameter: 0.67 m, height: 1.5 m), minimized by a factor of 10 compared to the actual thickness of a commercial TN-32 cask, was also manufactured. The detector array was designed to rotate the lab-scale cask and obtain 36 image profiles at every 10 degrees. All profiles were aligned in single frame image called a sinogram, and the cross-sectional image was then fabricated by the inverse radon transform algorithm. These experiments have been repeated with different configurations and numbers of sources. Some gamma-ray sources were also measured with neutron sources in order to distinguish between neutron and gamma-ray pulses. Basically, a He-4 detector is designed to run on Linux OS so it is difficult to directly apply to Windows-based equipment widely used in S. Korea. Therefore, a new data acquisition board working on Windows OS was designed and built. The board mainly consists of FPGA (Field Programmable Gate Array) and SoC (System on Chip) for TTL pulse readout, sorting measured data, and transferring data to a user interface. In conclusion, the tomographic system at lab-scale has shown considerable potential to detect a partial or gross defect of encapsulated assemblies in dry storage. Next steps of this study will be to 1) repeatedly carry out experiments to demonstrate scientific reliability and validity, and 2) numerically integrate signals with weight factors to enhance the image quality since the suggested system based on passive interrogation method requires longer measurement time. Finally, the system will apply to a commercial dry storage phased out soon in S. Korea. (authors)

07 ISOTOPE AND RADIATION SOURCES↗

Evolution of Dissipative Regimes in Atomically Thin Bi 2 Sr 2 CaCu 2 O 8 + x Superconductor

Thermoelectric transport is widely used to study Abrikosov vortex dynamics in unconventional superconductors. However, only a few thermoelectric studies have been conducted near the dimensional crossover that occurs when the vortex-vortex interaction length scale becomes comparable to the sample size. Here, the effects of finite size on the dissipation mechanisms of the Nernst effect in the optimally doped Bi 2 Sr 2 CaCu 2 O 8 + x high-temperature superconductor are reported, down to the atomic length limit. To access this regime, a new generation of thermoelectric chips based on silicon nitride microprinted circuit boards is developed. These chips ensure optimized signals while preventing sample deterioration. The results demonstrate that lateral confinement at the nanoscale can effectively reduce vortex dissipation. Investigating vortex dissipation at the micro- and nano-scale is essential for creating stable, miniaturized superconducting circuits.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

High-performance 2D electronic devices enabled by strong and tough two-dimensional polymer with ultra-low dielectric constant

As the feature size of microelectronic circuits is scaling down to nanometer order, the increasing interconnect crosstalk, resistance-capacitance (RC) delay and power consumption can limit the chip performance and reliability. To address these challenges, new low-k dielectric (k < 2) materials need to be developed to replace current silicon dioxide (k = 3.9) or SiCOH, etc. However, existing low-k dielectric materials, such as organosilicate glass or polymeric dielectrics, suffer from poor thermal and mechanical properties. Two-dimensional polymers (2DPs) are considered promising low-k dielectric materials because of their good thermal and mechanical properties, high porosity and designability. Here, we report a chemical-vapor-deposition (CVD) method for growing fluoride rich 2DP-F films on arbitrary substrates. We show that the grown 2DP-F thin films exhibit ultra-low dielectric constant (in plane k = 1.85 and out-of-plane k = 1.82) and remarkable mechanical properties (Young’s modulus > 15 GPa). We also demonstrated the improved performance of monolayer MoS 2 field-effect-transistors when utilizing 2DP-F thin films as dielectric substrates.

36 MATERIALS SCIENCE↗

First results from a multiplexed and massive instrument with sub-electron noise Skipper-CCDs

Here, we present a new instrument composed of a large number of sub-electron noise Skipper-CCDs operated with a two stage analog multiplexed readout scheme suitable for scaling to thousands of channels. New, thick, 1.35 Mpix sensors, from a new foundry, are glued into a Multi-Chip Module (MCM) printed circuit board on a ceramic substrate which has 16 sensors each. The instrument, that can hold up-to 16 MCMs, a total of 256 Skipper-CCD sensors (called a Super-Module with ≈ 130 grams of active mass and 346 Mpix), is part of the R&D effort of the OSCURA experiment which will have ≈ 94 super-modules. Experimental results with 10 MCMs and 160 Skipper-CCDs sensors are presented in this paper. This is already the largest ever built instrument with single electron sensitivity CCDs using nondestructive readout, both, in terms of active mass and number of channels.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

GaAs VLSI for aerospace electronics

Advanced aerospace electronics systems require high-speed, low-power, radiation-hard, digital components for signal processing, control, and communication applications. GaAs VLSI devices provide a number of advantages over silicon devices including higher carrier velocities, ability to integrate with high performance optical devices, and high-resistivity substrates that provide very short gate delays, good isolation, and tolerance to many forms of radiation. However, III-V technologies also have disadvantages, such as lower yield compared to silicon MOS technology. Achieving very large scale integration (VLSI) is particularly important for fast complex systems. At very short gate delays (less than 100 ps), chip-to-chip interconnects severely degrade circuit clock rates. Complex systems, therefore, benefit greatly when as many gates as possible are placed on a single chip. To fully exploit the advantages of GaAs circuits, attention must be focused on achieving high integration levels by reducing power dissipation, reducing the number of devices per logic function, and providing circuit designs that are more tolerant to process and environmental variations. In addition, adequate noise margin must be maintained to ensure a practical yield.

Larue, G.↗

Particle-Gas Dynamics in the Midplane of a Protoplanetary Nebula

In this paper, we study the stage of planetary formation during which the particulate material is still dispersed as centimeter-to-meter sized primordial aggregates. During this stage, particles are able to settle toward the midplane into a layer of mass density comparable to or much greater than that of the gas. Nonlinear, coupled interactions between the particles and the nebula gas become significant and ultimately determine the vertical profiles of the particle density and the mean velocities of the particles and the nearby gas. This is the environment in which the earliest planetesimals probably form. Our numerical models rely on the Reynolds averaged Navier-Stokes equations for the gas and particles and are fully viscous and turbulent (and, for the particles. compressible). Our turbulence modeling uses a Prandtl local shear parametrization, validated by laboratory experiments. We have developed a new model for particle diffusion involving the profile of the nebula gas turbulence and the particle Schmidt number, which is a function of particle size and density. We model a cool, quiescent nebula at 1 AU (280 K) and 10 AU (90 K) and a higher temperature stage (1000 K) at 1 AU. Our main results include: (a) rapid accretion of planetesimals by gravitationally unstable fragmentation on an orbital time scale (the 'Goldreich-Ward instability') is unlikely to occur until objects have already accreted by some other process to the mass of the largest known meteorite samples, if at all; (b) from 'seeds' as small as 10 m, growth of 10- to 100-km planetesimals can proceed rapidly by drift-augmented accretion in the particle-rich midplane with orbital decay of about 1% for the growing planetesimals; (c) outward transport of vapor and small entrained chips can account for significant radial compositional and mineralogical mixing in primitive meteorite parent bodies. Other implications may be drawn concerning particle random collisional velocities and the time scales of midplane turbulence.

Cuzzi, Jeffrey N.↗

Spin-EPR-pair separation by conveyor-mode single electron shuttling in Si/SiGe

Long-ranged coherent qubit coupling is a missing function block for scaling up spin qubit based quantum computing solutions. Spin-coherent conveyor-mode electron-shuttling could enable spin quantum-chips with scalable and sparse qubit-architecture. Its key feature is the operation by only few easily tuneable input terminals and compatibility with industrial gate-fabrication. Single electron shuttling in conveyor-mode in a 420 nm long quantum bus has been demonstrated previously. Here we investigate the spin coherence during conveyor-mode shuttling by separation and rejoining an Einstein-Podolsky-Rosen (EPR) spin-pair. Compared to previous work we boost the shuttle velocity by a factor of 10000. We observe a rising spin-qubit dephasing time with the longer shuttle distances due to motional narrowing and estimate the spin-shuttle infidelity due to dephasing to be 0.7% for a total shuttle distance of nominal 560 nm. Shuttling several loops up to an accumulated distance of 3.36 μm, spin-entanglement of the EPR pair is still detectable, giving good perspective for our approach of a shuttle-based scalable quantum computing architecture in silicon.

42 ENGINEERING↗