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At least 307 records · Page 17

Trace-shortened Reed-Solomon codes

Reed-Solomon (RS) codes have been part of standard NASA telecommunications systems for many years. RS codes are character-oriented error-correcting codes, and their principal use in space applications has been as outer codes in concatenated coding systems. However, for a given character size, say m bits, RS codes are limited to a length of, at most, 2(exp m). It is known in theory that longer character-oriented codes would be superior to RS codes in concatenation applications, but until recently no practical class of 'long' character-oriented codes had been discovered. In 1992, however, Solomon discovered an extensive class of such codes, which are now called trace-shortened Reed-Solomon (TSRS) codes. In this article, we will continue the study of TSRS codes. Our main result is a formula for the dimension of any TSRS code, as a function of its error-correcting power. Using this formula, we will give several examples of TSRS codes, some of which look very promising as candidate outer codes in high-performance coded telecommunications systems.

Mceliece, R. J.↗

Performance evaluation of digital phase-locked loops for advanced deep space transponders

The performances of the digital phase-locked loops (DPLL's) for the advanced deep-space transponders (ADT's) are investigated. DPLL's considered in this article are derived from the analog phase-locked loop, which is currently employed by the NASA standard deep space transponder, using S-domain to Z-domain mapping techniques. Three mappings are used to develop digital approximations of the standard deep space analog phase-locked loop, namely the bilinear transformation (BT), impulse invariant transformation (IIT), and step invariant transformation (SIT) techniques. The performance in terms of the closed loop phase and magnitude responses, carrier tracking jitter, and response of the loop to the phase offset (the difference between in incoming phase and reference phase) is evaluated for each digital approximation. Theoretical results of the carrier tracking jitter for command-on and command-off cases are then validated by computer simulation. Both theoretical and computer simulation results show that at high sampling frequency, the DPLL's approximated by all three transformations have the same tracking jitter. However, at low sampling frequency, the digital approximation using BT outperforms the others. The minimum sampling frequency for adequate tracking performance is determined for each digital approximation of the analog loop. In addition, computer simulation shows that the DPLL developed by BT provides faster response to the phase offset than IIT and SIT.

Nguyen, T. M.↗

Fixed-head star tracker attitude updates on the Hubble Space Telescope

The Hubble Space Telescope (HST) was launched in April 1990 to begin observing celestial space to the edge of the universe. National Aeronautics and Space Administration (NASA) standard fixed-head star trackers (FHST's) are used operationally onboard the HST to regularly adjust ('update') the spacecraft attitude before the acquisition of guide stars for science observations. During the first 3 months of the mission, the FHST's updated the spacecraft attitude successfully only 85 percent of the time. During the other periods, the trackers were unable to find the selected stars -- either they failed to find any star, or worse, they selected incorrect stars and produced erroneous attitude updates. In July 1990, the HST project office at Goddard Space Flight Center (GSFC) requested that Computer Sciences Corporation (CSC) form an investigative 'tiger' team to examine these FHST update failures. This paper discusses the work of the FHST tiger team, describes the investigations that led the team to identify the sources of the errors, and defines the solutions that were subsequently developed, which ultimately increased the success rate of FHST updates to approximately 98 percent.

Nadelman, Matthew S.↗

Earth Observing System/Advanced Microwave Sounding Unit-A (EOS/AMSU-A): Developer derating policy

The derating requirements/factors tabulated in Appendix B of the Goddard Space Flight Center Preferred Parts List (GSFC PPL) and Appendix A of MIL-STD-975 (NASA Standard Electrical, Electronic and Electromechanical (EEE) Parts List) should be used. Where differences occur, the PPL derating factors should have precedence over the derating factors of MIL-STD-975. When a derating factor is not provided in either the PPL or MIL-STD-975, the GSFC EOS Parts Branch Specialist should be consulted. In addition, the Performance Assurance Requirement (PAR) stipulates that all piece parts shall function at or above twice the expected ionizing radiation dose.

Maciel, Roberto M.↗

Nickel cadmium battery operations and performance

The Earth Radiation Budget Satellite (ERBS), Compton Gamma Ray Observatory (CGRO), Upper Atmosphere Research Satellite (UARS), and Extreme Ultraviolet Explorer (EUVE) spacecraft are operated from NASA's Goddard Space Flight Center (GSFC) in Greenbelt, Maryland. On-board power subsystems for each satellite employ NASA Standard 50 Ampere-hour (Ah) nickel-cadmium batteries in a parallel configuration. To date, these batteries have exhibited degradation over periods from several months (anomalous behavior, UARS and CGRO (MPS-1); to little if any, EUVE) to several years (old age, normal behavior, ERBS). Since the onset of degraded performance, each mission's Flight Operations Team (FOT), under the direction of their cognizant GSFC Project Personnel and Space Power Application Branch's Engineers has closely monitored the battery performance and implemented several charge control schemes in an effort to extend battery life. Various software and hardware solutions have been developed to minimize battery overcharge. Each of the four sections of this paper covers a brief overview of each mission's operational battery management and its associated spacecraft battery performance. Also included are new operational procedures developed on-orbit that may be of special interest to future mission definition and development.

Rao, Gopalakrishna↗

Long range targeting for space based rendezvous

The work performed under this grant supported the Dexterous Flight Experiment one STS-62 The project required developing hardware and software for automating a TRAC sensor on orbit. The hardware developed by for the flight has been documented through standard NASA channels since it has to pass safety, environmental, and other issues. The software has not been documented previously, therefore, this report provides a software manual for the TRAC code developed for the grant.

Everett, Louis J.↗

On the Trellis structure of a (64,40,8) subcode of the (64,42,8) third-order Reed-Muller code

A (64,40,8) subcode of the (64,42,8) third-order Reed-Muller code is proposed to NASA for high-speed satellite communications. This code can be either used alone or used as an inner-code in a concatenated coding system with the NASA standard (255,223,33) Reed-Solomon code as the outer code to achieve high performance with reduced decoding complexity. This Reed-Muller subcode has a relatively simple and parallel trellis structure and consequently can be decoded with a group of identical and relatively simple Viterbi decoders in parallel to achieve high-speed decoding. In this report, the complexities of various sectionalized trellis diagrams are analyzed. Based on this analysis, the trellis diagram with the smallest overall complexity will be used for the implementation of a high-speed decoder.

Moorthy, Hari T.↗

Certification of a hybrid parameter model of the fully flexible Shuttle Remote Manipulator System

The development of high fidelity models of mechanical systems with flexible components is in flux. Many working models of these devices assume the elastic motion is small and can be superimposed on the overall rigid body motion. A drawback associated with this type of modeling technique is that it is required to regenerate the linear modal model of the device if the elastic motion is sufficiently far from the base rigid motion. An advantage to this type of modeling is that it uses NASTRAN modal data which is the NASA standard means of modal information exchange. A disadvantage to the linear modeling is that it fails to accurately represent large motion of the system, unless constant modal updates are performed. In this study, which is a continuation of a project started last year, the drawback of the currently used modal snapshot modeling technique is addressed in a rigorous fashion by novel and easily applied means.

Barhorst, Alan A.↗

The attitude accuracy consequences of on-orbit calibration of the Extreme Ultraviolet Explorer attitude sensors by the Flight Dynamics Facility at Goddard Space Flight Center

The science mission of the Extreme Ultraviolet Explorer (EUVE) requires attitude solutions with uncertainties of 27, 16.7, 16.7 arcseconds (3 sigma) around the roll, pitch, and yaw axes, respectively. The primary input to the attitude determination process is provided by two NASA standard fixed-head star trackers (FHSTs) and a Teledyne dry rotor inertial reference unit (DRIRU) 2. The attitude determination requirements approach the limits attainable with the FHSTs and DRIRU. The Flight Dynamics Facility (FDF) at Goddard Space Flight Center (GSFC) designed and executed calibration procedures that far exceeded the extent and the data volume of any other FDF-supported mission. The techniques and results of this attempt to obtain attitude accuracies at the limit of sensor capability and the results of analysis of the factors that limit the attitude accuracy are the primary subjects of this paper. The success of the calibration effort is judged by the resulting measurement residuals and comparisons between ground- and onboard-determined attitudes. The FHST star position residuals have been reduced to less tha 4 arcsec per axis -- a value that appears to be limited by the sensor capabilities. The FDF ground system uses a batch least-squares estimator to determine attitude. The EUVE onboard computer (OBC) uses an extended Kalman filter. Currently, there are systematic differences between the two attitude solutions that occasionally exceed the mission requirements for 3 sigma attitude uncertainty. Attempts to understand and reduce these differences are continuing.

Hashmall, J.↗

High-Speed Soft-Decision Decoding of Two Reed-Muller Codes

In this research, we have proposed the (64, 40, 8) subcode of the third-order Reed-Muller (RM) code to NASA for high-speed satellite communications. This RM subcode can be used either alone or as an inner code of a concatenated coding system with the NASA standard (255, 233, 33) Reed-Solomon (RS) code as the outer code to achieve high performance (or low bit-error rate) with reduced decoding complexity. It can also be used as a component code in a multilevel bandwidth efficient coded modulation system to achieve reliable bandwidth efficient data transmission. This report will summarize the key progress we have made toward achieving our eventual goal of implementing, a decoder system based upon this code. In the first phase of study, we investigated the complexities of various sectionalized trellis diagrams for the proposed (64, 40, 8) RM subcode. We found a specific 8-trellis diagram for this code which requires the least decoding complexity with a high possibility of achieving a decoding speed of 600 M bits per second (Mbps). The combination of a large number of states and a high data rate will be made possible due to the utilization of a high degree of parallelism throughout the architecture. This trellis diagram will be presented and briefly described. In the second phase of study, which was carried out through the past year, we investigated circuit architectures to determine the feasibility of VLSI implementation of a high-speed Viterbi decoder based on this 8-section trellis diagram. We began to examine specific design and implementation approaches to implement a fully custom integrated circuit (IC) which will be a key building block for a decoder system implementation. The key results will be presented in this report. This report will be divided into three primary sections. First, we will briefly describe the system block diagram in which the proposed decoder is assumed to be operating, and present some of the key architectural approaches being used to implement the system at high speed. Second, we will describe details of the 8-trellis diagram we found to best meet the trade-offs between chip and overall system complexity. The chosen approach implements the trellis for the (64, 40, 8) RM subcode with 32 independent sub-trellises. And third, we will describe results of our feasibility study on the implementation of such an IC chip in CMOS technology to implement one of these sub-trellises.

Lin, Shu↗

Circuit Design Approaches for Implementation of a Subtrellis IC for a Reed-Muller Subcode

In this research, we have proposed the (64, 40, 8) subcode of the third-order Reed-Muller (RM) code to NASA for high-speed satellite communications. This RM subcode can be used either alone or as an inner code of a concatenated coding system with the NASA standard (255, 233, 33) Reed-Solomon (RS) code as the outer code to achieve high performance (or low bit-error rate) with reduced decoding complexity. It can also be used as a component code in a multilevel bandwidth efficient coded modulation system to achieve reliable bandwidth efficient data transmission. This report will summarize the key progress we have made toward achieving our eventual goal of implementing a decoder system based upon this code. In the first phase of study, we investigated the complexities of various sectionalized trellis diagrams for the proposed (64, 40, 8) RM subcode. We found a specific 8-trellis diagram for this code which requires the least decoding complexity with a high possibility of achieving a decoding speed of 600 M bits per second (Mbps). The combination of a large number of states and a high data rate will be made possible due to the utilization of a high degree of parallelism throughout the architecture. This trellis diagram will be presented and briefly described. In the second phase of study which was carried out through the past year, we investigated circuit architectures to determine the feasibility of VLSI implementation of a high-speed Viterbi decoder based on this 8-section trellis diagram. We began to examine specific design and implementation approaches to implement a fully custom integrated circuit (IC) which will be a key building block for a decoder system implementation. The key results will be presented in this report. This report will be divided into three primary sections. First, we will briefly describe the system block diagram in which the proposed decoder is assumed to be operating and present some of the key architectural approaches being used to implement the system at high speed. Second, we will describe details of the 8-trellis diagram we found to best meet the trade-offs between chip and overall system complexity. The chosen approach implements the trellis for the (64, 40, 8) RM subcode with 32 independent sub-trellises. And third, we will describe results of our feasibility study on the implementation of such an IC chip in CMOS technology to implement one of these subtrellises.

Lin, Shu↗

High-Speed Soft-Decision Decoding of Two Reed-Muller Codes

In his research, we have proposed the (64, 40, 8) subcode of the third-order Reed-Muller (RM) code to NASA for high-speed satellite communications. This RM subcode can be used either alone or as an inner code of a concatenated coding system with the NASA standard (255, 233, 33) Reed-Solomon (RS) code as the outer code to achieve high performance (or low bit-error rate) with reduced decoding complexity. It can also be used as a component code in a multilevel bandwidth efficient coded modulation system to achieve reliable bandwidth efficient data transmission. This report will summarize the key progress we have made toward achieving our eventual goal of implementing a decoder system based upon this code. In the first phase of study, we investigated the complexities of various sectionalized trellis diagrams for the proposed (64, 40, 8) RNI subcode. We found a specific 8-trellis diagram for this code which requires the least decoding complexity with a high possibility of achieving a decoding speed of 600 M bits per second (Mbps). The combination of a large number of states and a hi ch data rate will be made possible due to the utilization of a high degree of parallelism throughout the architecture. This trellis diagram will be presented and briefly described. In the second phase of study which was carried out through the past year, we investigated circuit architectures to determine the feasibility of VLSI implementation of a high-speed Viterbi decoder based on this 8-section trellis diagram. We began to examine specific design and implementation approaches to implement a fully custom integrated circuit (IC) which will be a key building block for a decoder system implementation. The key results will be presented in this report. This report will be divided into three primary sections. First, we will briefly describe the system block diagram in which the proposed decoder is assumed to be operating and present some of the key architectural approaches being used to implement the system at high speed. Second, we will describe details of the 8-trellis diagram we found to best meet the trade-offs between chip and overall system complexity. The chosen approach implements the trellis for the (64, 40, 8) RM subcode with 32 independent sub-trellises. And third, we will describe results of our feasibility study on the implementation of such an IC chip in CMOS technology to implement one of these sub-trellises.

Lin, Shu↗

Circuit Design Approaches for Implementation of a Subtrellis IC for a Reed-Muller Subcode

In his research, we have proposed the (64, 40, 8) subcode of the third-order Reed-Muller (RM) code to NASA for high-speed satellite communications. This RM subcode can be used either alone or as an inner code of a concatenated coding system with the NASA standard (255, 233, 33) Reed-Solomon (RS) code as the outer code to achieve high performance (or low bit-error rate) with reduced decoding complexity. It can also be used as a component code in a multilevel bandwidth efficient coded modulation system to achieve reliable bandwidth efficient data transmission. This report will summarize the key progress we have made toward achieving our eventual goal of implementing a decoder system based upon this code. In the first phase of study, we investigated the complexities of various sectionalized trellis diagrams for the proposed (64, 40, 8) RM subcode. We found a specific 8-trellis diagram for this code which requires the least decoding complexity with a high possibility of achieving a decoding speed of 600 M bits per second(Mbps). The combination of a large number of states and a high data rate will be made possible due to the utilization of a high degree of parallelism throughout the architecture. This trellis diagram will be presented and briefly described. In the second phase of study which was carried out through the past year, we investigated circuit architectures to determine the feasibility of VLSI implementation of a high- speed Viterbi decoder based on this 8-section trellis diagram. We began to examine specific design and implementation approaches to implement a fully custom integrated circuit (IC) which will be a key building block for a decoder system implementation. The key results will be presented in this report. This report will be divided into three primary sections. First, we will briefly describe the system block diagram in which the proposed decoder is assumed to be operating and present some of the key architectural approaches being used to implement the system at high speed. Second, we will describe details of the 8-trellis diagram we found to best meet the trade-offs between chip and overall system complexity. The chosen approach implements the trellis for the (64, 40, 8) RM subcode with 32 independent sub-trellises. And third, we will describe results of our feasibility study on the implementation of such an IC chip in CMOS technology to implement one of these subtrellises.

Lin, Shu↗

A low cost igniter utilizing an SCB and titanium sub-hydride potassium perchlorate pyrotechnic

A conventional NSI (NASA Standard Initiator) normally employs a hot-wire ignition element to ignite ZPP (zirconium potassium perchlorate). With minor modifications to the interior of a header similar to an NSI device to accommodate an SCB (semiconductor bridge), a low cost initiator was obtained. In addition, the ZPP was replaced with THKP (titanium sub-hydride potassium perchlorate) to obtain increased overall gas production and reduced static-charge sensitivity. This paper reports on the all-fire and no-fire levels obtained and on a dual mix device that uses THKP as the igniter mix and a thermite as the output mix.

R. W. Bickes, Jr.↗

Choked flow effects in the NSI driven pin puller

This paper presents an analysis for pyrotechnic combustion and pin motion in the NASA Standard Initiator (NSI) actuated pin puller. The conservation principles and constitutive relations for a multi-phase system are posed and reduced to a set of eight ordinary differential equations which are solved to predict the system performance. The model tracks the interactions of the unreacted, incompressible solid pyrotechnic, incompressible condensed phase combustion products, and gas phase combustion products. The model accounts for multiple pyrotechnic grains, variable burn surface area, and combustion product mass flow rates through an orifice located within the device. Pressure-time predictions compare favorably with experimental data. Results showing model sensitivity to changes in the cross-sectional area of the orifice are presented.

Gonthier, Keith A.↗

Architecture and implementation considerations of a high-speed Viterbi decoder for a Reed-Muller subcode

The (64, 40, 8) subcode of the third-order Reed-Muller (RM) code for high-speed satellite communications is proposed. The RM subcode can be used either alone or as an inner code of a concatenated coding system with the NASA standard (255, 233, 33) Reed-Solomon (RS) code as the outer code to achieve high performance (or low bit-error rate) with reduced decoding complexity. It can also be used as a component code in a multilevel bandwidth efficient coded modulation system to achieve reliable bandwidth efficient data transmission. The progress made toward achieving the goal of implementing a decoder system based upon this code is summarized. The development of the integrated circuit prototype sub-trellis IC, particularly focusing on the design methodology, is addressed.

Lin, Shu↗

Meteoroid/orbital debris impact damage predictions for the Russian space station MIR

Components of the Mir space station have been exposed to the meteoroid/orbital debris (M/OD) environment for up to 11 years. During this period, no M/OD impact perforation of the pressure shell of the manned modules were reported. The NASA standard M/OD analysis code BUMPER was used to predict the probability of M/OD impact damage to various components of Mir. The analysis indicates a 1 in 2.2 chance that a M/OD impact would have caused a penetration resulting in a pressure leak of the Mir modules since its launch up to the February 1997. For the next five years, the estimated odds become 1 in 3. On an annual basis, penetration risks are 60 percent higher, on the average, in the next five years due to the larger size of Mir and the growth in the orbital debris population.

Christiansen, E. L.↗

Solving Problems With SINDA/FLUINT

SINDA/FLUINT, the NASA standard software system for thermohydraulic analysis, provides computational simulation of interacting thermal and fluid effects in designs modeled as heat transfer and fluid flow networks. The product saves time and money by making the user's design process faster and easier, and allowing the user to gain a better understanding of complex systems. The code is completely extensible, allowing the user to choose the features, accuracy and approximation levels, and outputs. Users can also add their own customizations as needed to handle unique design tasks or to automate repetitive tasks. Applications for SINDA/FLUINT include the pharmaceutical, petrochemical, biomedical, electronics, and energy industries. The system has been used to simulate nuclear reactors, windshield wipers, and human windpipes. In the automotive industry, it simulates the transient liquid/vapor flows within air conditioning systems.

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