Engineering Papers⌕ Search

SEARCH · Engineering Papers

Results for “DATA PROCESSOR”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 307 records · Page 17
All sourcesNASA NTRSDOE OSTI
NASA NTRS1990

A scheme for supporting automatic data migration on multicomputers

A data migration mechanism is proposed that allows an explicit and controlled mapping of data to memory. While read or write copies of each data element can be assigned to any processor's memory, longer term storage of each data element is assigned to a specific location in the memory of a particular processor. Data is presented that suggests that the scheme may be a practical method for efficiently supporting data migration.

Mirchandaney, Seema↗
NASA NTRS2008

Reusing Information Management Services for Recommended Decadal Study Missions to Facilitate Aerosol and Cloud Studies

NASA Earth Sciences Division (ESD) has made great investments in the development and maintenance of data management systems and information technologies, to maximize the use of NASA generated Earth science data. With information management system infrastructure in place, mature and operational, very small delta costs are required to fully support data archival, processing, and data support services required by the recommended Decadal Study missions. This presentation describes the services and capabilities of the Goddard Space Flight Center (GSFC) Earth Sciences Data and Information Services Center (GES DISC) and the reusability for these future missions. The GES DISC has developed a series of modular, reusable data management components currently in use. They include data archive and distribution (Simple, Scalable, Script-based, Science [S4] Product Archive aka S4PA), data processing (S4 Processor for Measurements aka S4PM), data search (Mirador), data browse, visualization, and analysis (Giovanni), and data mining services. Information management system components are based on atmospheric scientist inputs. Large development and maintenance cost savings can be realized through their reuse in future missions.

Kempler, Steve↗
NASA NTRS1999

Visualization Co-Processing of a CFD Simulation

OVERFLOW, a widely used CFD simulation code, is combined with a visualization system, pV3, to experiment with an environment for simulation/visualization co-processing on a SGI Origin 2000 computer(O2K) system. The shared memory version of the solver is used with the O2K 'pfa' preprocessor invoked to automatically discover parallelism in the source code. No other explicit parallelism is enabled. In order to study the scaling and performance of the visualization co-processing system, sample runs are made with different processor groups in the range of 1 to 254 processors. The data exchange between the visualization system and the simulation system is rapid enough for user interactivity when the problem size is small. This shared memory version of OVERFLOW, with minimal parallelization, does not scale well to an increasing number of available processors. The visualization task takes about 18 to 30% of the total processing time and does not appear to be a major contributor to the poor scaling. Improper load balancing and inter-processor communication overhead are contributors to this poor performance. Work is in progress which is aimed at obtaining improved parallel performance of the solver and removing the limitations of serial data transfer to pV3 by examining various parallelization/communication strategies, including the use of the explicit message passing.

Vaziri, Arsi↗
DOE OSTI2015

Smoke detection

Various apparatus and methods for smoke detection are disclosed. In one embodiment, a method of training a classifier for a smoke detector comprises inputting sensor data from a plurality of tests into a processor. The sensor data is processed to generate derived signal data corresponding to the test data for respective tests. The derived signal data is assigned into categories comprising at least one fire group and at least one non-fire group. Linear discriminant analysis (LDA) training is performed by the processor. The derived signal data and the assigned categories for the derived signal data are inputs to the LDA training. The output of the LDA training is stored in a computer readable medium, such as in a smoke detector that uses LDA to determine, based on the training, whether present conditions indicate the existence of a fire.

47 OTHER INSTRUMENTATION↗
DOE OSTI2016

Smoke detection

Various apparatus and methods for smoke detection are disclosed. In one embodiment, a method of training a classifier for a smoke detector comprises inputting sensor data from a plurality of tests into a processor. The sensor data is processed to generate derived signal data corresponding to the test data for respective tests. The derived signal data is assigned into categories comprising at least one fire group and at least one non-fire group. Linear discriminant analysis (LDA) training is performed by the processor. The derived signal data and the assigned categories for the derived signal data are inputs to the LDA training. The output of the LDA training is stored in a computer readable medium, such as in a smoke detector that uses LDA to determine, based on the training, whether present conditions indicate the existence of a fire.

47 OTHER INSTRUMENTATION↗
DOE OSTI2017

Smoke detection

Various apparatus and methods for smoke detection are disclosed. In one embodiment, a method of training a classifier for a smoke detector comprises inputting sensor data from a plurality of tests into a processor. The sensor data is processed to generate derived signal data corresponding to the test data for respective tests. The derived signal data is assigned into categories comprising at least one fire group and at least one non-fire group. Linear discriminant analysis (LDA) training is performed by the processor. The derived signal data and the assigned categories for the derived signal data are inputs to the LDA training. The output of the LDA training is stored in a computer readable medium, such as in a smoke detector that uses LDA to determine, based on the training, whether present conditions indicate the existence of a fire.

47 OTHER INSTRUMENTATION↗
NASA NTRS2015

Data Concentrator

Orbital Research, Inc., developed, built, and tested three high-temperature components for use in the design of a data concentrator module in distributed turbine engine control. The concentrator receives analog and digital signals related to turbine engine control and communicates with a full authority digital engine control (FADEC) or high-level command processor. This data concentrator follows the Distributed Engine Controls Working Group (DECWG) roadmap for turbine engine distributed controls communication development that operates at temperatures at least up to 225 C. In Phase I, Orbital Research developed detailed specifications for each component needed for the system and defined the total system specifications. This entailed a combination of system design, compiling existing component specifications, laboratory testing, and simulation. The results showed the feasibility of the data concentrator. Phase II of this project focused on three key objectives. The first objective was to update the data concentrator design modifications from DECWG and prime contractors. Secondly, the project defined requirements for the three new high-temperature, application-specific integrated circuits (ASICs): one-time programmable (OTP), transient voltage suppression (TVS), and 3.3V. Finally, the project validated each design by testing over temperature and under load.

Willett, Mike↗
NASA NTRS1990

Highly parallel sparse Cholesky factorization

Several fine grained parallel algorithms were developed and compared to compute the Cholesky factorization of a sparse matrix. The experimental implementations are on the Connection Machine, a distributed memory SIMD machine whose programming model conceptually supplies one processor per data element. In contrast to special purpose algorithms in which the matrix structure conforms to the connection structure of the machine, the focus is on matrices with arbitrary sparsity structure. The most promising algorithm is one whose inner loop performs several dense factorizations simultaneously on a 2-D grid of processors. Virtually any massively parallel dense factorization algorithm can be used as the key subroutine. The sparse code attains execution rates comparable to those of the dense subroutine. Although at present architectural limitations prevent the dense factorization from realizing its potential efficiency, it is concluded that a regular data parallel architecture can be used efficiently to solve arbitrarily structured sparse problems. A performance model is also presented and it is used to analyze the algorithms.

Gilbert, John R.↗
NASA NTRS1984

Nuclear Science Symposium, 30th, and Symposium on Nuclear Power Systems, 15th, San Francisco, CA, October 19-21, 1983, Proceedings

The range of disciplines covered includes physics instrumentation, data acquisition, FASTBUS, radiation detectors, scintillators, photomultipliers and optical detectors, subnanosecond 2-D imaging, medical and health instrumentation, reactor instrumentation, and space instrumentation. Cerenkov detectors, the prevention and rate capability of breakdown processes in wire chambers, and an interactive parallel processor for data analysis are studied. Attention is also given to bismuth germanate's role in gamma-ray spectroscopy, and the construction of a broadband universal sampling head is described. Gamma-ray imaging with a rotating hexagonal uniform redundant array, and broadband X-ray astronomical spectrometry are considered.

Nakamura, M.↗
NASA NTRS1990

Multi-terabyte image storage and distribution for NASA's Hubble Space Telescope

The modular architecture, functionality, and key components of the Hubble Space Telescope Data Archive Distribution Service (DADS) are presented. DADS functions comprise archive management, catalog management, and user interface. The distributed modular architecture utilized is made up of four subsystems, including the archive, host, catalog, and the Science Operations ground System/DADS Interface Processor. All data generated by the HST are archived in DADS on 12-in. optical disks. DADS is a permanent archive with a data capacity of 30 terabytes that can be expanded to 68 terabytes. Supplementary information and stellar observations will be instantly accessible through DADS, which can collect and archive more than 3 gigabytes per day of image and support data over the lifetime of the HST. Electronic and physical media will be accessible through 140 network connections, with a catalogue to assist in data set selection.

Weller, H. W., Jr.↗
NASA NTRS1994

A VLSI Processor Design of Real-Time Data Compression for High-Resolution Imaging Radar

For the high-resolution imaging radar systems, real-time data compression of raw imaging data is required to accomplish the science requirements and satisfy the given communication and storage constraints. The Block Adaptive Quantizer (BAQ) algorithm and its associated VLSI processor design have been developed to provide a real-time data compressor for high-resolution imaging radar systems.

data compression VLSI processor design imaging rad↗
NASA NTRS2009

TOGA - A GNSS Reflections Instrument for Remote Sensing Using Beamforming

Remotely sensing the Earth's surface using GNSS signals as bi-static radar sources is one of the most challenging applications for radiometric instrument design. As part of NASA's Instrument Incubator Program, our group at JPL has built a prototype instrument, TOGA (Time-shifted, Orthometric, GNSS Array), to address a variety of GNSS science needs. Observing GNSS reflections is major focus of the design/development effort. The TOGA design features a steerable beam antenna array which can form a high-gain antenna pattern in multiple directions simultaneously. Multiple FPGAs provide flexible digital signal processing logic to process both GPS and Galileo reflections. A Linux OS based science processor serves as experiment scheduler and data post-processor. This paper outlines the TOGA design approach as well as preliminary results of reflection data collected from test flights over the Pacific ocean. This reflections data demonstrates observation of the GPS L1/L2C/L5 signals.

GPS↗
NASA NTRS1987

Animated computer graphics models of space and earth sciences data generated via the massively parallel processor

The capability was developed of rapidly producing visual representations of large, complex, multi-dimensional space and earth sciences data sets via the implementation of computer graphics modeling techniques on the Massively Parallel Processor (MPP) by employing techniques recently developed for typically non-scientific applications. Such capabilities can provide a new and valuable tool for the understanding of complex scientific data, and a new application of parallel computing via the MPP. A prototype system with such capabilities was developed and integrated into the National Space Science Data Center's (NSSDC) Pilot Climate Data System (PCDS) data-independent environment for computer graphics data display to provide easy access to users. While developing these capabilities, several problems had to be solved independently of the actual use of the MPP, all of which are outlined.

Treinish, Lloyd A.↗
NASA NTRS1984

Goldstone R/D High Speed Data Acquisition System

A digital data acquisition system that meets the requirements of several users (initially the planetary radar program) is planned for general use at Deep Space Station 14 (DSS 14). The system, now partially complete, is controlled by VAX 11/780 computer that is programmed in high level languages. A DEC Data Controller is included for moderate-speed data acquisition, low speed data display, and for a digital interface to special user-provided devices. The high-speed data acquisition is performed in devices that are being designed and built at JPL. Analog IF signals are converted to a digitized 50 MHz real signal. This signal is filtered and mixed digitally to baseband after which its phase code (a PN sequence in the case of planetary radar) is removed. It may then be accumulated (or averaged) and fed into the VAX through an FPS 5210 array processor. Further data processing before entering the VAX is thus possible (computation and accumulation of the power spectra, for example). The system is to be located in the research and development pedestal at DSS 14 for easy access by researchers in radio astronomy as well as telemetry processing and antenna arraying.

Deutsch, L. J.↗
NASA NTRS1991

Compiling global name-space parallel loops for distributed execution

Distributed memory machines do not provide hardware support for a global address space. Thus programmers are forced to partition the data across the memories of the architecture and use explicit message passing to communicate data between processors. The compiler support required to allow programmers to express their algorithms using a global name-space is examined. A general method is presented for analysis of a high level source program and its translation into a set of independently executing tasks communicating via messages. If the compiler has enough information, this translation can be carried out at compile time. Otherwise, run-time code is generated to implement the required data movement. The analysis required in both situations is described and the performance of the generated code on the Intel iPSC/2 is presented.

Koelbel, Charles↗
NASA NTRS1990

Compiling global name-space programs for distributed execution

Distributed memory machines do not provide hardware support for a global address space. Thus programmers are forced to partition the data across the memories of the architecture and use explicit message passing to communicate data between processors. The compiler support required to allow programmers to express their algorithms using a global name-space is examined. A general method is presented for analysis of a high level source program and along with its translation to a set of independently executing tasks communicating via messages. If the compiler has enough information, this translation can be carried out at compile-time. Otherwise run-time code is generated to implement the required data movement. The analysis required in both situations is described and the performance of the generated code on the Intel iPSC/2 is presented.

Koelbel, Charles↗
DOE OSTI2022

Virtual Neuron: A Neuromorphic Approach for Encoding Numbers

Neuromorphic computers perform computations by emulating the human brain and are expected to be indispensable for energy-efficient computing in the future. They are primarily used in spiking neural network-based machine learning applications. However, neuromorphic computers are unable to preprocess data for these applications. Currently, data is preprocessed on a CPU or a GPU-this incurs a significant cost of transferring data from the CPU/GPU to the neuromorphic processor and vice versa. This cost can be avoided if preprocessing is done on the neuromorphic processor. To efficiently preprocess data on a neuromorphic processor, we first need an efficient mechanism for encoding data that can lend itself to all general-purpose preprocessing operations. Current encoding approaches have limited applicability and may not be suitable for all preprocessing operations. In this paper, we present the virtual neuron as a mechanism for encoding integers and rational numbers on neuromorphic processors. We evaluate the performance of the virtual neuron on physical and simulated neuromorphic hardware and show that it can perform an addition operation using 23 nJ of energy on average using a mixed-signal, memristor-based neuromorphic processor. The virtual neuron encoding approach is the first step in preprocessing data on a neuromorphic processor.

Date, Prasanna↗