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300 records · Page 17

Towards On-Chip Learning for Low Latency Reasoning with End-to-End Synthesis

The Software Defined Architectures (SODA) Synthesizer is an open-source compiler-based tool able to automatically generate domain-specialized systems targeting Application-Specific Integrated Circuits (ASICs) or Field Programmable Gate Arrays (FPGAs) starting from high-level programming. SODA is composed of a frontend, SODA-OPT, which leverages the multilevel intermediate representation (MLIR) framework to interface with productive programming tools (e.g., machine learning frame-works), identify kernels suitable for acceleration, and perform high-level optimizations, and of a state-of-the-art high-level synthesis backend, Bambu from the PandA framework, to generate custom accelerators. One specific application of the SODA Synthesizer is the generation of accelerators to enable ultra-low latency inference and control on autonomous systems for scientific discovery (e.g., electron microscopes, sensors in particle accelerators, etc.). This paper provides an overview of the flow in the context of the generation of accelerators for edge processing to be integrated in transmission electron microscopy (TEM) devices, focusing on use cases from precision material synthesis. We show the tool in action with an example of design space exploration for inference on reconfigurable devices with a conventional deep neural network model (LeNet). Finally, we discuss the research directions and opportunities enabled by SODA in the area of autonomous control for scientific experimental workflows.

Castellana, Vito G.↗

NASA Tech Briefs, December 2003

Topics covered include: Organic/Inorganic Hybrid Polymer/Clay Nanocomposites; Less-Toxic Coatings for Inhibiting Corrosion of Aluminum; Liquid Coatings for Reducing Corrosion of Steel in Concrete; Processable Polyimides Containing APB and Reactive End Caps; Rod/Coil Block Copolyimides for Ion-Conducting Membranes; Techniques for Characterizing Microwave Printed Antennas; Cylindrical Antenna With Partly Adaptive Phased-Array Feed; Command Interface ASIC - Analog Interface ASIC Chip Set; Predicting Accumulations of Ice on Aerodynamic Surfaces; Analyzing Aeroelasticity in Turbomachines; Software for Allocating Resources in the Deep Space Network; Expert Seeker; High-Speed Recording of Test Data on Hard Disks; Functionally Graded Nanophase Beryllium/Carbon Composites; Thin Thermal-Insulation Blankets for Very High Temperatures; Aerostructures Test Wing; Flight-Test Evaluation of Flutter-Prediction Methods; Piezoelectrically Actuated Microvalve for Liquid Effluents; Larger-Stroke Piezoelectrically Actuated Microvalve; Innovative, High-Pressure, Cryogenic Control Valve: Short Face-to-Face, Reduced Cost; Safer Roadside Crash Walls Would Limit Deceleration; Improved Interactive Medical-Imaging System; Scanning Microscopes Using X Rays and Microchannels; Slotting Fins of Heat Exchangers to Provide Thermal Breaks; Methane Clathrate Hydrate Prospecting; Automated Monitoring with a BSP Fault-Detection Test; Automated Monitoring with a BCP Fault-Decision Test; Vector-Ordering Filter Procedure for Data Reduction; Remote Sensing and Information Technology for Large Farms; Developments at the Advanced Design Technologies Testbed; Spore-Forming Bacteria that Resist Sterilization; and Acoustical Applications of the HHT Method.

Source record↗

Pressure-Sensor Assembly Technique

Nielsen Engineering & Research (NEAR) recently developed an ultrathin data acquisition system for use in turbomachinery testing at NASA Glenn Research Center. This system integrates a microelectromechanical- systems- (MEMS-) based absolute pressure sensor [0 to 50 psia (0 to 345 kPa)], temperature sensor, signal-conditioning application-specific integrated circuit (ASIC), microprocessor, and digital memory into a package which is roughly 2.8 in. (7.1 cm) long by 0.75 in. (1.9 cm) wide. Each of these components is flip-chip attached to a thin, flexible circuit board and subsequently ground and polished to achieve a total system thickness of 0.006 in. (0.15 mm). Because this instrument is so thin, it can be quickly adhered to any surface of interest where data can be collected without disrupting the flow being investigated. One issue in the development of the ultrathin data acquisition system was how to attach the MEMS pressure sensor to the circuit board in a manner which allowed the sensor s diaphragm to communicate with the ambient fluid while providing enough support for the chip to survive the grinding and polishing operations. The technique, developed by NEAR and Jabil Technology Services Group (San Jose, CA), is described below. In the approach developed, the sensor is attached to the specially designed circuit board, see Figure 1, using a modified flip-chip technique. The circular diaphragm on the left side of the sensor is used to actively measure the ambient pressure, while the diaphragm on the right is used to compensate for changes in output due to temperature variations. The circuit board is fabricated with an access hole through it so that when the completed system is installed onto a wind tunnel model (chip side down), the active diaphragm is exposed to the environment. After the sensor is flip-chip attached to the circuit board, the die is underfilled to support the chip during the subsequent grinding and polishing operations. To prevent this underfill material from getting onto the sensor s diaphragms, the circuit board is fabricated with two 25- micrometer-tall polymer rings, sized so that the diaphragms fit inside the rings once the chip is attached.

Pruzan, Daniel A.↗

Digital control of magnetic bearings in a cryogenic cooler

This paper describes the design of a digital control system for control of magnetic bearings used in a spaceborne cryogenic cooler. The cooler was developed by Philips Laboratories for the NASA Goddard Space Flight Center. Six magnetic bearing assemblies are used to levitate the piston, displacer, and counter-balance of the cooler. The piston and displacer are driven by linear motors in accordance with Stirling cycle thermodynamic principles to produce the desired cooling effect. The counter-balance is driven by a third linear motor to cancel motion induced forces that would otherwise be transmitted to the spacecraft. An analog control system is currently used for bearing control. The purpose of this project is to investigate the possibilities for improved performance using digital control. Areas for potential improvement include transient and steady state control characteristics, robustness, reliability, adaptability, alternate control modes, size, weight, and cost. The present control system is targeted for the Intel 80196 microcontroller family. The eventual introduction of application specific integrated circuit (ASIC) technology to this problem may produce a unique and elegant solution both here and in related industrial problems.

Feeley, J.↗

Robustness of the smartpixels classifier for different simulated sensor geometries and non-ideal detector conditions

Pixel tracking detectors at upcoming collider experiments will see unprecedented charged-particle densities. Real-time data reduction on the detector will enable higher granularity and faster readout, possibly enabling the use of the pixel detector in high-rate online event selection, such as the ATLAS or CMS first-level trigger systems. This data reduction can be accomplished with a neural network (NN) in the readout chip bonded with the sensor that recognizes and rejects tracks with low transverse momentum (p T ) based on the geometrical shape of the charge deposition (“cluster”). To design viable detectors for deployment, the dependence of the NN as a function of the sensor geometry, external magnetic field, irradiation, and noise must be understood. In this paper, we present first studies of the efficiency and data reduction for planar pixel sensors exploring these parameters. For the CMS HL-LHC sensor geometry, we obtain a signal efficiency of (91.9 ± 0.7)% and a data reduction of (29.7 ± 1.0)%. A smaller sensor pitch in the bending direction improves the p T discrimination, but a larger pitch can be partially compensated with detector thickness. Any accumulated radiation damage also changes the cluster shape, reducing the signal efficiency compared to the baseline by approximately 30–60% in absolute terms, but nearly all of the performance can be recovered through retraining of the network and updating the weights. Finally, the impact of noise was investigated, and retraining the network on noise-injected datasets was found to maintain performance within 6% of the baseline network trained and evaluated on noiseless data. •ASIC-compatible track-momentum classifier is robust in realistic detector conditions.•About 90% signal efficiency and 30% data reduction per layer for CMS HL-LHC geometry.•Single-layer signal efficiency increases for smaller pixel pitch or thicker sensors.•Performance with noise or after radiation damage mostly recovered by retraining.

Shekar, Danush [Illinois U., Chicago] (ORCID:00000↗

X-Ray Detector Research at MSFC for Space Applications

NASA's Vision for Space Exploration has specific goals aimed at exploring the Solar System. This vision, under presidential mandate includes landing humans on the moon before the end of the next decade, paving the way for eventual journeys to Mars and beyond. The first missions to the moon will be in the form of both Orbiters and Landers, with the goal of paving the way for human return. One of the instruments we are currently working on,in collaboration with Brookhaven National Laboratory, is a lunar orbiter fluorescent x-ray spectrometer to finely map the light elements (down to Carbon) on surface of the moon. Funded NASA s Planetary Instrument Definition and Development Program the instrument is based on silicon drift detector arrays read out by custom ASICs. These offer the promise of high spectral resolution, necessary for resolving weak lines against a strong background continuum, and very low power requirements, necessary for large areas (greater than 500 square centimeters) required for future lunar missions. Further, the inherent radiation hardness of these detectors makes them ideal candidates for exploring the Jovian system, where the harsh radiation environment from Jupiter s radiation belts creates unfavorable detector conditions. Looking beyond our solar system, in the hard x-ray regime (20-80keV.), we are studying Cadmium-Zinc-Telluride pixilated detectors as feasible candidates for focal plane detectors of a hard x-ray telescope. This energy region bridges the gap between thermal and non-thermal x-ray emission from astronomical sources, will allow us to better understand supernovae nucleosynthesis (such as through the Ti-44 lines at 68keV and 78keV), Active Galactic Nuclei and other compact objects, more completely. The detectors that we are characterizing are 2mm in thickness and are pixilated with a 16x16 array of 300 micrometer pitch pixels (50micometer gap). These detectors are designed at Rutherford Appleton Laboratory, material is from eV Products, and polymer flip-chip assembly was performed by a commercial vendor. An energy resolution of 2.0% at 60keV (or better) should allow us to sufficiently distinguish lines of interest from background continuum, and the detector spatial resolution should be fine enough to over-sample the focal spot from the x-ray focusing optics by about a factor of two. Full technical details of these developments will be presented.

Gaskin, Jessica↗

Heterogeneous Integration, An Approach to High Density and High Flexibility Electronic Packaging

Key to the design of spacecraft for exploration of the outer planets will be the development of highly integrated and mass/volume efficient electronic systems. Exploration of the outer planets will require optimized propulsion approaches which mandates mass minimization. If one looks at a mission such as the Europa Lander, a high mass/volume efficiency feeds back directly into lower mass for radiation shielding. Concurrently the long mission lengths will drive the need for fault isolation and fault tolerance. The ability to build distributed electronic systems is an inherent requirement and one which is enabled by heterogeneous integration. The electronic packaging approach must be capable of interconnecting various components at a scale comparable with that on the components themselves (chip scale) and it must facilitate efficient integration of the electronics with elements of the spacecraft such as structure or antennae. The concept of 'Heterogeneous Integration' is being explored in the System On A Chip (SOAC) Project at JPL. The goal, of this approach to electronic packaging, is to enable the fabrication and assembly of complete electronic subsystems from components fabricated by a range of processes. Included in such a system could be MEMS sensors, SOI mixed signal ASICs, micro scale passive components and micro power. Secondarily the compact size will enable distributed architectures and integrated assemblies. Additional information is contained in the original extended abstract.

DAgostino, S. A.↗

An Integrated MEMS Sensor Cluster System for Aerospace Applications

Efforts to reduce viscous drag on airfoils could results in a considerable saving for the operation of flight vehicles including those of space transportation. This reduction of viscous drag effort requires measurement and active control of boundary layer flow property on an airfoil. Measurement of viscous drag of the boundary layer flow over an airfoil with minimal flow disturbance is achievable with newly developed MEMS sensor clusters. These sensor clusters provide information that can be used to actively control actuators to obtain desired flow properties or design a vehicle to satisfy particular boundary layer flow criteria. A series of MEMS sensor clusters has been developed with a data acquisition and control module for local measurements of shear stress, pressure, and temperature on an airfoil. The sensor cluster consists of two shear stress sensors, two pressure sensors, and two temperature sensors on a surface area of 1.24 mm x 1.86 mm. Each sensor is 300 microns square and is placed on a flexible polyimide sheet. The shear stress sensor is a polysilicon hot-film resistor, which is insulated by a vacuum cavity of 200 x 200 x 2 microns. The pressure sensors are silicon piezoresistive type, and the temperature sensors are also hot film polysilicon resistors. The total size of the cluster including sensors and electrical leads is 1 Omm x 1 Omm x 0.1 mm. A typical sensitivity of shear stress sensor is 150 mV/Pascal, the pressure sensors are an absolute type with a measurement range from 9 to 36 psia with 0.8mV/V/psi sensitivity, and the temperature sensors have a measurement resolution of 0.1 degree C. The sensor clusters are interfaced to a data acquisition and control module that consists of two custom ASICs (Application Specific Integrated Circuits) and a micro-controller. The data acquisition and control module transfers data to a host PC that configures and controls a total of three sensor clusters. Functionality of the entire system has been tested in the laboratory, and preliminary test results are presented.

Kahng, Seun↗

BAE Systems Radiation Hardened SpaceWire ASIC and Roadmap

An Application Specific Integrated Circuit (ASIC) that implements the SpaceWire protocol has been developed in a radiation hardened 0.25 micron CMOS, technology. This effort began in March 2003 as a joint development between the NASA Goddard Space Flight Center (GSFC) and BAE Systems. The BAE Systems SpaceWire ASlC is comprised entirely of reusable core elements, many of which are already flight-proven. It incorporates a 4-port SpaceWire router with two local ports, dual PC1 bus interfaces, a microcontroller, 32KB of internal memory, -and a memory controller for additional external memory use. The SpaceWire ASlC is planned for use on both the Geostationary Operational Environmental Satellites (GOES)-R and the Lunar Reconnaissance Orbiter (LRO). Engineering parts have already been delivered to both programs. This paper discusses the SpaceWire protocol and those elements of it that have been built into the current SpaceWire reusable core. There are features within the core that go beyond the current standard that can be enabled or disabled by the user and these will be described. The adaptation of SpaceWire to BAE Systems' On Chip Bus (OCB) for compatibility with the other reusable cores will be discussed. Optional configurations within user systems will be shown. The physical imp!ementation of the design will be described and test results from the hardware will be discussed. Finally, the BAE Systems roadmap for SpaceWire developments will be discussed, including some products already in design as well as longer term plans.

Berger, Richard↗

Radiation-Hard SpaceWire/Gigabit Ethernet-Compatible Transponder

A radiation-hard transponder was developed utilizing submicron/nanotechnology from IBM. The device consumes low power and has a low fabrication cost. This device utilizes a Plug-and-Play concept, and can be integrated into intra-satellite networks, supporting SpaceWire and Gigabit Ethernet I/O. A space-qualified, 100-pin package also was developed, allowing space-qualified (class K) transponders to be delivered within a six-month time frame. The novel, optical, radiation-tolerant transponder was implemented as a standalone board, containing the transponder ASIC (application specific integrated circuit) and optical module, with an FPGA (field-programmable gate array) friendly parallel interface. It features improved radiation tolerance; high-data-rate, low-power consumption; and advanced functionality. The transponder utilizes a patented current mode logic library of radiation-hardened-by-architecture cells. The transponder was developed, fabricated, and radhard tested up to 1 MRad. It was fabricated using 90-nm CMOS (complementary metal oxide semiconductor) 9 SF process from IBM, and incorporates full BIT circuitry, allowing a loop back test. The low-speed parallel LVCMOS (lowvoltage complementary metal oxide semiconductor) bus is compatible with Actel FPGA. The output LVDS (low-voltage differential signaling) interface operates up to 1.5 Gb/s. Built-in CDR (clock-data recovery) circuitry provides robust synchronization and incorporates two alarm signals such as synch loss and signal loss. The ultra-linear peak detector scheme allows on-line control of the amplitude of the input signal. Power consumption is less than 300 mW. The developed transponder with a 1.25 Gb/s serial data rate incorporates a 10-to-1 serializer with an internal clock multiplication unit and a 10-1 deserializer with internal clock and data recovery block, which can operate with 8B10B encoded signals. Three loop-back test modes are provided to facilitate the built-in-test functionality. The design is based on a proprietary library of differential current switching logic cells implemented in the standard 90-nm CMOS 9SF technology from IBM. The proprietary low-power LVDS physical interface is fully compatible with the SpaceWire standard, and can be directly connected to the SFP MSA (small form factor pluggable Multiple Source Agreement) optical transponder. The low-speed parallel interfaces are fully compatible with the standard 1.8 V CMOS input/output devices. The utilized proprietary annular CMOS layout structures provide TID tolerance above 1.2 MRad. The complete chip consumes less than 150 mW of power from a single 1.8-V positive supply source.

Katzman, Vladimir↗

Multi-element germanium detectors for synchrotron applications

In this paper, we have developed a series of monolithic multi-element germanium detectors, based on sensor arrays produced by the Forschungzentrum Julich, and on Application-specific integrated circuits (ASICs) developed at Brookhaven. Devices have been made with element counts ranging from 64 to 384. These detectors are being used at NSLS-II and APS for a range of diffraction experiments, both monochromatic and energy-dispersive. Compact and powerful readout systems have been developed, based on the new generation of FPGA system-on-chip devices, which provide closely coupled multi-core processors embedded in large gate arrays. Finally, we will discuss the technical details of the systems, and present some of the results from them.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

A virtual Frisch-grid geometry-based CZT gamma detector for in-field radioisotope identification

Here, we present a Virtual Frisch-Grid geometry-based CZT gamma detector developed for identifying different radioisotopes over an energy range from a few keV up to 2 MeV, and useful for efficient characterization of CZT crystals. The detector is built with a 3 x 3 matrix of CZT crystals, each measuring approximately 6 mm x 6 mm x 15 mm. The charge generated within the sensor’s active volume is read out via an anode connected directly to the AVG3_Dev integrated circuit. A current signal induced by charge drift is collected on side pads of the crystals, enabling reconstruction of a 3D interaction position. This paper discusses the design, development, and performance of the standalone, mobile detector system, which integrates the AVG3_Dev readout IC developed at Brookhaven National Laboratory, a high-speed FPGA-based with per-channel digital signal processing, and embedded system capabilities. The device is compact, battery-powered, and supports wireless data streaming, making it suitable for field operations for radioisotope identification.

47 OTHER INSTRUMENTATION↗