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At least 289 records · Page 16

All sources NASA NTRS DOE OSTI

NASA NTRS2012

Forced ion migration for chalcogenide phase change memory device

Non-volatile memory devices with two stacked layers of chalcogenide materials comprising the active memory device have been investigated for their potential as phase-change memories. The devices tested included GeTe/SnTe, Ge.sub.2Se.sub.3/SnTe, and Ge.sub.2Se.sub.3/SnSe stacks. All devices exhibited resistance switching behavior. The polarity of the applied voltage with respect to the SnTe or SnSe layer was critical to the memory switching properties, due to the electric field induced movement of either Sn or Te into the Ge-chalcogenide layer. One embodiment of the invention is a device comprising a stack of chalcogenide-containing layers which exhibit phase-change switching only after a reverse polarity voltage potential is applied across the stack causing ion movement into an adjacent layer and thus "activating" the device to act as a phase-change random access memory device or a reconfigurable electronics device when the applied voltage potential is returned to the normal polarity. Another embodiment of the invention is a device that is capable of exhibiting more than two data states.

Campbell, Kristy A.↗

NASA NTRS2013

FPGA Flash Memory High Speed Data Acquisition

The purpose of this research is to design and implement a VHDL ONFI Controller module for a Modular Instrumentation System. The goal of the Modular Instrumentation System will be to have a low power device that will store data and send the data at a low speed to a processor. The benefit of such a system will give an advantage over other purchased binary IP due to the capability of allowing NASA to re-use and modify the memory controller module. To accomplish the performance criteria of a low power system, an in house auxiliary board (Flash/ADC board), FPGA development kit, debug board, and modular instrumentation board will be jointly used for the data acquisition. The Flash/ADC board contains four, 1 MSPS, input channel signals and an Open NAND Flash memory module with an analog to digital converter. The ADC, data bits, and control line signals from the board are sent to an Microsemi/Actel FPGA development kit for VHDL programming of the flash memory WRITE, READ, READ STATUS, ERASE, and RESET operation waveforms using Libero software. The debug board will be used for verification of the analog input signal and be able to communicate via serial interface with the module instrumentation. The scope of the new controller module was to find and develop an ONFI controller with the debug board layout designed and completed for manufacture. Successful flash memory operation waveform test routines were completed, simulated, and tested to work on the FPGA board. Through connection of the Flash/ADC board with the FPGA, it was found that the device specifications were not being meet with Vdd reaching half of its voltage. Further testing showed that it was the manufactured Flash/ADC board that contained a misalignment with the ONFI memory module traces. The errors proved to be too great to fix in the time limit set for the project.

Gonzalez, April↗

NASA NTRS2013

Forced Ion Migration for Chalcogenide Phase Change Memory Device

Non-volatile memory devices with two stacked layers of chalcogenide materials comprising the active memory device have been investigated for their potential as phase-change memories. The devices tested included GeTe/SnTe, Ge2Se3/SnTe, and Ge2Se3/SnSe stacks. All devices exhibited resistance switching behavior. The polarity of the applied voltage with respect to the SnTe or SnSe layer was critical to the memory switching properties, due to the electric field induced movement of either Sn or Te into the Ge-chalcogenide layer. One embodiment of the invention is a device comprising a stack of chalcogenide-containing layers which exhibit phase-change switching only after a reverse polarity voltage potential is applied across the stack causing ion movement into an adjacent layer and thus "activating" the device to act as a phase-change random access memory device or a reconfigurable electronics device when the applied voltage potential is returned to the normal polarity. Another embodiment of the invention is a device that is capable of exhibiting more than two data states.

Campbell, Kristy A↗

NASA NTRS2017

Options for Radiation Tolerant High-Performance Memory

Memory technologies were reviewed for radiation effects performance in order to determine the most cost-efficient target for a possible memory investment targeted at creating a memory component of general applicability for space use. TID and SEL trends that had indicated improvement in intrinsic performance based on scaling cannot be trusted. SEE hardening of memory arrays is prohibitive in terms of cell-level power and area requirements. Radiation-hardened cells and custom controllers are recommended for future memory developments.

Some, Raphael↗

NASA NTRSDate not supplied

Auxetic Thermo-Responsive Shape-Memory Polyurethane Aerogels

Shape memory polymer aerogels are stimuli-responsive aerogel materials that incorporate polymer aerogel characteristics such as flexibility at low density, and high porosity with shape-changing capabilities upon exposure to external stimuli. By designing the structure of these materials at meso- to macroscale, their shape memory response can be efficiently engineered to show an auxetic response such as a negative Poisson’s ratio, leading to an active and tunable metamaterial. We present a material technology based on a shape memory polyurethane aerogel derived from aliphatic triisocyanate and triethylene glycol, which demonstrates and remembers an auxetic shape change through a thermomechanical cycle first below, and then back again above the glass transition temperature of the polyurethane. Our auxetic shape memory polyurethane aerogels exhibit a significant auxetic response with a negative Poisson’s ratio of approximately -0.8 at 15% compressive strain. This technology is expected to impact multiple areas of interest in relation to commercial, aeronautic, and aerospace industries. Potential applications include minimally invasive medical technologies, soft robotics, and self-deployable structures and habitats. Structure-property relationships of the auxetic shape memory polymer aerogels will be discussed.

Sadeq Malakooti↗

DOE OSTI2020

System and method for protecting GPU memory instructions against faults

A system and method for protecting memory instructions against faults are described. The system and method include converting the slave instructions to dummy operations, modifying memory arbiter to issue up to N master and N slave global/shared memory instructions per cycle, sending master memory requests to memory system, using slave requests for error checking, entering master requests to the GM/LM FIFO, storing slave requests in a register, and comparing the entered master requests with the stored slave requests.

Kalamatianos, John↗

DOE OSTI2021

Malicious activity detection in a memory

A method and apparatus for monitoring a volatile memory in a computer system. Samples of compressed data from locations in the volatile memory in the computer system are read. Data in the volatile memory is reconstructed using the samples of compressed data. The data is an image of the volatile memory. The image enables determining whether an undesired process is present in the volatile memory.

Wheeler, Jason W.↗

DOE OSTI2021

Network resiliency through memory health monitoring and proactive management

A method for managing a network queue memory includes receiving sensor information about the network queue memory, predicting a memory failure in the network queue memory based on the sensor information, and outputting a notification through a plurality of nodes forming a network and using the network queue memory, the notification configuring communications between the nodes.

Andrade Costa, Carlos H.↗

DOE OSTI2021

Quality of service for input/output memory management unit

A data processing system includes a memory, a group of input/output (I/O) devices, an input/output memory management unit (IOMMU). The IOMMU is connected to the memory and adapted to allocate a hardware resource from among a group of hardware resources to receive an address translation request for a memory access from an I/O device. The IOMMU detects address translation requests from the plurality of I/O devices. The IOMMU reorders the address translation requests such that an order of dispatching an address translation request is based on a policy associated with the I/O device that is requesting the memory access. The IOMMU selectively allocates a hardware resource to the input/output device, based on the policy that is associated with the I/O device in response to the reordering.

Basu, Arkaprava↗

DOE OSTI2023

Apparatus and methods for managing packet transfer across a memory fabric physical layer interface

An apparatus and method for managing packet transfer between a memory fabric having a physical layer interface higher data rate than a data rate of a physical layer interface of another device, receives incoming packets from the memory fabric physical layer interface wherein at least some of the packets include different instruction types. The apparatus and method determine a packet type of the incoming packet received from the memory fabric physical layer interface and when the determined incoming packet type is of a type containing an atomic request, the method and apparatus prioritizes transfer of the incoming packet with the atomic request over other packet types of incoming packets, to memory access logic that accesses local memory within an apparatus.

Blagodurov, Sergey↗

DOE OSTI2023

System and method for protecting GPU memory instructions against faults

Kalamatianos, John↗

DOE OSTI2024

Zoned namespaces for computing device main memory

Disclosed in some examples are methods, systems, memory devices, memory controllers, and machine-readable mediums which provide for reserving physical memory device resources to specific execution units. Execution units may include processes, threads, virtual machines, functions, procedures, or the like. Physical memory device resources may include channels, modules, ranks, banks, bank groups, and the like. For example, a physical memory device resource that is reservable may be a smallest unit that allows for parallel access with another of the same size unit.

Sheridan, Patrick Michael↗

DOE OSTI2025

A Synthesis Methodology for Intelligent Memory Interfaces in Accelerator Systems

Domain-specific systems improve the performance of a specific set of applications compared to general-purpose processing systems by deploying custom hardware accelerators. These hardware accelerators are generated using high-level synthesis (HLS) tools. The HLS tools enable a comprehensive design space exploration to optimize the compute performance of the generated accelerators. However, they often ignore the challenges of implementing the accelerators in a system-on-chip, particularly how the accelerators access memory. Our work introduces a buffering system design that improves accelerators' memory accesses by intelligently employing burst transactions to prefetch useful data from external memory to on-chip local buffers. Our design is dynamic, parametric, and transparent to the accelerators generated by HLS tools. We derive the buffering system parameters using appropriate compiler-based analysis passes and memory channel latency constraints. The proposed buffering system design results in, on average, 8.8x performance improvements while lowering memory channel utilization on average by 53.2% for a set of PolyBench kernels.

Limaye, Ankur M. (ORCID:0000000194062584)↗

DOE OSTI2021

Particle track classification using quantum associative memory

Pattern recognition algorithms are commonly employed to simplify the challenging and necessary step of track reconstruction in sub-atomic physics experiments. Aiding in the discrimination of relevant interactions, pattern recognition seeks to accelerate track reconstruction by isolating signals of interest. In high collision rate experiments, such algorithms can be particularly crucial for determining whether to retain or discard information from a given interaction even before the data is transferred to tape. As data rates, detector resolution, noise, and inefficiencies increase, pattern recognition becomes more computationally challenging, motivating the development of higher efficiency algorithms and techniques. Quantum associative memory is an approach that seeks to exploits quantum mechanical phenomena to gain advantage in learning capacity, or the number of patterns that can be stored and accurately recalled. Here, we study quantum associative memory based on quantum annealing and apply it to the particle track classification. We focus on discrimination models based on Ising formulations of quantum associative memory model (QAMM) recall and quantum content-addressable memory (QCAM) recall. We characterize classification performance of these approaches as a function detector resolution, pattern library size, and detector inefficiencies, using the D-Wave 2000Q processor as a testbed. Discrimination criteria is set using both solution-state energy and classification labels embedded in solution states. We find that energy-based QAMM classification performs well in regimes of small pattern density and low detector inefficiency. In contrast, state-based QCAM achieves reasonably high accuracy recall for large pattern density and the greatest recall accuracy robustness to a variety of detector noise sources.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

DOE OSTI2021

Symmetry-protected self-correcting quantum memory in three space dimensions

Whether self-correcting quantum memories can exist at nonzero temperature in a physically reasonable setting remains a great open problem. Furthermore, it has recently been argued that symmetry-protected topological (SPT) systems in three space dimensions subject to a strong constraint—that the quantum dynamics respect a 1-form symmetry—realize such a quantum memory. We illustrate how this works in Walker-Wang codes, which provide a specific realization of these desiderata. In this setting we show that it is sufficient for the 1-form symmetry to be enforced on a subvolume of the system. This strongly suggests that the SPT character of the state is not essential. We confirm this by constructing an explicit example with a trivial (paramagnetic) bulk that realizes a self-correcting quantum memory. We therefore show that the enforcement of a 1-form symmetry on a measure-zero subvolume of a three-dimensional system can be sufficient to stabilize a self-correcting quantum memory at nonzero temperature.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

DOE OSTI2024

The melt memory effects in polymer crystallization

This paper presents a systematic review of the literature on the melt memory effects observed in polymers, an area that has engendered considerable debate for over 50 years. Recent advances in experimental techniques have provided fresh insights into how a polymer's thermal history influences its recrystallization behavior. It has been observed that given other conditions unchanged, the crystallization temperature during recrystallization decreases with an increase in the melt temperature T s above the melting point T m until a critical melt temperature is attained. This phenomenon also extends to the half-time of crystallization and the secondary structures, such as lamellar thickness, of semi-crystalline polymers. Despite these findings, a comprehensive constitutive model that encapsulates polymer melt memory effects remains elusive. Cutting-edge instrumentation, including in situ small and wide-angle X-ray scattering, temperature-controlled Fourier transform infrared spectroscopy, and flash differential scanning calorimetry, have posed significant challenges to the traditional nucleation and growth models established in the 1970s. These models are foundational to our understanding of polymer crystallization, which is an integral part of polymer processing and production. In this review, the historical contours of this discourse are traced, with an examination of both the recent experimental breakthroughs and theoretical advancements pertinent to polymer melt memory effects. In conclusion, this paper delves into the prevailing theories of polymer nucleation and crystallization and engages with theoretical discussions and numerical simulations that attempt to elucidate and rationalize these melt memory phenomena.

36 MATERIALS SCIENCE↗

DOE OSTI2022

Two-step annealing induced structural rejuvenation: A cause for memory effect in metallic glasses

The structural origin of the memory effect is still elusive in glassy materials. Here, in this letter, the memory effect in a series of metallic glasses (MGs) is observed by two step annealing using differential scanning calorimetry (DSC) and molecular dynamics simulations. It demonstrates that the Kovacs peak can be reflected from not only the system potential energy but also the atomic dynamics, showing the memory effect could originate from the formation of more loose packing configurations around mobile atoms by structural rejuvenation in the second step of high temperature annealing. In contrast, the high-low temperature annealing protocol can only induce the monotonic relaxation. Therefore, our results pave a pathway to better understand the origin of memory effect in MGs and other glassy materials from their dynamics and local atomic structure.

Memory effect↗

DOE OSTI2025

Advances in relaxation and memory effects of magnetic nanoparticles for biomedical applications

Functionalized magnetic nanoparticles are pivotal in magnetic resonance imaging, computed tomography, controlled drug delivery, and hyperthermia treatments due to their exceptional magnetic relaxation and functional properties. The magnetic core composition and structure significantly affects the complex magnetic properties of these nanoparticles necessitating a thorough examination of magnetism fundamentals related to these systems. One important aspect is the ability of magnetic nanoparticles to retain previous magnetic state configurations known as memory effect, primarily governed by domain structure and magnetic anisotropy. Despite its relevance to advanced applications, comprehensive studies on magnetic relaxation and memory effects remain limited. Here, the present review aims to bridge this gap by investigating relaxation mechanisms, synthesis strategies, and applications, fostering further innovation. It investigates the memory effects and their dependence on particle composition and morphology along with key synthesis techniques for large-scale production in industrial adoption. Structured into focused sections on magnetic properties and their influence on biomedical and technological applications, this review provides essential insights into memory effects, magneto-relaxation mechanisms, influencing factors, and both experimental and theoretical methodologies. It also delves into computational modelling and AI-driven design, which are revolutionizing the prediction, discovery, and optimization of materials with tailored properties.

36 MATERIALS SCIENCE↗