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284 records · Page 16
All sourcesNASA NTRSDOE OSTI
NASA NTRS2009

FPGA-Based Networked Phasemeter for a Heterodyne Interferometer

A document discusses a component of a laser metrology system designed to measure displacements along the line of sight with precision on the order of a tenth the diameter of an atom. This component, the phasemeter, measures the relative phase of two electrical signals and transfers that information to a computer. Because the metrology system measures the differences between two optical paths, the phasemeter has two inputs, called measure and reference. The reference signal is nominally a perfect square wave with a 50- percent duty cycle (though only rising edges are used). As the metrology system detects motion, the difference between the reference and measure signal phases is proportional to the displacement of the motion. The phasemeter, therefore, counts the elapsed time between rising edges in the two signals, and converts the time into an estimate of phase delay. The hardware consists of a circuit board that plugs into a COTS (commercial, off-the- shelf) Spartan-III FPGA (field-programmable gate array) evaluation board. It has two BNC inputs, (reference and measure), a CMOS logic chip to buffer the inputs, and an Ethernet jack for transmitting reduced-data to a PC. Two extra BNC connectors can be attached for future expandability, such as external synchronization. Each phasemeter handles one metrology channel. A bank of six phasemeters (and two zero-crossing detector cards) with an Ethernet switch can monitor the rigid body motion of an object. This device is smaller and cheaper than existing zero-crossing phasemeters. Also, because it uses Ethernet for communication with a computer, instead of a VME bridge, it is much easier to use. The phasemeter is a key part of the Precision Deployable Apertures and Structures strategic R&D effort to design large, deployable, segmented space telescopes.

Rao, Shanti↗
NASA NTRS2011

Broadband Via-Less Microwave Crossover Using Microstrip-CPW Transitions

The front-to-back interface between microstrip and CPW (coplanar waveguide) typically requires complex fabrication or has high radiation loss. The microwave crossover typically requires a complex fabrication step. The prior art in microstrip-CPW transition requires a physical vias connection between the microstrip and CPW line on a separate layer. The via-less version of this transition was designed empirically and does not have a close form solution. The prior art of the micro wave crossover requires either additional substrate or wire bond as an air bridge to isolate two microwave lines at the crossing junction. The disadvantages are high radiation loss, no analytical solution to the problem, lengthy simulation time, and complex fabrication procedures to generate air bridges or via. The disadvantage of the prior crossover is a complex fabrication procedure, which also affects the device reliability and yield. This microstrip-CPW transition is visualized as two microstrip-slotline transitions combined in a way that the radiation from two slotlines cancels each other out. The invention is designed based on analytical methods; thus, it significantly reduces the development time. The crossover requires no extra layer to cross two microwave signals and has low radiation loss. The invention is simple to fabricate and design. It produces low radiation loss and can be designed with low insertion loss, with some tradeoff with signal isolation. The microstrip-CPW transition is used as an interface to connect between the device and the circuit outside the package. The via-less microwave crossover is used to allow two signals to cross without using an extra layer or fabrication processing step to enable this function. This design allows the solution to be determined entirely though analytical techniques. In addition, a planar via-less microwave crossover using this technique was proposed. The experimental results show that the proposed crossover at 5 GHz has a minimum isolation of 32 dB. It also has low in-band insertion loss and return loss of 1.2 dB and 18 dB, respectively, over more than 44 percent of bandwidth at room temperature. This microstrip-CPW transition requires the microstrip line to be split into two sections. Each section is connected to a microstrip quarter-wavelength openended stub. A slotline is also placed perpendicular to the microstrip section. The slot is connected to a grounded-end quarter-wavelength slotline and generates a microstrip-slotline transition. When two of these sections are placed in parallel and with the microstrip section combined at transition, a microstrip- CPW transition is formed. The slotline radiation is suppressed as two slots are excited with the electric field in an opposite direction, which cancels the radiation in far field. The invention on the crossover consists of the invented microstrip-CPW transitions combined back-to-back and a microstrip low-pass filter. One signal is crossed through to the microstrip layer, while the other signal is crossed through the CPW line located on the ground plane of the microstrip line. The microstrip low-pass filter produces a narrow line at the crossing point to enhance the system isolation. It also produces broadband response in the operating frequency band. The microstrip-CPW transition allows a microwave signal to travel from microstrip line to CPW line with low radiation loss. The crossover allows two microwave signals to cross with minimal parasitic coupling.

Stevenson, Thomas↗
NASA NTRS1983

Method of making and structure for monolithic optical circuits

A method for making monolithic optical circuits, with related optical devices as required or desired, on a supporting surface (10) consists of coating the supporting surface with reflecting metal or cladding resin, spreading a layer of liquid radiation senstivie plastic (12) on the surface, exposing the liquid plastic with a mask (14) to cure it in a desired pattern of light conductors (16, 18, 20), washing away the unexposed liquid plastic, and coating the conductors thus formed with reflective metal or cladding resin. The index of refraction for the cladding (22) is selected to be lower than for the conductors so that light in the conductors will be reflected by the interface with the cladding. For multiple level conductors, as where one conductor must cross over another, the process may be repeated to fabricate a bridge with columns (24, 26) of conductors to the next level, and conductor (28) between the columns. For more efficient transfer of energy over the bridge, faces at 45.degree. may be formed to reflect light up and across the bridge.

Evanchuk, Vincent L.↗
NASA NTRS1984

Structure for monolithic optical circuits

A method for making monolithic optical circuits, with related optical devices as required or desired, on a supporting surface (10) consists of coating the supporting surface with reflecting metal or cladding resin, spreading a layer of liquid radiation sensitive plastic (12) on the surface, exposing the liquid plastic with a mask (14) to cure it in a desired pattern of light conductors (16, 18, 20), washing away the unexposed liquid plastic, and coating the conductors thus formed with reflective metal or cladding resin. The index of refraction for the cladding (22) is selected to be lower than for the conductors so that light in the conductors will be reflected by the interface with the cladding. For multiple level conductors, as where one conductor must cross over another, the process may be repeated to fabricate a bridge with columns (24, 26) of conductors to the next level, and conductor (28) between the columns. For more efficient transfer of energy over the bridge, faces at 45.degree. may be formed to reflect light up and across the bridge.

Evanchuk, Vincent L.↗
NASA NTRS2003

Carbon Nanotubes as Resonators for RF Spectrum Analyzers

Electromechanical resonators of a proposed type would comprise single carbon nanotubes suspended between electrodes (see Figure 1). Depending on the nanotube length, diameter, and tension, these devices will resonate at frequencies in a range from megahertz through gigahertz. Like the carbon-nanotube resonators described in the preceding article, these devices will exhibit high quality factors (Q values), will be compatible with integration with electronic circuits, and, unlike similar devices made from silicone and silicone carbide, will have tunable resonant frequencies as high as several GHz. An efficient electromechanical transduction method for the carbon nanotube resonators is provided by the previously observed variation of carbon nanotube length with charge injection. It was found that injection of electrons or holes, respectively, lengthens or shortens carbon nanotubes, by amounts of the order of a percent at bias levels of a few volts. The charge-dependent length change also enables a simple and direct means of tuning the resonant frequency by varying the DC bias and hence the tension along the tube, much like tuning a guitar string. In its basic form, the invention is a tunable high-Q resonator based on a suspended carbon nanotube bridge with attached electrodes (see Figure 1). An applied DC bias controls the tension and thus the frequency of resonance. If one were to superimpose a radio-frequency (RF) bias on the DC bias, then the resulting rapid variation in tension or length would set the tube into vibration. If, on the other hand, the carbon nanotube were to be set into vibration by interaction between an incident RF electric field and electric charges in the nanotube, then the vibration would give rise to an RF signal output that is proportional to the RF amplitude at the resonance frequency. Because the transduction mechanism is extremely sensitive and the active volume is only a few nanometers in diameter, this device is not well suited for use as a microwave power device. Instead, this carbon nanotube mechanical resonator would be useful primarily as part of a highly precise, sensitive, frequency-selective detector. An array of such devices featuring nanotubes of different lengths (and thus different frequencies) could be made to operate as a highspeed spectrum analyzer (see Figure 2)

Hunt, Brian↗
NASA NTRS1989

Product assurance technology for procuring reliable, radiation-hard, custom LSI/VLSI electronics

Advanced measurement methods using microelectronic test chips are described. These chips are intended to be used in acquiring the data needed to qualify Application Specific Integrated Circuits (ASIC's) for space use. Efforts were focused on developing the technology for obtaining custom IC's from CMOS/bulk silicon foundries. A series of test chips were developed: a parametric test strip, a fault chip, a set of reliability chips, and the CRRES (Combined Release and Radiation Effects Satellite) chip, a test circuit for monitoring space radiation effects. The technical accomplishments of the effort include: (1) development of a fault chip that contains a set of test structures used to evaluate the density of various process-induced defects; (2) development of new test structures and testing techniques for measuring gate-oxide capacitance, gate-overlap capacitance, and propagation delay; (3) development of a set of reliability chips that are used to evaluate failure mechanisms in CMOS/bulk: interconnect and contact electromigration and time-dependent dielectric breakdown; (4) development of MOSFET parameter extraction procedures for evaluating subthreshold characteristics; (5) evaluation of test chips and test strips on the second CRRES wafer run; (6) two dedicated fabrication runs for the CRRES chip flight parts; and (7) publication of two papers: one on the split-cross bridge resistor and another on asymmetrical SRAM (static random access memory) cells for single-event upset analysis.

Buehler, M. G.↗
NASA NTRS2009

Efficient Multiplexer FPGA Block Structures Based on G4FETs

Generic structures have been conceived for multiplexer blocks to be implemented in field-programmable gate arrays (FPGAs) based on four-gate field-effect transistors (G(sup 4)FETs). This concept is a contribution to the continuing development of digital logic circuits based on G4FETs and serves as a further demonstration that logic circuits based on G(sup 4)FETs could be more efficient (in the sense that they could contain fewer transistors), relative to functionally equivalent logic circuits based on conventional transistors. Results in this line of development at earlier stages were summarized in two previous NASA Tech Briefs articles: "G(sup 4)FETs as Universal and Programmable Logic Gates" (NPO-41698), Vol. 31, No. 7 (July 2007), page 44, and "Efficient G4FET-Based Logic Circuits" (NPO-44407), Vol. 32, No. 1 ( January 2008), page 38 . As described in the first-mentioned previous article, a G4FET can be made to function as a three-input NOT-majority gate, which has been shown to be a universal and programmable logic gate. The universality and programmability could be exploited to design logic circuits containing fewer components than are required for conventional transistor-based circuits performing the same logic functions. The second-mentioned previous article reported results of a comparative study of NOT-majority-gate (G(sup 4)FET)-based logic-circuit designs and equivalent NOR- and NAND-gate-based designs utilizing conventional transistors. [NOT gates (inverters) were also included, as needed, in both the G(sup 4)FET- and the NOR- and NAND-based designs.] In most of the cases studied, fewer logic gates (and, hence, fewer transistors), were required in the G(sup 4)FET-based designs. There are two popular categories of FPGA block structures or architectures: one based on multiplexers, the other based on lookup tables. In standard multiplexer- based architectures, the basic building block is a tree-like configuration of multiplexers, with possibly a few additional logic gates such as ANDs or ORs. Interconnections are realized by means of programmable switches that may connect the input terminals of a block to output terminals of other blocks, may bridge together some of the inputs, or may connect some of the input terminals to signal sources representing constant logical levels 0 or 1. The left part of the figure depicts a four-to-one G(sup 4)FET-based multiplexer tree; the right part of the figure depicts a functionally equivalent four-to-one multiplexer based on conventional transistors. The G(sup 4)FET version would contains 54 transistors; the conventional version contains 70 transistors.

Vatan, Farrokh↗
DOE OSTI2024

Scattering wave packets of hadrons in gauge theories: Preparation on a quantum computer

Quantum simulation holds promise of enabling a complete description of high-energy scattering processes rooted in gauge theories of the Standard Model. A first step in such simulations is preparation of interacting hadronic wave packets. To create the wave packets, one typically resorts to adiabatic evolution to bridge between wave packets in the free theory and those in the interacting theory, rendering the simulation resource intensive. In this work, we construct a wave-packet creation operator directly in the interacting theory to circumvent adiabatic evolution, taking advantage of resource-efficient schemes for ground-state preparation, such as variational quantum eigensolvers. By means of an ansatz for bound mesonic excitations in confining gauge theories, which is subsequently optimized using classical or quantum methods, we show that interacting mesonic wave packets can be created efficiently and accurately using digital quantum algorithms that we develop. Specifically, we obtain high-fidelity mesonic wave packets in the Z 2 and U(1) lattice gauge theories coupled to fermionic matter in 1+1 dimensions. Our method is applicable to both perturbative and non-perturbative regimes of couplings. The wave-packet creation circuit for the case of the Z 2 lattice gauge theory is built and implemented on the Quantinuum H1-1 trapped-ion quantum computer using 13 qubits and up to 308 entangling gates. The fidelities agree well with classical benchmark calculations after employing a simple symmetry-based noise-mitigation technique. This work serves as a step toward quantum computing scattering processes in quantum chromodynamics.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2022

Synthetic data generation for machine learning model training for energy theft scenarios using cosimulation

Abstract Technical and non‐technical losses in distribution circuits result in significant economic costs to power utilities. One type of non‐technical loss is energy theft by various means including illegal tapping of feeders, bypassing the meter, and billing fraud. These losses are usually hard to detect, and can remain undetected for long periods of time. Machine learning models have been proven effective in detecting these conditions, but rely on the availability of large, good‐quality training data sets. The problem is exacerbated by the imbalanced nature of data related to these conditions—energy theft, though costly, is very rare. The available data sets generally have very few samples of theft with most of the data pertaining to normal operation. Such data sets are generally not suitable to train machine learning models. In this paper, an overview of energy theft detection techniques, the challenges with their data needs, and the limitations of current techniques to bridge such data limitations is presented. A co‐simulation framework is proposed to generate reliable training data for machine learning algorithms for theft detection. An example scenario is presented and a machine learning model is built to detect certain kinds of energy theft.

24 POWER TRANSMISSION AND DISTRIBUTION↗
DOE OSTI2020

Comparison and Discussion on Shortcircuit Protections for Silicon-Carbide MOSFET Modules: Desaturation Versus Rogowski Switch-Current Sensor

Survivability of silicon-carbide (SiC) mosfet modules during short circuit (SC) is essential for modern power electronics systems due to large economic implications. SiC mosfet modules exhibit narrow SC withstand times and generally much lower SC robustness than silicon (Si) insulated-gate bipolar transistors (IGBTs). This puts a critical concern on their utilization, further stressing the importance of reliable protection. This article presents a comprehensive analysis and discussion on the SiC mosfet module SC protection and performance comparison between conventional desaturation detection, previously used for Si IGBT protection, and Rogowski switch-current sensor (RSCS) detection. In addition, this article presents the experimental design for soft turn-off as a reaction to the SC detection to avoid excessive overshoots during the abrupt turn-off of the SC current. To perform different types of SC with various fault inductances on different temperatures, and for the sake of fair comparison under the same conditions, a gate-driver unit for 1.2 kV SiC mosfet half-bridge modules is developed containing both detection methods. The results demonstrate that both methods are successful in protecting the module in all SC types, with superiority of the RSCS detection and concerns for desaturation detection in high-inductance and high dc-bus voltage SC events.

42 ENGINEERING↗
NASA NTRS2009

Waveguide Transition for Submillimeter-Wave MMICs

An integrated waveguide-to-MMIC (monolithic microwave integrated circuit) chip operating in the 300-GHz range is designed to operate well on high-permittivity semiconductor substrates typical for an MMIC amplifier, and allows a wider MMIC substrate to be used, enabling integration with larger MMICs (power amplifiers). The waveguide-to- CBCPW (conductor-backed coplanar waveguide) transition topology is based on an integrated dipole placed in the E-plane of the waveguide module. It demonstrates low loss and good impedance matching. Measurement and simulation demonstrate that the loss of the transition and waveguide loss is less than 1-dB over a 340-to-380-GHz bandwidth. A transition is inserted along the propagation direction of the waveguide. This transition uses a planar dipole aligned with the maximum E-field of the TE10 waveguide mode as an inter face between the waveguide and the MMIC. Mode conversion between the coplanar striplines (CPS) that feed the dipole and the CBCPW transmission line is accomplished using a simple air-bridge structure. The bottom side ground plane is truncated at the same reference as the top-side ground plane, leaving the end of the MMIC suspended in air.

Leong, Kevin M.↗
NASA NTRS2005

Apparatus Characterizes Transient Voltages in Real Time

The figure shows a prototype of a relatively inexpensive electronic monitoring apparatus that measures and records selected parameters of lightning-induced transient voltages on communication and power cables. The selected parameters, listed below, are those most relevant to the ability of lightning-induced transients to damage electronic equipment. This apparatus bridges a gap between some traditional transient-voltage recorders that record complete waveforms and other traditional transient-voltage recorders that record only peak values: By recording the most relevant parameters and only those parameters this apparatus yields more useful information than does a traditional peak-value (only) recorder while imposing much smaller data-storage and data-transmission burdens than does a traditional complete-waveform recorder. Also, relative to a complete-waveform recorder, this apparatus is more reliable and can be built at lower cost because it contains fewer electronic components. The transients generated by sources other than lightning tend to have frequency components well below 1 MHz. Most commercial transient recorders can detect and record such transients, but cannot respond rapidly enough for recording lightning-induced transient voltage peaks, which can rise from 10 to 90 percent of maximum amplitude in a fraction of a microsecond. Moreover, commercial transient recorders cannot rearm themselves rapidly enough to respond to the multiple transients that occur within milliseconds of each other on some lightning strikes. One transient recorder, designed for Kennedy Space Center earlier [ Fast Transient-Voltage Recorder (KSC- 11991), NASA Tech Briefs, Vol. 23, No. 10, page 6a (October 1999)], is capable of sampling transient voltages at peak values up to 50 V in four channels at a rate of 20 MHz. That recorder contains a trigger circuit that continuously compares the amplitudes of the signals on four channels to a preset triggering threshold. When a trigger signal is received, a volatile memory is filled with data for a total time of 200 ms. After the data are transferred to nonvolatile memory, the recorder rearms itself within 400 ms to enable recording of subsequent transients. Unfortunately, the recorded data must be retrieved through a serial communication link. Depending on the amount of data recorded, the memory can be filled before retrieval is completed. Although large amounts of data are recorded and retrieved, only a small part of the information (the selected parameters) is usually required. The present transient-voltage recorder provides the required information, without incurring the overhead associated with the recording, storage, and retrieval of complete transient-waveform data. In operation, this apparatus processes transient voltage waveforms in real time to extract and record the selected parameters. An analog-to-digital converter that operates at a speed of as much as 100 mega-samples per second is used to sample a transient waveform. A real-time comparator and peak detector are implemented by use of fast field-programmable gate arrays.

Medelius, Pedro↗
DOE OSTI2025

Polynomial Scaling Localized Active Space Unitary Selective Coupled Cluster Singles and Doubles

We present a polynomial-scaling algorithm for the localized active space unitary selective coupled cluster singles and doubles (LAS-USCCSD) method. In this approach, cluster excitations are selected based on a threshold ϵ determined by the absolute gradients of the LAS-UCCSD energy with respect to cluster amplitudes. Using the generalized Wick’s theorem for multireference wave functions, we derive the gradient expression as a polynomial function of one-, two-, and three-body reduced density matrices and 1- and 2-electron integrals, valid for any multireference wave function. The resulting gradient implementation exhibits a memory scaling of 𝒪(N 6 ), with N spin orbitals in the combined active space of all fragments. The variational quantum eigensolver is used to optimize the selected cluster excitations on a quantum simulator. Furthermore, by plotting the energy error, defined as the difference between the LAS-USCCSD and corresponding CASCI energies, against the inverse cluster amplitude selection threshold (ϵ –1 ) for polyene chains containing 2 to 5 π-bond units, we establish a relationship between the energy error and the threshold. To further validate the accuracy of LAS-USCCSD, we computed the cis–trans isomerization energy of stilbene (a 20-qubit system) and the magnetic coupling constant of the tris-hydroxo-bridged chromium dimer [Cr 2 (OH) 3 (NH 3 ) 6 ] 3+ (evaluated as both 12- and 20-qubit systems) using the Qiskit-Qulacs simulator. Assessing such examples is important to determine the practical feasibility of quantum simulations for chemically realistic systems. Toward this goal, with the LAS-USCCSD algorithm we estimated the quantum resources required for simulating an active space of (30e,22o) in [Cr 2 (OH) 3 (NH 3 ) 6 ] 3+ , a size that remains beyond the reach of current quantum simulators for accurate treatment.

Algorithms↗
DOE OSTI2023

PV Inverter Systems Enabled by Monolithically Integrated SiC based Four Quadrant Power Switch (4-QPS) [BiDFET]

The purpose of this project was to develop a new breed of Power Conversion Systems (PCS) for PV integration that is enabled by the newly developed 4-Quadrant Single Die SiC Power Semiconductor Switches (4-QPS) or also referred to as “Bidirectional FET (BIDFET)”. This work includes semiconductor die development, advanced packaging, converter design, development, and testing of 4-QPS enabled hardware prototypes at 1 kW (for single phase residential application) and 10 kW (for three phase commercial application). The BiDirectional Field-Effect Transistor (BiDFET) can enable circuit topologies requiring four-quadrant switches, that were earlier designed using discrete combinations of MOSFETs, IGBTs, GaN HEMTs, and PiN diodes. The monolithic nature of the BiDFET allows lower device count, smaller switch volume, lower inductance, and simpler packaging, and hence more reliable and commercially viable implementation in power electronics converters. The matrix converter topologies, now feasible using BiDFETs, can eliminate the bulky and unreliable dc link capacitors or inductors required for conventional voltage-source or current-source converters in ac–ac and ac–dc applications. The 1.2 kV BiDFET has the potential to disrupt all the applications utilizing 1.2 kV switches, including electric vehicle (EV) drivetrain, bidirectional EV chargers, industrial motor drives, solid-state transformers, datacenter power supplies, elevator drives, dc microgrids, energy storage grid integration, solid-state breakers, etc.

24 POWER TRANSMISSION AND DISTRIBUTION↗